def get_voltage(vaddr0, vaddr1, mult, offset, voltage): reg_val0 = cin_functions.ReadReg(vaddr0) reg_val1 = cin_functions.ReadReg(vaddr1) # print reg_val1[6:8] + reg_val0[4:8] # print int("800000",16) reg_val = abs(int(reg_val1[6:8] + reg_val0[4:8], 16) - int("800000", 16)) # print reg_val voltage = mult * ((0.000000596 * reg_val) + offset) # print voltage return voltage
def get_current(iaddr0, iaddr1, current): reg_val0 = cin_functions.ReadReg(iaddr0) reg_val1 = cin_functions.ReadReg(iaddr1) # print reg_val1[6:8] + reg_val0[4:8] reg_val = int(reg_val1[6:8] + reg_val0[4:8], 16) reg_val = abs(int("800000", 16) - int(reg_val1[6:8] + reg_val0[4:8], 16)) # print reg_val current = 0.000000596 * reg_val / 0.003 # print current return current
#! /usr/bin/python # -*- coding: utf-8 -*- import cin_constants import cin_register_map import cin_functions import time # def getFrmFpgaStat(): # get Status Registers print("**** Frame FPGA Status Registers ****\n ") # Test if FRAME FPGA is configured reg_val = bin( (int(cin_functions.ReadReg(cin_register_map.REG_FPGA_STATUS)[4:8], 16)))[2:].zfill(16) stats_vec = reg_val[:] if (int(stats_vec[-16]) == 1): # reg_val = cin_functions.ReadReg( cin_register_map.REG_FRM_BOARD_ID ) # print " CIN Board ID : " + reg_val[4:] reg_val = cin_functions.ReadReg(cin_register_map.REG_FRM_FPGA_VERSION) print(" FRM FPGA Version : " + reg_val[4:]) reg_val = cin_functions.ReadReg(cin_register_map.REG_FRM_FPGA_STATUS) print(" FPGA Status : " + reg_val[4:]) # print " frm_10gbe_port_sel_i : b15" # print " pixel_clk_sel : b0" reg_val = cin_functions.ReadReg(cin_register_map.REG_FRM_DCM_STATUS) print(" DCM Status : " + reg_val[4:]) # print " xaui_align_status_fab2 : b12" # print " xaui_txlock_fab2 : b11" # print " mac_tx_ll_dst_rdy_n_fab2 : b10" # print " mac_rx_dcm_locked_fab2 : b09" # print " tx_mmcm_locked_fab2 : b08"
#! /usr/bin/python # -*- coding: utf-8 -*- import cin_constants import cin_register_map import cin_functions import time regval = cin_functions.ReadReg(cin_register_map.REG_TRIGGERSELECT_REG) print " TRIGGERSEL REG VALUE: 0x" + regval[4:] regval = cin_functions.ReadReg(cin_register_map.REG_TRIGGERMASK_REG) print" TRIGGERMASK REG VALUE: 0x" + regval[4:] print " " time.sleep(0.1)
#! /usr/bin/python # -*- coding: utf-8 -*- import cin_constants import cin_register_map import cin_functions import time # def getFCLK(): print " " print "**** CIN FCLK Configuration ****\n" regval = cin_functions.ReadReg(cin_register_map.REG_FCLK_I2C_DATA_WR) print " FCLK OSC MUX SELECT : 0x" + regval[4:] if (regval[4:5] == "F"): # Freeze DCO cin_functions.WriteReg(cin_register_map.REG_FCLK_I2C_ADDRESS, "B189", 0) cin_functions.WriteReg(cin_register_map.REG_FRM_COMMAND, cin_register_map.CMD_FCLK_COMMIT, 0) reg_val = cin_functions.ReadReg(cin_register_map.REG_FCLK_I2C_DATA_RD) if (reg_val[6:] != "08"): print " Status Reg : 0x" + reg_val[6:] cin_functions.WriteReg(cin_register_map.REG_FCLK_I2C_ADDRESS, "B107", 0) cin_functions.WriteReg(cin_register_map.REG_FRM_COMMAND, cin_register_map.CMD_FCLK_COMMIT, 0) reg_val7 = cin_functions.ReadReg(cin_register_map.REG_FCLK_I2C_DATA_RD) cin_functions.WriteReg(cin_register_map.REG_FCLK_I2C_ADDRESS, "B108", 0)
#! /usr/bin/python # -*- coding: utf-8 -*- import sys import cin_functions print(cin_functions.ReadReg(str(sys.argv[1])))
#! /usr/bin/python # -*- coding: utf-8 -*- import cin_constants import cin_register_map import cin_functions import time # ---------------------------------------------< Configuration FPGA functions > # def getCfgFpgaStat(): # get Status Registers print("**** CFG FPGA Status Registers **** \n") reg_val = cin_functions.ReadReg(cin_register_map.REG_BOARD_ID) print(" CIN Board ID : " + reg_val[4:]) reg_val = cin_functions.ReadReg(cin_register_map.REG_HW_SERIAL_NUM) print(" HW Serial Number : " + reg_val[4:]) reg_val = cin_functions.ReadReg(cin_register_map.REG_FPGA_VERSION) print(" CFG FPGA Version : " + reg_val[4:] + "\n") reg_val = cin_functions.ReadReg(cin_register_map.REG_FPGA_STATUS) print(" CFG FPGA Status : " + reg_val[4:]) # FPGA Status # 15 == FRM DONE # 14 == NOT FRM BUSY # 13 == NOT FRM INIT B # 12 >> 4 == 0 # 3 >>0 == FP Config Control 3 == PS Interlock reg_val = bin( (int(cin_functions.ReadReg(cin_register_map.REG_FPGA_STATUS)[4:8], 16)))[2:].zfill(16) stats_vec = reg_val[:] if (int(stats_vec[-16]) == 1): print(" ** Frame FPGA Configuration Done")
bitpos = int(sys.argv[3]) width = int(sys.argv[4]) # Select Bit Mask count = 0 maskbit = 0x0000 while (count < width): maskbit = maskbit << 1 maskbit = maskbit | 0x0001 count = count + 1 # Create bit clearing mask temp = maskbit << int(bitpos) clrval = ~temp & 0xFFFF # Create bitwise insert value insval = (maskbit & data) << int(bitpos) # Read Selected Register value regval = cin_functions.ReadReg(addr)[4:] # Clear write location twdata = int(regval, 16) & clrval # Input new data bits wdata = twdata | insval # Format Data word for WriteReg Function data = "{0:0>4}".format(str(hex(wdata)).lstrip("0x")) # Write new data word cin_functions.WriteReg(addr, data, 1) # regval = cin_functions.ReadReg( addr )[4:] # print regval
import cin_constants import cin_register_map import cin_functions import time # def getFabricEthStatus(): print " " print "******************* 10GbE Fabric Ethernet Status ***************** " print " " print "--- MAC Configuration: " reg_val = cin_functions.ReadReg(cin_register_map.REG_IF_MAC_FAB1B2)[4:8] reg_val = reg_val + cin_functions.ReadReg( cin_register_map.REG_IF_MAC_FAB1B1)[4:8] reg_val = reg_val + cin_functions.ReadReg( cin_register_map.REG_IF_MAC_FAB1B0)[4:8] print "MAC Address: " + reg_val[0:2] + ":" + reg_val[2:4] + ":" + reg_val[ 4:6] + ":" + reg_val[6:8] + ":" + reg_val[8:10] + ":" + reg_val[10:12] reg_val = cin_functions.ReadReg(cin_register_map.REG_IF_IP_FAB1B1)[4:8] reg_val = reg_val + cin_functions.ReadReg( cin_register_map.REG_IF_IP_FAB1B0)[4:8] print "IP Address: " + str(int(reg_val[0:2], 16)) + "." + str(int(
# print reg_val1[6:8] + reg_val0[4:8] reg_val = int(reg_val1[6:8] + reg_val0[4:8], 16) reg_val = abs(int("800000", 16) - int(reg_val1[6:8] + reg_val0[4:8], 16)) # print reg_val current = 0.000000596 * reg_val / 0.003 # print current return current # def getPowerStatus(): print " " print "**** CIN Power Monitor ****" reg_val = cin_functions.ReadReg(cin_register_map.REG_FPGA_VERSION) print "CFG FPGA v" + reg_val[4:] + "\n" reg_val = bin( (int(cin_functions.ReadReg(cin_register_map.REG_PS_ENABLE)[4:8], 16)))[2:].zfill(16) stats_vec = reg_val[:] if (int(stats_vec[-1]) == 1): # ADC == LT4151 reg_val = cin_functions.ReadReg(cin_register_map.REG_VMON_ADC1_CH1) # print reg_val[4:8] voltage = 0.025 * int(reg_val[4:8], 16) reg_val = cin_functions.ReadReg(cin_register_map.REG_IMON_ADC1_CH0) # print reg_val[4:8]
import cin_constants import cin_register_map import cin_functions import time # def getBaseEthStat(): print "**** CFG FPGA - Base (1GbE) Ethernet Status Registers " print " " # Get PHY1 Status register cin_functions.WriteReg(cin_register_map.REG_PHY1_MDIO_CMD, "C001", 1) time.sleep(0.1) cin_functions.WriteReg(cin_register_map.REG_PHY1_MDIO_CMD, "0000", 1) reg_val = bin((int( cin_functions.ReadReg(cin_register_map.REG_PHY1_MDIO_RD_DATA)[4:8], 16)))[2:].zfill(16) stats_vec = reg_val[:] print " 1GbE PHY1 Status Register : " print stats_vec[-9] + " : Extended Status" print stats_vec[-7] + " : MGMT Frame Preamble Suppression" print stats_vec[-6] + " : Copper auto-negotiation complete" print stats_vec[-5] + " : Copper remote fault detect" print stats_vec[-4] + " : Auto-negotiation Enabled" print
#! /usr/bin/python # -*- coding: utf-8 -*- import cin_constants import cin_register_map import cin_functions import time # def getFrmFpgaStat(): # get Status Registers print "**** Frame FPGA Status Registers ****\n " # Test if FRAME FPGA is configured reg_val = bin((int(cin_functions.ReadReg(cin_register_map.REG_FPGA_STATUS)[4:8], 16)))[2:].zfill(16) stats_vec = reg_val[:] if (int(stats_vec[-16]) == 1): # reg_val = cin_functions.ReadReg( cin_register_map.REG_FRM_BOARD_ID ) # print " CIN Board ID : " + reg_val[4:] reg_val = cin_functions.ReadReg(cin_register_map.REG_FRM_FPGA_VERSION) print " FRM FPGA Version : " + reg_val[4:] reg_val = cin_functions.ReadReg(cin_register_map.REG_FRM_FPGA_STATUS) print " FPGA Status : " + reg_val[4:] # print " frm_10gbe_port_sel_i : b15" # print " pixel_clk_sel : b0" reg_val = cin_functions.ReadReg(cin_register_map.REG_FRM_DCM_STATUS) print " DCM Status : " + reg_val[4:] # print " xaui_align_status_fab2 : b12" # print " xaui_txlock_fab2 : b11" # print " mac_tx_ll_dst_rdy_n_fab2 : b10"
# current = 0.000000238*((int("10000",16) - int(reg_val[4:8],16)))/0.003 current = 0.000000476 * ( (int("10000", 16) - int(reg_val[4:8], 16))) / 0.003 else: # current = 0.000000238*(int(reg_val[4:8],16))/0.003 current = 0.000000476 * (int(reg_val[4:8], 16)) / 0.003 return current # def getPowerStatus(): print " " print "**** CIN Power Monitor ****\n" reg_val = bin( (int(cin_functions.ReadReg(cin_register_map.REG_PS_ENABLE)[4:8], 16)))[2:].zfill(16) stats_vec = reg_val[:] if (int(stats_vec[-1]) == 1): # ADC == LT4151 reg_val = cin_functions.ReadReg(cin_register_map.REG_VMON_ADC1_CH1) # print reg_val voltage = 0.025 * int(reg_val[4:8], 16) reg_val = cin_functions.ReadReg(cin_register_map.REG_IMON_ADC1_CH0) # print reg_val current = 0.00002 * int(reg_val[4:8], 16) / 0.003 power = voltage * current print "V12P_BUS Power : {0:.4s}".format(str(voltage)) + "V @ {0:.5s}".format( str(current)) + "A \n"