def test_all(self): cpuinfo.DataSource = DataSource self.assertEqual(None, cpuinfo.get_cpu_info_from_registry()) self.assertEqual(None, cpuinfo.get_cpu_info_from_proc_cpuinfo()) self.assertEqual(None, cpuinfo.get_cpu_info_from_sysctl()) self.assertEqual(None, cpuinfo.get_cpu_info_from_kstat()) self.assertEqual(None, cpuinfo.get_cpu_info_from_dmesg()) self.assertEqual(None, cpuinfo.get_cpu_info_from_sysinfo())
def test_all(self): cpuinfo.DataSource = DataSource info = cpuinfo.get_cpu_info_from_dmesg() self.assertEqual('GenuineIntel', info['vendor_id']) self.assertEqual('', info['hardware']) self.assertEqual('Intel(R) Core(TM) i5-4440 CPU @ 3.10GHz', info['brand']) self.assertEqual('3.1000 GHz', info['hz_advertised']) self.assertEqual('2.9934 GHz', info['hz_actual']) self.assertEqual((3100000000, 0), info['hz_advertised_raw']) self.assertEqual((2993390000, 0), info['hz_actual_raw']) self.assertEqual('X86_64', info['arch']) self.assertEqual(64, info['bits']) self.assertEqual(1, info['count']) self.assertEqual('amd64', info['raw_arch_string']) self.assertEqual(0, info['l2_cache_size']) self.assertEqual(0, info['l2_cache_line_size']) self.assertEqual(0, info['l2_cache_associativity']) self.assertEqual(3, info['stepping']) self.assertEqual(60, info['model']) self.assertEqual(6, info['family']) self.assertEqual(0, info['processor_type']) self.assertEqual(0, info['extended_model']) self.assertEqual(0, info['extended_family']) self.assertEqual( ['apic', 'clflush', 'cmov', 'cx8', 'de', 'fpu', 'fxsr', 'lahf', 'lm', 'mca', 'mce', 'mmx', 'mon', 'msr', 'mtrr', 'nx', 'pae', 'pat', 'pge', 'pse', 'pse36', 'rdtscp', 'sep', 'sse', 'sse2', 'sse3', 'ssse3', 'syscall', 'tsc', 'vme'] , info['flags'] )