コード例 #1
0
def generate_sample_msg_splitter_B100_image(name, defines=config.default_defines):
    message_builddir= os.path.join(config.builddir, 'message')
    inputfiles = generate_sample_msg_splitter_files()
    inputfiles.append(copyfile('message', 'qa_sample_msg_splitter.v'))
    b100.make_make(name, message_builddir, inputfiles, defines)
    for f in inputfiles:
        b100.prefix_defines(f, defines)
    b100.synthesise(name, message_builddir)
コード例 #2
0
 def setUp(self):
     # Width of a complex number
     self.width = 32
     self.mwidth = 1
     self.n = 8
     if False:
         executable, dit_inputfiles = generate('xilinx', self.n, self.width,
                                               self.mwidth)
         make_qa_dit(self.n, self.width, self.mwidth)
         qa_dit_fn = os.path.join(config.builddir, 'fft', 'qa_dit.v')
         b100.make_make('dit', dit_inputfiles + [qa_dit_fn])
         b100.synthesise('dit')
     b100.copy_image('dit')
コード例 #3
0
ファイル: qa_fpga_dit.py プロジェクト: benreynwar/fpga-sdrlib
 def setUp(self):
     # Width of a complex number
     self.width = 32
     self.mwidth = 1
     self.n = 8
     if False:
         executable, dit_inputfiles = generate(
             'xilinx', self.n, self.width, self.mwidth)
         make_qa_dit(self.n, self.width, self.mwidth)
         qa_dit_fn = os.path.join(config.builddir, 'fft', 'qa_dit.v')
         b100.make_make('dit', dit_inputfiles + [qa_dit_fn])
         b100.synthesise('dit')
     b100.copy_image('dit')
コード例 #4
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 def setUp(self):
     # Number of channels
     self.M = 4
     self.logM = int(math.log(self.M)/math.log(2))
     # The amount of data to send
     self.n_data = self.M * 8
     # Baseband sampling rate
     self.fs = 1000        
     # Input samp rate to channelizer
     self.ifs = self.M*self.fs       
     # Each channel contains a pure frequency with an offset and
     # amplitude.
     self.freqs = [0, 100, 200, -300]
     self.amplitudes = [1, 1, -0.2, 0.5]
     # Random number generator
     rg = random.Random(0)
     self.myrand = rg.random
     self.myrandint = rg.randint
     # Width of a complex number
     self.width = 32
     # Generate some taps
     self.taps, self.tapscale = qach.get_channelizer_taps(self.M, n_taps=8)
     # How often to send input.
     # For large FFTs this must be larger since the speed scales as MlogM.
     # Otherwise we get an overflow error.
     self.sendnth = 2
     # Get the input data
     self.data = qach.get_mixed_sinusoids(self.fs, self.n_data, self.freqs, self.amplitudes)
     # Scale the input data to remain in (-1 to 1)
     datamax = 0
     for d in self.data:
         datamax = max(datamax, abs(d.real), abs(d.imag))
     self.inputscale = datamax
     self.data = [d/datamax for d in self.data]
     # Send in some meta data
     self.mwidth = 1
     self.ms = [self.myrandint(0, 2) for d in self.data]
     name = 'qachannelizer1'
     
     executable, ds_inputfiles = data_source_generate(
         name, self.data, self.ms, self.sendnth, self.width, self.mwidth)
     executable, ch_inputfiles = channelizer_generate(
         name, self.M, self.taps, self.width, self.mwidth,
         {'sendnth': self.sendnth, 'n_data': self.n_data})
     qa_channelizer_fn = os.path.join(config.builddir, 'channelizer', 'qa_channelizer.v')
     b100.make_make('channelizer', ds_inputfiles + ch_inputfiles + [qa_channelizer_fn])
     b100.synthesise('channelizer')
     b100.copy_image('channelizer')
コード例 #5
0
def generate_B100_image(package,
                        name,
                        suffix,
                        defines=config.default_defines,
                        extraargs={}):
    builddir = os.path.join(config.builddir, package)
    outputdir = os.path.join(
        builddir, 'build-B100_{name}{suffix}'.format(name=name, suffix=suffix))
    vdir = os.path.join(
        builddir, 'verilog-B100_{name}{suffix}'.format(name=name,
                                                       suffix=suffix))
    if not os.path.exists(vdir):
        os.makedirs(vdir)
    dependencies = compatibles[package][name]
    included_dependencies = set()
    inputfiles = [os.path.join(pd2fn('uhd', 'u1plus_core_QA.v'))]
    for d in dependencies:
        pck, fn = d2pd(package, d)
        if (pck, fn) not in included_dependencies:
            generate_block(pck, fn, extraargs, included_dependencies,
                           inputfiles)
    new_inputfiles = []
    changed = False
    for f in inputfiles:
        # Prefix the macros to the beginning of each file.
        # FIXME: There has to be a better way to get this working :(.
        assert (f.endswith('.v'))
        bn = os.path.basename(f)
        f2 = os.path.join(vdir, bn[:-2] + '_prefixed.v')
        f3 = os.path.join(vdir, bn[:-2] + '_final.v')
        shutil.copyfile(f, f2)
        b100.prefix_defines(f2, defines)
        # See if any of the produced files are different than what
        # was used last time.
        if (not os.path.exists(f3)) or (not filecmp.cmp(f2, f3)):
            changed = True
            shutil.copyfile(f2, f3)
        new_inputfiles.append(f3)
    image_fn = os.path.join(outputdir, 'B100.bin')
    if changed or not os.path.exists(image_fn):
        b100.make_make(name + suffix, builddir, new_inputfiles, defines)
        return b100.synthesise(name + suffix, builddir)
    else:
        return image_fn
コード例 #6
0
ファイル: buildutils.py プロジェクト: benreynwar/fpga-sdrlib
def generate_B100_image(package, name, suffix, defines=config.default_defines, extraargs={}):
    builddir = os.path.join(config.builddir, package)
    outputdir = os.path.join(builddir, 'build-B100_{name}{suffix}'.format(
            name=name, suffix=suffix))
    vdir = os.path.join(builddir, 'verilog-B100_{name}{suffix}'.format(
            name=name, suffix=suffix))
    if not os.path.exists(vdir):
        os.makedirs(vdir)
    dependencies = compatibles[package][name]
    included_dependencies = set()
    inputfiles = [os.path.join(pd2fn('uhd', 'u1plus_core_QA.v'))]
    for d in dependencies:
        pck, fn = d2pd(package, d)
        if (pck, fn) not in included_dependencies:
            generate_block(pck, fn, extraargs, included_dependencies, inputfiles)
    new_inputfiles= []
    changed = False
    for f in inputfiles:
        # Prefix the macros to the beginning of each file.
        # FIXME: There has to be a better way to get this working :(.
        assert(f.endswith('.v'))
        bn = os.path.basename(f)
        f2 = os.path.join(vdir, bn[:-2] + '_prefixed.v')
        f3 = os.path.join(vdir, bn[:-2] + '_final.v')
        shutil.copyfile(f, f2)
        b100.prefix_defines(f2, defines)
        # See if any of the produced files are different than what
        # was used last time.
        if (not os.path.exists(f3)) or (not filecmp.cmp(f2, f3)):
            changed = True
            shutil.copyfile(f2, f3)
        new_inputfiles.append(f3)
    image_fn = os.path.join(outputdir, 'B100.bin')
    if changed or not os.path.exists(image_fn):
        b100.make_make(name+suffix, builddir, new_inputfiles, defines)
        return b100.synthesise(name+suffix, builddir)
    else:
        return image_fn