for i, slot in enumerate(awg_slots):
awg = M3202A_fpga(f"AWG{i}", 1, slot)
awg.set_hvi_queue_control(True)
awgs.append(awg)
station = qcodes.Station()
station_name = 'Test'
for awg in awgs:
station.add_component(awg)
station.add_component(dig)
dig_mode = MODES.AVERAGE
load_iq_image(dig.SD_AIN)
print_fpga_info(dig.SD_AIN)
dig.set_acquisition_mode(dig_mode)
logging.info('init pulse lib')
# load the AWG library
pulse = create_pulse_lib(awgs)
print('start gui')
logging.info('open plotting')
plotting = liveplotting(pulse, dig, "Keysight")
plotting.move(222, 0)
plotting.resize(1618, 590)
plotting._2D_gate2_name.setCurrentIndex(1)
plotting._2D_t_meas.setValue(1)
plotting._2D_V1_swing.setValue(100)
plotting.update_plot_settings_2D()
logging.info(f'restart duration {time.monotonic()- start:5.2f} s')
dig = SD_DIG("dig", 1, 6)
awg_slots = [3] # [3,4]
awgs = []
for i, slot in enumerate(awg_slots):
awg = M3202A(f"AWG{i}", 1, slot)
awg.set_digital_filter_mode(0)
awgs.append(awg)
for awg in awgs:
load_awg_image(awg)
# load_default_awg_image(awg)
print_fpga_info(awg.awg)
station = qcodes.Station()
station_name = 'Test'
for awg in awgs:
station.add_component(awg)
station.add_component(dig)
dig_mode = 1
load_iq_image(dig.SD_AIN)
print_fpga_info(dig.SD_AIN)
dig.set_acquisition_mode(dig_mode)
logging.info('init pulse lib')
