def build(self, platform, fragment, build_dir="build", build_name="top", toolchain_path=None, source=None, run=True, mode="xst", **kwargs): if not isinstance(fragment, _Fragment): fragment = fragment.get_fragment() if toolchain_path is None: if sys.platform == "win32": toolchain_path = "C:\\Xilinx" elif sys.platform == "cygwin": toolchain_path = "/cygdrive/c/Xilinx" else: toolchain_path = "/opt/Xilinx" if source is None: source = sys.platform != "win32" platform.finalize(fragment) ngdbuild_opt = self.ngdbuild_opt vns = None tools.mkdir_noerror(build_dir) cwd = os.getcwd() os.chdir(build_dir) try: if mode == "xst" or mode == "yosys": v_output = platform.get_verilog(fragment, name=build_name, **kwargs) vns = v_output.ns named_sc, named_pc = platform.resolve_signals(vns) v_file = build_name + ".v" v_output.write(v_file) sources = platform.sources | {(v_file, "verilog", "work")} if mode == "xst": _build_xst_files(platform.device, sources, platform.verilog_include_paths, build_name, self.xst_opt) isemode = "xst" else: _run_yosys(platform.device, sources, platform.verilog_include_paths, build_name) isemode = "edif" ngdbuild_opt += "-p " + platform.device tools.write_to_file(build_name + ".ucf", _build_ucf(named_sc, named_pc)) if run: _run_ise(build_name, toolchain_path, source, isemode, ngdbuild_opt, self.bitgen_opt, self.ise_commands, self.map_opt, self.par_opt) finally: os.chdir(cwd) return vns
def build(self, platform, fragment, build_dir="build", build_name="top", toolchain_path="/opt/Xilinx/Vivado", source=True, run=True, **kwargs): tools.mkdir_noerror(build_dir) cwd = os.getcwd() os.chdir(build_dir) if not isinstance(fragment, _Fragment): fragment = fragment.get_fragment() platform.finalize(fragment) v_output = platform.get_verilog(fragment, name=build_name, **kwargs) named_sc, named_pc = platform.resolve_signals(v_output.ns) v_file = build_name + ".v" v_output.write(v_file) sources = platform.sources | {(v_file, "verilog", "work")} self._build_batch(platform, sources, build_name) tools.write_to_file(build_name + ".xdc", _build_xdc(named_sc, named_pc)) if run: _run_vivado(build_name, toolchain_path, source) os.chdir(cwd) return v_output.ns
def build(self, platform, fragment, build_dir="build", build_name="top", toolchain_path="/opt/Altera", run=True, **kwargs): cwd = os.getcwd() tools.mkdir_noerror(build_dir) os.chdir(build_dir) if not isinstance(fragment, _Fragment): fragment = fragment.get_fragment() platform.finalize(fragment) v_output = platform.get_verilog(fragment, name=build_name, **kwargs) named_sc, named_pc = platform.resolve_signals(v_output.ns) v_file = build_name + ".v" v_output.write(v_file) sources = platform.sources | {(v_file, "verilog", "work")} _build_files(platform.device, sources, platform.verilog_include_paths, named_sc, named_pc, build_name) if run: _run_quartus(build_name, toolchain_path) os.chdir(cwd) return v_output.ns
def build(self, platform, fragment, build_dir="build", build_name="top", toolchain_path=None, serial="console", run=True, verbose=True): tools.mkdir_noerror(build_dir) os.chdir(build_dir) if not isinstance(fragment, _Fragment): fragment = fragment.get_fragment() platform.finalize(fragment) v_output = platform.get_verilog(fragment) named_sc, named_pc = platform.resolve_signals(v_output.ns) v_output.write("dut.v") include_paths = [] for source in platform.sources: path = os.path.dirname(source[0]).replace("\\", "\/") if path not in include_paths: include_paths.append(path) include_paths += platform.verilog_include_paths _build_sim(platform, v_output.ns, build_name, include_paths, serial, verbose) if run: _run_sim(build_name) os.chdir("..") return v_output.ns
def build(self, platform, fragment, build_dir="build", build_name="top", toolchain_path=None, source=True, run=True, **kwargs): tools.mkdir_noerror(build_dir) cwd = os.getcwd() os.chdir(build_dir) if not isinstance(fragment, _Fragment): fragment = fragment.get_fragment() platform.finalize(fragment) v_output = platform.get_verilog(fragment, name=build_name, **kwargs) named_sc, named_pc = platform.resolve_signals(v_output.ns) v_file = build_name + ".v" v_output.write(v_file) sources = platform.sources | {(v_file, "verilog", "work")} self._build_batch(platform, sources, build_name) tools.write_to_file(build_name + ".xdc", _build_xdc(named_sc, named_pc)) if run: _run_vivado(build_name, toolchain_path, source) os.chdir(cwd) return v_output.ns