def quaddecoder(A, B):
AFF = FF()(A)
BFF = FF()(B)
dir = XOr(2)
dir(A, BFF)
ena = XOr(4)
ena(A, B, AFF, BFF)
return dir, ena
def generate_test(Circuit, func):
#nfuncargs = check(circuit, func)
sig = signature(func)
nfuncargs = len(sig.parameters)
assert nfuncargs + 1 < 8
rom = testvectors(func)
romb = ROMB(rom)
counter = Counter(9)
wire(1, romb.RE)
wire(1, romb.RCLKE)
wire(counter.O, romb.RADDR)
circuit = Circuit(nfuncargs)
circuit(*[romb.RDATA[i] for i in range(nfuncargs)])
orr = Or(2)
finished = DFF()
f = finished(orr(counter.COUT, finished.O))
xor = XOr(2)
xor(circuit.O, romb.RDATA[nfuncargs])
orr = Or(2)
error = DFF()
e = error(orr(xor.O, error.O))
return f, e
def definition(io):
# Generate the sum
m.wire(XOr(3)(io.I0, io.I1, io.CIN), io.O)
# Generate the carry
m.wire(
Or(3)(And(2)(io.I0, io.I1), And(2)(io.I1, io.CIN),
And(2)(io.I0, io.CIN)), io.COUT)
class HalfAdder(m.Circuit):
io = m.IO(I=m.In(m.Bit),
CIN=m.In(m.Bit),
O=m.Out(m.Bit),
COUT=m.Out(m.Bit))
# Generate the sum
m.wire(XOr(2)(io.I, io.CIN), io.O)
# Generate the carry
m.wire(And(2)(io.I, io.CIN), io.COUT)
class FullAdder(m.Circuit):
io = m.IO(I0=m.In(m.Bit),
I1=m.In(m.Bit),
CIN=m.In(m.Bit),
O=m.Out(m.Bit),
COUT=m.Out(m.Bit))
# Generate the sum
m.wire(XOr(3)(io.I0, io.I1, io.CIN), io.O)
# Generate the carry
m.wire(
Or(3)(And(2)(io.I0, io.I1), And(2)(io.I1, io.CIN),
And(2)(io.I0, io.CIN)), io.COUT)
def test_bitwise():
check_unary_operator(invert, "Invert", wrapped=False)
check_unary_overloaded_operator(operator.invert, Invert(4))
binary_bits_ops = [
(and_, operator.and_, And(2, 4)),
(or_, operator.or_, Or(2, 4)),
(xor, operator.xor, XOr(2, 4)),
]
for args in binary_bits_ops:
print("Testing {}".format(args))
check_binary_operator(args[0], args[2])
check_binary_overloaded_operator(args[1], args[2])
check_unary_operator(neg, "Negate", wrapped=False)
check_unary_overloaded_operator(operator.neg, Negate(4), T=SInt)
binary_arith_ops = [
(add, operator.add, Add(4, cin=False)),
(sub, operator.sub, Sub(4)),
]
for args in binary_arith_ops:
print("Testing {}".format(args))
check_binary_operator(args[0], args[2], T=Bits)
check_binary_overloaded_operator(args[1], args[2], T=UInt)
check_binary_overloaded_operator(args[1], args[2], T=SInt)
compare_ops = [
# (eq, operator.eq, EQ(4) ),
(lt, operator.lt, ULT(4), SLT(4)),
(le, operator.le, ULE(4), SLE(4)),
(gt, operator.gt, UGT(4), SGT(4)),
(ge, operator.ge, UGE(4), SGE(4))
]
for args in compare_ops:
print("Testing {}".format(args))
check_binary_operator(args[0], args[2], out_type=Bit)
if args[0] == eq:
check_binary_overloaded_operator(args[1], args[2], out_type=Bit)
else:
check_binary_overloaded_operator(args[1],
args[2],
T=UInt,
out_type=Bit)
check_binary_overloaded_operator(args[1],
args[3],
T=SInt,
out_type=Bit)
def compress3to2():
global n3to2s
n3to2s = n3to2s + 1
Op = Define3to2Op()
return fork([XOr(3), Op()])
def xor(*args, **kwargs):
width = get_length(args[0])
return XOr(len(args), width, **kwargs)(*args)
from magma import wire, compile, EndCircuit
from mantle import XOr
from loam.boards.icestick import IceStick
N = 2
icestick = IceStick()
for i in range(2 * N):
icestick.J1[i].input().on()
for i in range(N):
icestick.J3[i].output().on()
main = icestick.main()
xor2 = XOr(2, N)
wire(xor2(main.J1[0:N], main.J1[N:2 * N]), main.J3)
EndCircuit()
def definition(io):
# Generate the sum
m.wire( XOr(2)(io.I, io.CIN), io.O )
# Generate the carry
m.wire( And(2)(io.I, io.CIN), io.COUT )
import os
os.environ['MANTLE'] = 'lattice'
from magma import *
from mantle import And, XOr
from simulator import testvectors
main = DefineCircuit('main', "a", In(Bit), "b", In(Bit), "c", In(Bit), "d",
Out(Bit), 'CLK', In(Bit))
t = And(2)(main.a, main.b)
d = XOr(2)(t, main.c)
wire(d, main.d)
EndCircuit()
print(testvectors(main))
from magma import wire, compile, EndCircuit
from loam.boards.icestick import IceStick
from mantle import XOr
icestick = IceStick()
for i in range(2):
icestick.J1[i].input().on()
icestick.D5.on()
main = icestick.main()
xor2 = XOr(2)
xor2(main.J1[0], main.J1[1])
wire(xor2.O, main.D5)
EndCircuit()