def __init__(self,sdram_controller_type="minicon", **kwargs): platform = metlino.Platform() SoCSDRAM.__init__(self, platform, clk_freq=125*1000000, **kwargs) self.submodules.crg = CRG(platform) self.crg.cd_sys.clk.attr.add("keep") self.submodules.ddrphy = kusddrphy.KUSDDRPHY(platform.request("ddram")) self.config["DDRPHY_WLEVEL"] = None self.config["KUSDDRPHY"] = None sdram_module = MT41J256M16(self.clk_freq, "1:4") self.register_sdram(self.ddrphy, sdram_controller_type, sdram_module.geom_settings, sdram_module.timing_settings) self.csr_devices.append("ddrphy") if not self.integrated_rom_size: spiflash_pads = platform.request("spiflash") spiflash_pads.clk = Signal() self.specials += Instance("STARTUPE3", i_GSR=0, i_GTS=0, i_KEYCLEARB=0, i_PACK=1, i_USRDONEO=1, i_USRDONETS=1, i_USRCCLKO=spiflash_pads.clk, i_USRCCLKTS=0, i_FCSBO=1, i_FCSBTS=0, i_DO=0, i_DTS=0b1110) self.submodules.spiflash = spi_flash.SpiFlash(spiflash_pads, dummy=11, div=2) self.config["SPIFLASH_PAGE_SIZE"] = 256 self.config["SPIFLASH_SECTOR_SIZE"] = 0x10000 self.flash_boot_address = 0x50000 self.register_rom(self.spiflash.bus, 16*1024*1024) self.csr_devices.append("spiflash")
def __init__(self, sdram="ddram_64", sdram_controller_type="minicon", **kwargs): platform = sayma_amc.Platform() SoCSDRAM.__init__(self, platform, clk_freq=125 * 1000000, integrated_rom_size=0x8000, integrated_sram_size=0x8000, **kwargs) self.csr_devices += ["ddrphy"] self.submodules.crg = _CRG(platform) self.submodules.ddrphy = kusddrphy.KUSDDRPHY(platform.request(sdram)) self.config["KUSDDRPHY"] = 1 sdram_module = MT41J256M16(self.clk_freq, "1:4") self.register_sdram(self.ddrphy, sdram_controller_type, sdram_module.geom_settings, sdram_module.timing_settings)