cpld_cap1 = myelin_kicad_pcb.C0805("100n", "3V3", "GND", ref="C1", handsoldering=False) cpld_cap2 = myelin_kicad_pcb.C0805("100n", "3V3", "GND", ref="C2", handsoldering=False) cpld_cap3 = myelin_kicad_pcb.C0805("1u", "3V3", "GND", ref="C3", handsoldering=False) myelin_kicad_pcb.update_xilinx_constraints( cpld, os.path.join(here, "../cpld/constraints.ucf")) regulator = myelin_kicad_pcb.Component( footprint="TO_SOT_Packages_SMD:SOT-89-3", identifier="U1", # TODO(r2) rename to REG value="MCP1700T-3302E/MB", pins=[ Pin(2, "VIN", ["5V"]), Pin(3, "VOUT", ["3V3"]), Pin(1, "GND", ["GND"]), ], ) reg_in_cap = myelin_kicad_pcb.C0805("1u", "GND", "5V", ref="C4") reg_out_cap = myelin_kicad_pcb.C0805("1u", "3V3", "GND", ref="C5") # TODO(r2) explain the purpose of PIPWR and FX2PWR; note that neither should
Pin("N9", "", "flash0_DQ6"), Pin("N10", "TMS", "cpld_TMS"), Pin("N11", "", "flash0_DQ4"), Pin("N12", "", "flash1_DQ13"), Pin("N13", "VCCIO", "3V3"), ], ) # This chip has a ton of power pins! Add a ton of capacitors. cpld_caps = [ myelin_kicad_pcb.C0805("100n", "3V3", "GND", ref="CC%d" % n) for n in range(2) ] + [ myelin_kicad_pcb.C0402("100n", "3V3", "GND", ref="CC%d" % n) for n in range(2, 10) ] myelin_kicad_pcb.update_xilinx_constraints( cpld, os.path.join(here, PATH_TO_CPLD, "constraints.ucf")) myelin_kicad_pcb.check_xc9500xl_pinout(cpld, os.path.join(here, PATH_TO_CPLD), PROJECT_NAME) # Diode and rectifier calculations: # - CPLD uses max 250mA, realistically 60-120mA. # - MCU uses max 10mA # - flash uses max 60mA during erase and 80mA during powerup (so 120-160 mA) # So 190-290 mA for the whole board. # 1A diode: Diode_SMD:D_SMA package for S1ATR diode -- https://www.digikey.com/product-detail/en/S1ATR/1655-1502-1-ND/6022947/?itemSeq=278232946 diodes = [ myelin_kicad_pcb.Component( footprint="Diode_SMD:D_SMA", identifier="D?", value="S1ATR",