def test_full_bus_with_integration(self): sm = som.SOM() sm.initialize_root() root = sm.get_root() peripheral = sm.insert_bus() peripheral.set_name("peripheral") memory = sm.insert_bus() memory.set_name("memory") d1 = sdbc.create_device_record(name = "device 1", size = 0x100) d2 = sdbc.create_device_record(name = "device 2", size = 0x100) m1 = sdbc.create_device_record(name = "memory 1", size = 0x10000) m2 = sdbc.create_device_record(name = "memory 2", size = 0x20000) intr = sdbc.create_integration_record("Integration Data", vendor_id = 0x800BEAF15DEADC03, device_id = 0x00000000) peripheral.set_child_spacing(0x0100000000) sm.insert_component(peripheral, intr) sm.insert_component(peripheral, d1) sm.insert_component(peripheral, d2) sm.insert_component(memory, m1) sm.insert_component(memory, m2) rom = generate_rom_image(sm) rom_in = sdbc.convert_rom_to_32bit_buffer(rom) #rom_in = ROM2 #print_sdb_rom(rom_in) sm = parse_rom_image(rom_in) rom_out = generate_rom_image(sm) rom_out = sdbc.convert_rom_to_32bit_buffer(rom_out) #print_sdb_rom(rom_out) #compare_roms(rom_in, rom_out) self.assertEqual(rom_in, rom_out)
def test_full_bus_with_integration(self): sm = som.SOM() sm.initialize_root() root = sm.get_root() peripheral = sm.insert_bus() peripheral.set_name("peripheral") memory = sm.insert_bus() memory.set_name("memory") d1 = sdbc.create_device_record(name="device 1", size=0x100) d2 = sdbc.create_device_record(name="device 2", size=0x100) m1 = sdbc.create_device_record(name="memory 1", size=0x10000) m2 = sdbc.create_device_record(name="memory 2", size=0x20000) intr = sdbc.create_integration_record("Integration Data", vendor_id=0x800BEAF15DEADC03, device_id=0x00000000) peripheral.set_child_spacing(0x0100000000) sm.insert_component(peripheral, intr) sm.insert_component(peripheral, d1) sm.insert_component(peripheral, d2) sm.insert_component(memory, m1) sm.insert_component(memory, m2) rom = generate_rom_image(sm) rom_in = sdbc.convert_rom_to_32bit_buffer(rom) #rom_in = ROM2 #print_sdb_rom(rom_in) sm = parse_rom_image(rom_in) rom_out = generate_rom_image(sm) rom_out = sdbc.convert_rom_to_32bit_buffer(rom_out) #print_sdb_rom(rom_out) #compare_roms(rom_in, rom_out) self.assertEqual(rom_in, rom_out)
def test_generate_one_sub_bus_rom(self): self.som.initialize_root() root = self.som.get_root() bus = self.som.insert_bus() d = sdbc.create_device_record(name="device 1", size=0x100) self.som.insert_component(bus, d) rom = generate_rom_image(self.som)
def test_parse_large_rom(self): self.som.initialize_root() root = self.som.get_root() url = sdbc.create_repo_url_record("http://www.geocities.com") synthesis = sdbc.create_synthesis_record("Synthesis Name", 123, "cool tool", 1.0, "jeff") intr = sdbc.create_integration_record("Integration Data", vendor_id=0x800BEAF15DEADC03, device_id=0x00000000) peripheral = self.som.insert_bus() peripheral.set_name("peripheral") memory = self.som.insert_bus() memory.set_name("memory") self.som.insert_component(root, url) self.som.insert_component(root, synthesis) d1 = sdbc.create_device_record(name="device 1", size=0x100) d2 = sdbc.create_device_record(name="device 2", size=0x100) m1 = sdbc.create_device_record(name="memory 1", size=0x10000) m2 = sdbc.create_device_record(name="memory 2", size=0x20000) peripheral.set_child_spacing(0x0100000000) self.som.insert_component(peripheral, d1) self.som.insert_component(peripheral, d2) self.som.insert_component(peripheral, intr) self.som.insert_component(memory, m1) self.som.insert_component(memory, m2) rom = generate_rom_image(self.som)
def test_generate_one_sub_bus_rom(self): self.som.initialize_root() root = self.som.get_root() bus = self.som.insert_bus() d = sdbc.create_device_record(name="device 1", size=0x100) self.som.insert_component(bus, d) rom = generate_rom_image(self.som)
def test_generate_simple_rom(self): self.som.initialize_root() root = self.som.get_root() d = sdbc.create_device_record(name="device 1", size=0x100) self.som.insert_component(root, d) rom = generate_rom_image(self.som) # rom = generate_rom_image(self.som) write_to_file(rom, "/home/cospan/sandbox/simple_rom.txt")
def test_generate_simple_rom(self): self.som.initialize_root() root = self.som.get_root() d = sdbc.create_device_record(name="device 1", size=0x100) self.som.insert_component(root, d) rom = generate_rom_image(self.som) #rom = generate_rom_image(self.som) write_to_file(rom, "/home/cospan/sandbox/simple_rom.txt")
def test_generate_one_sub_bus_integration_record(self): self.som.initialize_root() root = self.som.get_root() bus = self.som.insert_bus() intr = sdbc.create_integration_record("Integration Data", vendor_id=0x800BEAF15DEADC03, device_id=0x00000000) d = sdbc.create_device_record(name="device 1", size=0x100) self.som.insert_component(bus, d) self.som.insert_component(bus, intr) rom = generate_rom_image(self.som)
def test_generate_one_sub_bus_with_url(self): rom_in = ROMD #print_sdb(rom) sm = parse_rom_image(rom_in) rom_out = generate_rom_image(sm) rom_out = sdbc.convert_rom_to_32bit_buffer(rom_out) print_sdb_rom(rom_out) #compare_roms(rom_in, rom_out) self.assertEqual(rom_in, rom_out)
def test_generate_one_sub_bus_with_url(self): rom_in = ROMD #print_sdb(rom) sm = parse_rom_image(rom_in) rom_out = generate_rom_image(sm) rom_out = sdbc.convert_rom_to_32bit_buffer(rom_out) print_sdb_rom(rom_out) #compare_roms(rom_in, rom_out) self.assertEqual(rom_in, rom_out)
def test_generate_one_sub_bus_with_url(self): self.som.initialize_root() root = self.som.get_root() bus = self.som.insert_bus() url = sdbc.create_repo_url_record("http://www.geocities.com") d = sdbc.create_device_record(name="device 1", size=0x100) self.som.insert_component(bus, d) self.som.insert_component(root, url) rom = generate_rom_image(self.som)
def test_generate_one_sub_bus_with_url(self): self.som.initialize_root() root = self.som.get_root() bus = self.som.insert_bus() url = sdbc.create_repo_url_record("http://www.geocities.com") d = sdbc.create_device_record(name="device 1", size=0x100) self.som.insert_component(bus, d) self.som.insert_component(root, url) rom = generate_rom_image(self.som)
def test_generate_one_sub_bus_with_synthesis(self): self.som.initialize_root() root = self.som.get_root() bus = self.som.insert_bus() url = sdbc.create_repo_url_record("http://www.geocities.com") synthesis = sdbc.create_synthesis_record("Synthesis Name", 123, "cool tool", 1.0, "jeff") d = sdbc.create_device_record(name="device 1", size=0x100) self.som.insert_component(bus, d) self.som.insert_component(root, synthesis) rom = generate_rom_image(self.som)
def test_generate_one_sub_bus_with_synthesis(self): self.som.initialize_root() root = self.som.get_root() bus = self.som.insert_bus() url = sdbc.create_repo_url_record("http://www.geocities.com") synthesis = sdbc.create_synthesis_record("Synthesis Name", 123, "cool tool", 1.0, "jeff") d = sdbc.create_device_record(name="device 1", size=0x100) self.som.insert_component(bus, d) self.som.insert_component(root, synthesis) rom = generate_rom_image(self.som)
def test_generate_one_sub_bus_integration_record(self): self.som.initialize_root() root = self.som.get_root() bus = self.som.insert_bus() intr = sdbc.create_integration_record("Integration Data", vendor_id=0x800BEAF15DEADC03, device_id=0x00000000) d = sdbc.create_device_record(name="device 1", size=0x100) self.som.insert_component(bus, d) self.som.insert_component(bus, intr) rom = generate_rom_image(self.som)
def test_generate_one_sub_bus_with_url(self): sm = som.SOM() sm.initialize_root() root = sm.get_root() peripheral = sm.insert_bus() peripheral.set_name("peripheral") memory = sm.insert_bus() memory.set_name("memory") d1 = sdbc.create_device_record(name="device 1", size=0x100) d2 = sdbc.create_device_record(name="device 2", size=0x100) m1 = sdbc.create_device_record(name="memory 1", size=0x10000) m2 = sdbc.create_device_record(name="memory 2", size=0x20000) intr = sdbc.create_integration_record("Integration Data", vendor_id=0x800BEAF15DEADC03, device_id=0x00000000) url = sdbc.create_repo_url_record("http://www.geocities.com") synthesis = sdbc.create_synthesis_record("Synthesis Name", 123, "cool tool", 1.0, "jeff") sm.insert_component(root, url) sm.insert_component(root, synthesis) peripheral.set_child_spacing(0x0100000000) sm.insert_component(peripheral, intr) sm.insert_component(peripheral, d1) sm.insert_component(peripheral, d2) sm.insert_component(memory, m1) sm.insert_component(memory, m2) rom = generate_rom_image(sm) rom_in = sdbc.convert_rom_to_32bit_buffer(rom) #print_sdb(rom) sm = parse_rom_image(rom_in) rom_out = generate_rom_image(sm) rom_out = sdbc.convert_rom_to_32bit_buffer(rom_out) #print_sdb_rom(rom_out) #compare_roms(rom_in, rom_out) self.assertEqual(rom_in, rom_out)
def test_generate_one_sub_bus_with_url(self): sm = som.SOM() sm.initialize_root() root = sm.get_root() peripheral = sm.insert_bus() peripheral.set_name("peripheral") memory = sm.insert_bus() memory.set_name("memory") d1 = sdbc.create_device_record(name = "device 1", size = 0x100) d2 = sdbc.create_device_record(name = "device 2", size = 0x100) m1 = sdbc.create_device_record(name = "memory 1", size = 0x10000) m2 = sdbc.create_device_record(name = "memory 2", size = 0x20000) intr = sdbc.create_integration_record("Integration Data", vendor_id = 0x800BEAF15DEADC03, device_id = 0x00000000) url = sdbc.create_repo_url_record("http://www.geocities.com") synthesis = sdbc.create_synthesis_record("Synthesis Name", 123, "cool tool", 1.0, "jeff") sm.insert_component(root, url) sm.insert_component(root, synthesis) peripheral.set_child_spacing(0x0100000000) sm.insert_component(peripheral, intr) sm.insert_component(peripheral, d1) sm.insert_component(peripheral, d2) sm.insert_component(memory, m1) sm.insert_component(memory, m2) rom = generate_rom_image(sm) rom_in = sdbc.convert_rom_to_32bit_buffer(rom) #print_sdb(rom) sm = parse_rom_image(rom_in) rom_out = generate_rom_image(sm) rom_out = sdbc.convert_rom_to_32bit_buffer(rom_out) #print_sdb_rom(rom_out) #compare_roms(rom_in, rom_out) self.assertEqual(rom_in, rom_out)
def test_generate_two_sub_buses(self): self.som.initialize_root() root = self.som.get_root() peripheral = self.som.insert_bus() peripheral.set_name("peripheral") memory = self.som.insert_bus() memory.set_name("memory") d1 = sdbc.create_device_record(name="device 1", size=0x100) d2 = sdbc.create_device_record(name="device 2", size=0x100) m1 = sdbc.create_device_record(name="memory 1", size=0x10000) m2 = sdbc.create_device_record(name="memory 2", size=0x20000) peripheral.set_child_spacing(0x0100000000) self.som.insert_component(peripheral, d1) self.som.insert_component(peripheral, d2) self.som.insert_component(memory, m1) self.som.insert_component(memory, m2) rom = generate_rom_image(self.som) write_to_file(rom, "/home/cospan/sandbox/two_bus_rom.txt")
def test_generate_two_sub_buses(self): self.som.initialize_root() root = self.som.get_root() peripheral = self.som.insert_bus() peripheral.set_name("peripheral") memory = self.som.insert_bus() memory.set_name("memory") d1 = sdbc.create_device_record(name="device 1", size=0x100) d2 = sdbc.create_device_record(name="device 2", size=0x100) m1 = sdbc.create_device_record(name="memory 1", size=0x10000) m2 = sdbc.create_device_record(name="memory 2", size=0x20000) peripheral.set_child_spacing(0x0100000000) self.som.insert_component(peripheral, d1) self.som.insert_component(peripheral, d2) self.som.insert_component(memory, m1) self.som.insert_component(memory, m2) rom = generate_rom_image(self.som) write_to_file(rom, "/home/cospan/sandbox/two_bus_rom.txt")
def test_parse_large_rom(self): self.som.initialize_root() root = self.som.get_root() url = sdbc.create_repo_url_record("http://www.geocities.com") synthesis = sdbc.create_synthesis_record("Synthesis Name", 123, "cool tool", 1.0, "jeff") intr = sdbc.create_integration_record("Integration Data", vendor_id=0x800BEAF15DEADC03, device_id=0x00000000) peripheral = self.som.insert_bus() peripheral.set_name("peripheral") memory = self.som.insert_bus() memory.set_name("memory") self.som.insert_component(root, url) self.som.insert_component(root, synthesis) d1 = sdbc.create_device_record(name="device 1", size=0x100) d2 = sdbc.create_device_record(name="device 2", size=0x100) m1 = sdbc.create_device_record(name="memory 1", size=0x10000) m2 = sdbc.create_device_record(name="memory 2", size=0x20000) peripheral.set_child_spacing(0x0100000000) self.som.insert_component(peripheral, d1) self.som.insert_component(peripheral, d2) self.som.insert_component(peripheral, intr) self.som.insert_component(memory, m1) self.som.insert_component(memory, m2) rom = generate_rom_image(self.som)
def gen_rom(self, tags = {}, buf = "", user_paths = [], debug = False): sm = self.gen_som(tags, buf, user_paths, debug) rom = srg.generate_rom_image(sm) return rom
def gen_rom(self, tags={}, buf="", user_paths=[], debug=False): sm = self.gen_som(tags, buf, user_paths, debug) rom = srg.generate_rom_image(sm) return rom