def test_dehdlcifyToZero(): log.debug("\n---------- test_dehdlcifyToZero") hdlc = OpenHdlc.OpenHdlc() # frame frame = [0x53,0x11,0x22,0x33,0x44,0x55,0x66,0x77,0x88,0x99,0xaa] frame = ''.join([chr(b) for b in frame]) log.debug("frame: {0}".format(u.formatBuf(frame))) # hdlcify frame = hdlc.hdlcify(frame) log.debug("hdlcify: {0}".format(u.formatBuf(frame))) # remove flags frame = frame[1:-1] log.debug("no flags: {0}".format(u.formatBuf(frame))) # calculate CRC crcini = 0xffff crc = crcini for c in frame: tmp = crc^(ord(c)) crc = (crc>> 8)^hdlc.FCS16TAB[(tmp & 0xff)] log.debug("after {0}, crc={1}".format(hex(ord(c)),hex(crc)))
def test_dehdlcifyToZero(): log.debug("\n---------- test_dehdlcifyToZero") hdlc = OpenHdlc.OpenHdlc() # frame frame = [0x53, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88, 0x99, 0xaa] frame = ''.join([chr(b) for b in frame]) log.debug("frame: {0}".format(u.formatBuf(frame))) # hdlcify frame = hdlc.hdlcify(frame) log.debug("hdlcify: {0}".format(u.formatBuf(frame))) # remove flags frame = frame[1:-1] log.debug("no flags: {0}".format(u.formatBuf(frame))) # calculate CRC crcini = 0xffff crc = crcini for c in frame: tmp = crc ^ (ord(c)) crc = (crc >> 8) ^ hdlc.FCS16TAB[(tmp & 0xff)] log.debug("after {0}, crc={1}".format(hex(ord(c)), hex(crc)))
def test_randdomBackAndForth(randomFrame): log.debug("\n---------- test_randdomBackAndForth") hdlc = OpenHdlc.OpenHdlc() log.debug("randomFrame: {0}".format(u.formatBuf(randomFrame))) # hdlcify frameHdlcified = hdlc.hdlcify(randomFrame) log.debug("hdlcified: {0}".format(u.formatBuf(frameHdlcified))) # dehdlcify frameDehdlcified = hdlc.dehdlcify(frameHdlcified) log.debug("dehdlcified: {0}".format(u.formatBuf(frameDehdlcified))) assert frameDehdlcified==randomFrame
def test_randdomBackAndForth(randomFrame): log.debug("\n---------- test_randdomBackAndForth") hdlc = OpenHdlc.OpenHdlc() log.debug("randomFrame: {0}".format(u.formatBuf(randomFrame))) # hdlcify frameHdlcified = hdlc.hdlcify(randomFrame) log.debug("hdlcified: {0}".format(u.formatBuf(frameHdlcified))) # dehdlcify frameDehdlcified = hdlc.dehdlcify(frameHdlcified) log.debug("dehdlcified: {0}".format(u.formatBuf(frameDehdlcified))) assert frameDehdlcified == randomFrame
def test_buildRequestFrame(): log.debug("\n---------- test_buildRequestFrame") hdlc = OpenHdlc.OpenHdlc() # hdlcify frameHdlcified = hdlc.hdlcify('\x53') log.debug("request frame: {0}".format(u.formatBuf(frameHdlcified)))
def dehdlcify(self, inBuf): ''' \brief Parse an hdlc frame. \returns the extracted frame, or -1 if wrong checksum ''' assert inBuf[0] == self.HDLC_FLAG assert inBuf[-1] == self.HDLC_FLAG # make copy of input outBuf = inBuf[:] log.debug("got {0}".format(u.formatBuf(outBuf))) # remove flags outBuf = outBuf[1:-1] log.debug("after flags: {0}".format(u.formatBuf(outBuf))) # unstuff outBuf = outBuf.replace(self.HDLC_ESCAPE + self.HDLC_FLAG_ESCAPED, self.HDLC_FLAG) outBuf = outBuf.replace(self.HDLC_ESCAPE + self.HDLC_ESCAPE_ESCAPED, self.HDLC_ESCAPE) log.debug("after unstuff: {0}".format(u.formatBuf(outBuf))) if len(outBuf) < 2: raise HdlcException('packet too short') # check CRC crc = self.HDLC_CRCINIT for b in outBuf: crc = self._crcIteration(crc, b) if crc != self.HDLC_CRCGOOD: raise HdlcException('wrong CRC') # remove CRC outBuf = outBuf[:-2] # remove CRC log.debug("after CRC: {0}".format(u.formatBuf(outBuf))) return outBuf
def send(self, data): # frame with HDLC hdlcData = self.hdlc.hdlcify(data) # add to outputBuf with self.outputBufLock: self.outputBuf += [hdlcData] # log log.debug('added {0} bytes to outputBuf: {1}'.format( len(hdlcData), u.formatBuf(hdlcData), ))
def dehdlcify(self,inBuf): ''' \brief Parse an hdlc frame. \returns the extracted frame, or -1 if wrong checksum ''' assert inBuf[ 0]==self.HDLC_FLAG assert inBuf[-1]==self.HDLC_FLAG # make copy of input outBuf = inBuf[:] log.debug("got {0}".format(u.formatBuf(outBuf))) # remove flags outBuf = outBuf[1:-1] log.debug("after flags: {0}".format(u.formatBuf(outBuf))) # unstuff outBuf = outBuf.replace(self.HDLC_ESCAPE+self.HDLC_FLAG_ESCAPED, self.HDLC_FLAG) outBuf = outBuf.replace(self.HDLC_ESCAPE+self.HDLC_ESCAPE_ESCAPED, self.HDLC_ESCAPE) log.debug("after unstuff: {0}".format(u.formatBuf(outBuf))) if len(outBuf)<2: raise HdlcException('packet too short') # check CRC crc = self.HDLC_CRCINIT for b in outBuf: crc = self._crcIteration(crc,b) if crc!=self.HDLC_CRCGOOD: raise HdlcException('wrong CRC') # remove CRC outBuf = outBuf[:-2] # remove CRC log.debug("after CRC: {0}".format(u.formatBuf(outBuf))) return outBuf
def send(self,data): # frame with HDLC hdlcData = self.hdlc.hdlcify(data) # add to outputBuf with self.outputBufLock: self.outputBuf += [hdlcData] # log log.debug('added {0} bytes to outputBuf: {1}'.format( len(hdlcData), u.formatBuf(hdlcData), ) ) #======================== private =========================================
def run(self): # log log.debug("start running") while True: # open serial port log.debug("open serial port {0}@{1}".format(self.serialportName,self.serialportBaudrate)) self.serial = serial.Serial(self.serialportName,self.serialportBaudrate) while True: # read bytes from serial port try: rxByte = self.serial.read(1) except Exception as err: log.warning(err) time.sleep(1) break else: #log.debug("received {0} ({1})".format(rxByte,hex(ord(rxByte)))) if ( (not self.busyReceiving) and self.lastRxByte==self.hdlc.HDLC_FLAG and rxByte!=self.hdlc.HDLC_FLAG ): # start of frame self.busyReceiving = True self.inputBuf = self.hdlc.HDLC_FLAG self.inputBuf += rxByte elif ( self.busyReceiving and rxByte!=self.hdlc.HDLC_FLAG ): # middle of frame self.inputBuf += rxByte elif ( self.busyReceiving and rxByte==self.hdlc.HDLC_FLAG ): # end of frame self.busyReceiving = False self.inputBuf += rxByte try: self.inputBuf = self.hdlc.dehdlcify(self.inputBuf) except OpenHdlc.HdlcException as err: log.warning('invalid serial frame: {0}'.format(err)) else: if self.inputBuf==chr(OpenParser.OpenParser.SERFRAME_MOTE2PC_REQUEST): with self.outputBufLock: if self.outputBuf: outputToWrite = self.outputBuf.pop(0) self.serial.write(outputToWrite) log.debug('sent {0} bytes over serial: {1}'.format( len(outputToWrite), u.formatBuf(outputToWrite), ) ) else: # dispatch dispatcher.send( signal = 'bytesFromSerialPort'+self.serialportName, data = self.inputBuf[:], ) self.lastRxByte = rxByte
def run(self): # log log.debug("start running") while True: # open serial port log.debug("open serial port {0}@{1}".format( self.serialportName, self.serialportBaudrate)) self.serial = serial.Serial(self.serialportName, self.serialportBaudrate) while True: # read bytes from serial port try: rxByte = self.serial.read(1) except Exception as err: log.warning(err) time.sleep(1) break else: #log.debug("received {0} ({1})".format(rxByte,hex(ord(rxByte)))) if ((not self.busyReceiving) and self.lastRxByte == self.hdlc.HDLC_FLAG and rxByte != self.hdlc.HDLC_FLAG): # start of frame self.busyReceiving = True self.inputBuf = self.hdlc.HDLC_FLAG self.inputBuf += rxByte elif (self.busyReceiving and rxByte != self.hdlc.HDLC_FLAG): # middle of frame self.inputBuf += rxByte elif (self.busyReceiving and rxByte == self.hdlc.HDLC_FLAG): # end of frame self.busyReceiving = False self.inputBuf += rxByte try: self.inputBuf = self.hdlc.dehdlcify(self.inputBuf) except OpenHdlc.HdlcException as err: log.warning( 'invalid serial frame: {0}'.format(err)) else: if self.inputBuf == chr(OpenParser.OpenParser. SERFRAME_MOTE2PC_REQUEST): with self.outputBufLock: if self.outputBuf: outputToWrite = self.outputBuf.pop(0) self.serial.write(outputToWrite) log.debug( 'sent {0} bytes over serial: {1}' .format( len(outputToWrite), u.formatBuf(outputToWrite), )) else: # dispatch dispatcher.send( signal='bytesFromSerialPort' + self.serialportName, data=self.inputBuf[:], ) self.lastRxByte = rxByte