def _allocate_key_for_partition(self, partition, vertex, placements, n_keys_map): """ :param AbstractSingleSourcePartition partition: :param MachineVertex vertex: :param Placements placements: :param AbstractMachinePartitionNKeysMap n_keys_map: :rtype: PartitionRoutingInfo :raises PacmanRouteInfoAllocationException: """ n_keys = n_keys_map.n_keys_for_partition(partition) if n_keys > MAX_KEYS_SUPPORTED: raise PacmanRouteInfoAllocationException( "This routing info allocator can only support up to {} keys " "for any given edge; cannot therefore allocate keys to {}, " "which is requesting {} keys".format(MAX_KEYS_SUPPORTED, partition, n_keys)) placement = placements.get_placement_of_vertex(vertex) if placement is None: raise PacmanRouteInfoAllocationException( "The vertex '{}' has no placement".format(vertex)) keys_and_masks = list([ BaseKeyAndMask(base_key=self._get_key_from_placement(placement), mask=MASK) ]) return PartitionRoutingInfo(keys_and_masks, partition)
def _update_routing_objects(keys_and_masks, routing_infos, group): """ :param iterable(BaseKeyAndMask) keys_and_masks: :param RoutingInfo routing_infos: :param ConstraintGroup group: """ # Allocate the routing information partition_info = PartitionRoutingInfo(keys_and_masks, group) routing_infos.add_partition_info(partition_info)
def _update_routing_objects(keys_and_masks, routing_infos, partition): """ :param iterable(BaseKeyAndMask) keys_and_masks: :param RoutingInfo routing_infos: :param AbstractSingleSourcePartition partition: """ # Allocate the routing information partition_info = PartitionRoutingInfo(keys_and_masks, partition) routing_infos.add_partition_info(partition_info)
def _allocate_partition_route(self, edge, placements, graph, n_keys_map): destination = edge.post_vertex placement = placements.get_placement_of_vertex(destination) keys_and_masks = list([ BaseKeyAndMask(base_key=self._get_key_from_placement(placement), mask=self.MASK) ]) partition = graph.get_outgoing_edge_partition_starting_at_vertex( edge.pre_vertex) n_keys = n_keys_map.n_keys_for_partition(partition) if n_keys > self.MAX_KEYS_SUPPORTED: raise PacmanConfigurationException( "Only edges which require less than {} keys are" " supported".format(self.MAX_KEYS_SUPPORTED)) return PartitionRoutingInfo(keys_and_masks, edge)
def __allocate(self): multicast_partitions = self.__machine_graph.multicast_partitions progress = ProgressBar(len(multicast_partitions), "Allocating routing keys") routing_infos = RoutingInfo() app_part_index = 0 for app_id in progress.over(multicast_partitions): while app_part_index in self.__fixed_used: app_part_index += 1 for partition_name, paritition_vertices in \ multicast_partitions[app_id].items(): # convert set to a list and sort by slice machine_vertices = list(paritition_vertices) machine_vertices.sort(key=lambda x: x.vertex_slice.lo_atom) n_bits_atoms = self.__atom_bits_per_app_part[(app_id, partition_name)] if self.__flexible: n_bits_machine = self.__n_bits_atoms_and_mac - n_bits_atoms else: if n_bits_atoms <= self.__n_bits_atoms: # Ok it fits use global sizes n_bits_atoms = self.__n_bits_atoms n_bits_machine = self.__n_bits_machine else: # Nope need more bits! Use the flexible approach here n_bits_machine = \ self.__n_bits_atoms_and_mac - n_bits_atoms for machine_index, vertex in enumerate(machine_vertices): partition = self.__machine_graph.\ get_outgoing_edge_partition_starting_at_vertex( vertex, partition_name) if partition in self.__fixed_partitions: # Ignore zone calculations and just use fixed keys_and_masks = self.__fixed_partitions[partition] else: mask = self.__mask(n_bits_atoms) key = app_part_index key = (key << n_bits_machine) | machine_index key = key << n_bits_atoms keys_and_masks = [ BaseKeyAndMask(base_key=key, mask=mask) ] routing_infos.add_partition_info( PartitionRoutingInfo(keys_and_masks, partition)) app_part_index += 1 return routing_infos
def _construct_routing_info(machine_graph, outgoing_partition_key_spaces): """ wrap a nengo bit field key space in a NengoBaseKeysAndMasks object. so that it can get the keys when requested :param machine_graph: the machine graph :param outgoing_partition_key_spaces: :return: """ routing_infos = RoutingInfo() for outgoing_partition in machine_graph.outgoing_edge_partitions: if outgoing_partition.traffic_type == EdgeTrafficType.MULTICAST: keys_and_masks = list([NengoBaseKeysAndMasks( outgoing_partition_key_spaces[outgoing_partition])]) routing_infos.add_partition_info( PartitionRoutingInfo(keys_and_masks, outgoing_partition)) return routing_infos
def test_router_with_one_hop_route_all_default_link_5(self): self.placements = Placements() self.placement1 = Placement(x=0, y=2, p=2, vertex=self.vertex1) self.placement2 = Placement(x=0, y=0, p=2, vertex=self.vertex2) self.placements.add_placement(self.placement1) self.placements.add_placement(self.placement2) # sort out routing infos self.routing_info = RoutingInfo() self.edge_routing_info1 = PartitionRoutingInfo(key=2 << 11, mask=DEFAULT_MASK, edge=self.edge) self.routing_info.add_partition_info(self.edge_routing_info1) # create machine self.machine = VirtualMachine(10, 10, False) self.routing = BasicDijkstraRouting() self.routing.route(machine=self.machine, placements=self.placements, machine_graph=self.graph, routing_info_allocation=self.routing_info)
def test_routing_info(self): # mock to avoid having to create a graph for this test graph_code = 123 pre_vertex = SimpleMachineVertex(resources=ResourceContainer()) partition = MulticastEdgePartition(pre_vertex, "Test") partition.register_graph_code(graph_code) # This is a hack post_vertex = SimpleMachineVertex(resources=ResourceContainer()) edge = MachineEdge(pre_vertex, post_vertex) key = 12345 partition_info = PartitionRoutingInfo([BaseKeyAndMask(key, FULL_MASK)], partition) partition.add_edge(edge, graph_code) routing_info = RoutingInfo([partition_info]) with self.assertRaises(PacmanAlreadyExistsException): routing_info.add_partition_info(partition_info) assert routing_info.get_first_key_from_partition(partition) == key assert routing_info.get_first_key_from_partition(None) is None assert routing_info.get_routing_info_from_partition(partition) == \ partition_info assert routing_info.get_routing_info_from_partition(None) is None assert routing_info.get_routing_info_from_pre_vertex( pre_vertex, "Test") == partition_info assert routing_info.get_routing_info_from_pre_vertex( post_vertex, "Test") is None assert routing_info.get_routing_info_from_pre_vertex( pre_vertex, "None") is None assert routing_info.get_first_key_from_pre_vertex(pre_vertex, "Test") == key assert routing_info.get_first_key_from_pre_vertex(post_vertex, "Test") is None assert routing_info.get_first_key_from_pre_vertex(pre_vertex, "None") is None assert routing_info.get_routing_info_for_edge(edge) == partition_info assert routing_info.get_routing_info_for_edge(None) is None assert routing_info.get_first_key_for_edge(edge) == key assert routing_info.get_first_key_for_edge(None) is None assert next(iter(routing_info)) == partition_info partition2 = MulticastEdgePartition(pre_vertex, "Test") partition2.register_graph_code(graph_code) # This is a hack partition2.add_edge(MachineEdge(pre_vertex, post_vertex), graph_code) with self.assertRaises(PacmanAlreadyExistsException): routing_info.add_partition_info( PartitionRoutingInfo([BaseKeyAndMask(key, FULL_MASK)], partition2)) assert partition != partition2 partition3 = MulticastEdgePartition(pre_vertex, "Test2") partition3.register_graph_code(graph_code) # This is a hack partition3.add_edge(MachineEdge(pre_vertex, post_vertex), graph_code) routing_info.add_partition_info( PartitionRoutingInfo([BaseKeyAndMask(key, FULL_MASK)], partition3)) assert routing_info.get_routing_info_from_partition(partition) != \ routing_info.get_routing_info_from_partition(partition3) assert partition != partition3 assert routing_info.get_routing_info_from_partition( partition3).get_keys().tolist() == [key] partition4 = MulticastEdgePartition(pre_vertex, "Test4") partition4.register_graph_code(graph_code) # This is a hack partition4.add_edge(MachineEdge(pre_vertex, post_vertex), graph_code) routing_info.add_partition_info( PartitionRoutingInfo([ BaseKeyAndMask(key, FULL_MASK), BaseKeyAndMask(key * 2, FULL_MASK) ], partition4)) assert routing_info.get_routing_info_from_partition( partition4).get_keys().tolist() == [key, key * 2]
def test_write_synaptic_matrix_and_master_population_table(self): MockSimulator.setup() default_config_paths = os.path.join( os.path.dirname(abstract_spinnaker_common.__file__), AbstractSpiNNakerCommon.CONFIG_FILE_NAME) config = conf_loader.load_config( AbstractSpiNNakerCommon.CONFIG_FILE_NAME, default_config_paths) config.set("Simulation", "one_to_one_connection_dtcm_max_bytes", 40) machine_time_step = 1000.0 pre_app_vertex = SimpleApplicationVertex(10) pre_vertex = SimpleMachineVertex(resources=None) pre_vertex_slice = Slice(0, 9) post_app_vertex = SimpleApplicationVertex(10) post_vertex = SimpleMachineVertex(resources=None) post_vertex_slice = Slice(0, 9) post_slice_index = 0 one_to_one_connector_1 = OneToOneConnector(None) one_to_one_connector_1.set_projection_information( pre_app_vertex, post_app_vertex, None, machine_time_step) one_to_one_connector_1.set_weights_and_delays(1.5, 1.0) one_to_one_connector_2 = OneToOneConnector(None) one_to_one_connector_2.set_projection_information( pre_app_vertex, post_app_vertex, None, machine_time_step) one_to_one_connector_2.set_weights_and_delays(2.5, 2.0) all_to_all_connector = AllToAllConnector(None) all_to_all_connector.set_projection_information( pre_app_vertex, post_app_vertex, None, machine_time_step) all_to_all_connector.set_weights_and_delays(4.5, 4.0) direct_synapse_information_1 = SynapseInformation( one_to_one_connector_1, SynapseDynamicsStatic(), 0) direct_synapse_information_2 = SynapseInformation( one_to_one_connector_2, SynapseDynamicsStatic(), 1) all_to_all_synapse_information = SynapseInformation( all_to_all_connector, SynapseDynamicsStatic(), 0) app_edge = ProjectionApplicationEdge(pre_app_vertex, post_app_vertex, direct_synapse_information_1) app_edge.add_synapse_information(direct_synapse_information_2) app_edge.add_synapse_information(all_to_all_synapse_information) machine_edge = ProjectionMachineEdge(app_edge.synapse_information, pre_vertex, post_vertex) partition_name = "TestPartition" graph = MachineGraph("Test") graph.add_vertex(pre_vertex) graph.add_vertex(post_vertex) graph.add_edge(machine_edge, partition_name) graph_mapper = GraphMapper() graph_mapper.add_vertex_mapping(pre_vertex, pre_vertex_slice, pre_app_vertex) graph_mapper.add_vertex_mapping(post_vertex, post_vertex_slice, post_app_vertex) graph_mapper.add_edge_mapping(machine_edge, app_edge) weight_scales = [4096.0, 4096.0] key = 0 routing_info = RoutingInfo() routing_info.add_partition_info( PartitionRoutingInfo( [BaseKeyAndMask(key, 0xFFFFFFF0)], graph.get_outgoing_edge_partition_starting_at_vertex( pre_vertex, partition_name))) temp_spec = tempfile.mktemp() spec_writer = FileDataWriter(temp_spec) spec = DataSpecificationGenerator(spec_writer, None) master_pop_sz = 1000 master_pop_region = 0 all_syn_block_sz = 2000 synapse_region = 1 spec.reserve_memory_region(master_pop_region, master_pop_sz) spec.reserve_memory_region(synapse_region, all_syn_block_sz) synapse_type = MockSynapseType() synaptic_manager = SynapticManager(synapse_type=synapse_type, ring_buffer_sigma=5.0, spikes_per_second=100.0, config=config) synaptic_manager._write_synaptic_matrix_and_master_population_table( spec, [post_vertex_slice], post_slice_index, post_vertex, post_vertex_slice, all_syn_block_sz, weight_scales, master_pop_region, synapse_region, routing_info, graph_mapper, graph, machine_time_step) spec.end_specification() spec_writer.close() spec_reader = FileDataReader(temp_spec) executor = DataSpecificationExecutor(spec_reader, master_pop_sz + all_syn_block_sz) executor.execute() master_pop_table = executor.get_region(0) synaptic_matrix = executor.get_region(1) all_data = bytearray() all_data.extend( master_pop_table.region_data[:master_pop_table.max_write_pointer]) all_data.extend( synaptic_matrix.region_data[:synaptic_matrix.max_write_pointer]) master_pop_table_address = 0 synaptic_matrix_address = master_pop_table.max_write_pointer direct_synapses_address = struct.unpack_from( "<I", synaptic_matrix.region_data)[0] direct_synapses_address += synaptic_matrix_address + 8 indirect_synapses_address = synaptic_matrix_address + 4 placement = Placement(None, 0, 0, 1) transceiver = MockTransceiverRawData(all_data) # Get the master population table details items = synaptic_manager._poptable_type\ .extract_synaptic_matrix_data_location( key, master_pop_table_address, transceiver, placement.x, placement.y) # The first entry should be direct, but the rest should be indirect; # the second is potentially direct, but has been restricted by the # restriction on the size of the direct matrix assert len(items) == 3 # TODO: This has been changed because direct matrices are disabled! assert not items[0][2] assert not items[1][2] assert not items[2][2] data_1, row_len_1 = synaptic_manager._retrieve_synaptic_block( transceiver=transceiver, placement=placement, master_pop_table_address=master_pop_table_address, indirect_synapses_address=indirect_synapses_address, direct_synapses_address=direct_synapses_address, key=key, n_rows=pre_vertex_slice.n_atoms, index=0, using_extra_monitor_cores=False) connections_1 = synaptic_manager._synapse_io.read_synapses( direct_synapse_information_1, pre_vertex_slice, post_vertex_slice, row_len_1, 0, 2, weight_scales, data_1, None, app_edge.n_delay_stages, machine_time_step) # The first matrix is a 1-1 matrix, so row length is 1 assert row_len_1 == 1 # Check that all the connections have the right weight and delay assert len(connections_1) == post_vertex_slice.n_atoms assert all([conn["weight"] == 1.5 for conn in connections_1]) assert all([conn["delay"] == 1.0 for conn in connections_1]) data_2, row_len_2 = synaptic_manager._retrieve_synaptic_block( transceiver=transceiver, placement=placement, master_pop_table_address=master_pop_table_address, indirect_synapses_address=indirect_synapses_address, direct_synapses_address=direct_synapses_address, key=key, n_rows=pre_vertex_slice.n_atoms, index=1, using_extra_monitor_cores=False) connections_2 = synaptic_manager._synapse_io.read_synapses( direct_synapse_information_2, pre_vertex_slice, post_vertex_slice, row_len_2, 0, 2, weight_scales, data_2, None, app_edge.n_delay_stages, machine_time_step) # The second matrix is a 1-1 matrix, so row length is 1 assert row_len_2 == 1 # Check that all the connections have the right weight and delay assert len(connections_2) == post_vertex_slice.n_atoms assert all([conn["weight"] == 2.5 for conn in connections_2]) assert all([conn["delay"] == 2.0 for conn in connections_2]) data_3, row_len_3 = synaptic_manager._retrieve_synaptic_block( transceiver=transceiver, placement=placement, master_pop_table_address=master_pop_table_address, indirect_synapses_address=indirect_synapses_address, direct_synapses_address=direct_synapses_address, key=key, n_rows=pre_vertex_slice.n_atoms, index=2, using_extra_monitor_cores=False) connections_3 = synaptic_manager._synapse_io.read_synapses( all_to_all_synapse_information, pre_vertex_slice, post_vertex_slice, row_len_3, 0, 2, weight_scales, data_3, None, app_edge.n_delay_stages, machine_time_step) # The third matrix is an all-to-all matrix, so length is n_atoms assert row_len_3 == post_vertex_slice.n_atoms # Check that all the connections have the right weight and delay assert len(connections_3) == \ post_vertex_slice.n_atoms * pre_vertex_slice.n_atoms assert all([conn["weight"] == 4.5 for conn in connections_3]) assert all([conn["delay"] == 4.0 for conn in connections_3])
def _update_routing_objects(keys_and_masks, routing_infos, group): # Allocate the routing information partition_info = PartitionRoutingInfo(keys_and_masks, group) routing_infos.add_partition_info(partition_info)
def test_routing_info(self): partition = MachineOutgoingEdgePartition("Test") pre_vertex = SimpleMachineVertex(resources=ResourceContainer()) post_vertex = SimpleMachineVertex(resources=ResourceContainer()) edge = MachineEdge(pre_vertex, post_vertex) key = 12345 partition_info = PartitionRoutingInfo([BaseKeyAndMask(key, _32_BITS)], partition) partition.add_edge(edge) routing_info = RoutingInfo([partition_info]) with self.assertRaises(PacmanAlreadyExistsException): routing_info.add_partition_info(partition_info) assert routing_info.get_first_key_from_partition(partition) == key assert routing_info.get_first_key_from_partition(None) is None assert routing_info.get_routing_info_from_partition(partition) == \ partition_info assert routing_info.get_routing_info_from_partition(None) is None assert routing_info.get_routing_info_from_pre_vertex( pre_vertex, "Test") == partition_info assert routing_info.get_routing_info_from_pre_vertex( post_vertex, "Test") is None assert routing_info.get_routing_info_from_pre_vertex( pre_vertex, "None") is None assert routing_info.get_first_key_from_pre_vertex(pre_vertex, "Test") == key assert routing_info.get_first_key_from_pre_vertex(post_vertex, "Test") is None assert routing_info.get_first_key_from_pre_vertex(pre_vertex, "None") is None assert routing_info.get_routing_info_for_edge(edge) == partition_info assert routing_info.get_routing_info_for_edge(None) is None assert routing_info.get_first_key_for_edge(edge) == key assert routing_info.get_first_key_for_edge(None) is None assert next(iter(routing_info)) == partition_info partition2 = MachineOutgoingEdgePartition("Test") partition2.add_edge(MachineEdge(pre_vertex, post_vertex)) with self.assertRaises(PacmanAlreadyExistsException): routing_info.add_partition_info( PartitionRoutingInfo([BaseKeyAndMask(key, _32_BITS)], partition2)) assert partition != partition2 partition3 = MachineOutgoingEdgePartition("Test2") partition3.add_edge(MachineEdge(pre_vertex, post_vertex)) routing_info.add_partition_info( PartitionRoutingInfo([BaseKeyAndMask(key, _32_BITS)], partition3)) assert routing_info.get_routing_info_from_partition(partition) != \ routing_info.get_routing_info_from_partition(partition3) assert partition != partition3 assert routing_info.get_routing_info_from_partition( partition3).get_keys().tolist() == [key] partition3 = MachineOutgoingEdgePartition("Test3") partition3.add_edge(MachineEdge(pre_vertex, post_vertex)) routing_info.add_partition_info( PartitionRoutingInfo([ BaseKeyAndMask(key, _32_BITS), BaseKeyAndMask(key * 2, _32_BITS) ], partition3)) assert routing_info.get_routing_info_from_partition( partition3).get_keys().tolist() == [key, key * 2]
def test_write_synaptic_matrix_and_master_population_table(self): MockSimulator.setup() # Add an sdram so max SDRAM is high enough SDRAM(10000) # UGLY but the mock transceiver NEED generate_on_machine to be False AbstractGenerateConnectorOnMachine.generate_on_machine = self.say_false default_config_paths = os.path.join( os.path.dirname(abstract_spinnaker_common.__file__), AbstractSpiNNakerCommon.CONFIG_FILE_NAME) config = conf_loader.load_config( AbstractSpiNNakerCommon.CONFIG_FILE_NAME, default_config_paths) config.set("Simulation", "one_to_one_connection_dtcm_max_bytes", 40) machine_time_step = 1000.0 pre_app_vertex = SimpleApplicationVertex(10) pre_vertex_slice = Slice(0, 9) pre_vertex = pre_app_vertex.create_machine_vertex( pre_vertex_slice, None) post_app_vertex = SimpleApplicationVertex(10) post_vertex_slice = Slice(0, 9) post_vertex = post_app_vertex.create_machine_vertex( post_vertex_slice, None) post_slice_index = 0 one_to_one_connector_1 = OneToOneConnector(None) direct_synapse_information_1 = SynapseInformation( one_to_one_connector_1, pre_app_vertex, post_app_vertex, False, False, None, SynapseDynamicsStatic(), 0, 1.5, 1.0) one_to_one_connector_1.set_projection_information( machine_time_step, direct_synapse_information_1) one_to_one_connector_2 = OneToOneConnector(None) direct_synapse_information_2 = SynapseInformation( one_to_one_connector_2, pre_app_vertex, post_app_vertex, False, False, None, SynapseDynamicsStatic(), 1, 2.5, 2.0) one_to_one_connector_2.set_projection_information( machine_time_step, direct_synapse_information_2) all_to_all_connector = AllToAllConnector(None) all_to_all_synapse_information = SynapseInformation( all_to_all_connector, pre_app_vertex, post_app_vertex, False, False, None, SynapseDynamicsStatic(), 0, 4.5, 4.0) all_to_all_connector.set_projection_information( machine_time_step, all_to_all_synapse_information) app_edge = ProjectionApplicationEdge(pre_app_vertex, post_app_vertex, direct_synapse_information_1) app_edge.add_synapse_information(direct_synapse_information_2) app_edge.add_synapse_information(all_to_all_synapse_information) machine_edge = app_edge.create_machine_edge(pre_vertex, post_vertex, label=None) partition_name = "TestPartition" graph = MachineGraph("Test") graph.add_vertex(pre_vertex) graph.add_vertex(post_vertex) graph.add_edge(machine_edge, partition_name) weight_scales = [4096.0, 4096.0] key = 0 routing_info = RoutingInfo() routing_info.add_partition_info( PartitionRoutingInfo( [BaseKeyAndMask(key, 0xFFFFFFF0)], graph.get_outgoing_edge_partition_starting_at_vertex( pre_vertex, partition_name))) temp_spec = tempfile.mktemp() spec_writer = FileDataWriter(temp_spec) spec = DataSpecificationGenerator(spec_writer, None) master_pop_sz = 1000 all_syn_block_sz = 2000 master_pop_region = 0 synapse_region = 1 direct_region = 2 spec.reserve_memory_region(master_pop_region, master_pop_sz) spec.reserve_memory_region(synapse_region, all_syn_block_sz) synaptic_manager = SynapticManager(n_synapse_types=2, ring_buffer_sigma=5.0, spikes_per_second=100.0, config=config) # Poke in our testing region IDs synaptic_manager._pop_table_region = master_pop_region synaptic_manager._synaptic_matrix_region = synapse_region synaptic_manager._direct_matrix_region = direct_region synaptic_manager._write_synaptic_matrix_and_master_population_table( spec, [post_vertex_slice], post_slice_index, post_vertex, post_vertex_slice, all_syn_block_sz, weight_scales, routing_info, graph, machine_time_step) spec.end_specification() spec_writer.close() spec_reader = FileDataReader(temp_spec) executor = DataSpecificationExecutor(spec_reader, master_pop_sz + all_syn_block_sz) executor.execute() master_pop_table = executor.get_region(0) synaptic_matrix = executor.get_region(1) direct_matrix = executor.get_region(2) all_data = bytearray() all_data.extend( master_pop_table.region_data[:master_pop_table.max_write_pointer]) all_data.extend( synaptic_matrix.region_data[:synaptic_matrix.max_write_pointer]) all_data.extend( direct_matrix.region_data[:direct_matrix.max_write_pointer]) master_pop_table_address = 0 synaptic_matrix_address = master_pop_table.max_write_pointer direct_synapses_address = (synaptic_matrix_address + synaptic_matrix.max_write_pointer) direct_synapses_address += 4 indirect_synapses_address = synaptic_matrix_address placement = Placement(None, 0, 0, 1) transceiver = MockTransceiverRawData(all_data) # Get the master population table details items = synaptic_manager._extract_synaptic_matrix_data_location( key, master_pop_table_address, transceiver, placement) # The first entry should be direct, but the rest should be indirect; # the second is potentially direct, but has been restricted by the # restriction on the size of the direct matrix assert len(items) == 3 assert items[0][2] assert not items[1][2] assert not items[2][2] data_1, row_len_1 = synaptic_manager._retrieve_synaptic_block( txrx=transceiver, placement=placement, master_pop_table_address=master_pop_table_address, indirect_synapses_address=indirect_synapses_address, direct_synapses_address=direct_synapses_address, key=key, n_rows=pre_vertex_slice.n_atoms, index=0, using_monitors=False) connections_1 = synaptic_manager._read_synapses( direct_synapse_information_1, pre_vertex_slice, post_vertex_slice, row_len_1, 0, weight_scales, data_1, None, machine_time_step) # The first matrix is a 1-1 matrix, so row length is 1 assert row_len_1 == 1 # Check that all the connections have the right weight and delay assert len(connections_1) == post_vertex_slice.n_atoms assert all([conn["weight"] == 1.5 for conn in connections_1]) assert all([conn["delay"] == 1.0 for conn in connections_1]) data_2, row_len_2 = synaptic_manager._retrieve_synaptic_block( txrx=transceiver, placement=placement, master_pop_table_address=master_pop_table_address, indirect_synapses_address=indirect_synapses_address, direct_synapses_address=direct_synapses_address, key=key, n_rows=pre_vertex_slice.n_atoms, index=1, using_monitors=False) connections_2 = synaptic_manager._read_synapses( direct_synapse_information_2, pre_vertex_slice, post_vertex_slice, row_len_2, 0, weight_scales, data_2, None, machine_time_step) # The second matrix is a 1-1 matrix, so row length is 1 assert row_len_2 == 1 # Check that all the connections have the right weight and delay assert len(connections_2) == post_vertex_slice.n_atoms assert all([conn["weight"] == 2.5 for conn in connections_2]) assert all([conn["delay"] == 2.0 for conn in connections_2]) data_3, row_len_3 = synaptic_manager._retrieve_synaptic_block( txrx=transceiver, placement=placement, master_pop_table_address=master_pop_table_address, indirect_synapses_address=indirect_synapses_address, direct_synapses_address=direct_synapses_address, key=key, n_rows=pre_vertex_slice.n_atoms, index=2, using_monitors=False) connections_3 = synaptic_manager._read_synapses( all_to_all_synapse_information, pre_vertex_slice, post_vertex_slice, row_len_3, 0, weight_scales, data_3, None, machine_time_step) # The third matrix is an all-to-all matrix, so length is n_atoms assert row_len_3 == post_vertex_slice.n_atoms # Check that all the connections have the right weight and delay assert len(connections_3) == \ post_vertex_slice.n_atoms * pre_vertex_slice.n_atoms assert all([conn["weight"] == 4.5 for conn in connections_3]) assert all([conn["delay"] == 4.0 for conn in connections_3])