def test_socket_rand_cons():
skip_ifndef('SIM_SOCKET_TEST', 'RANDOM_TEST')
cnt = 5
cons = []
cons.append(randomize(t_din, 'din', eot_cons=['data_size == 20']))
cons.append(randomize(t_cfg, 'cfg', cons=['cfg < 20', 'cfg > 0']))
stim = []
stim.append(drv(t=t_din, seq=rand_seq('din', cnt)))
stim.append(drv(t=t_cfg, seq=rand_seq('cfg', cnt)))
verif(*stim,
f=chop(sim_cls=partial(SimSocket, run=True)),
ref=chop(name='ref_model'))
sim(extens=[partial(SVRandSocket, cons=cons)])
def test_open_rand_cons():
skip_ifndef('VERILATOR_ROOT', 'SCV_HOME', 'RANDOM_TEST')
cnt = 5
cons = []
# TODO : queue constraints not yet supported in SCVRand
# cons.append(randomize(t_din, 'din', eot_cons=['data_size == 20']))
cons.append(randomize(t_cfg, 'cfg', cons=['cfg < 20', 'cfg > 0']))
stim = []
din_seq = []
for i in range(cnt):
din_seq.append(list(range(random.randint(1, 10))))
stim.append(drv(t=t_din, seq=din_seq))
# stim.append(drv(t=t_din, seq=rand_seq('din', cnt)))
stim.append(drv(t=t_cfg, seq=rand_seq('cfg', cnt)))
verif(*stim, f=chop(sim_cls=SimVerilated), ref=chop(name='ref_model'))
sim(extens=[partial(SCVRand, cons=cons)])
from pygears.lib import drv, check, chop
from pygears.typing import Uint, Queue
drv(t=Queue[Uint[4]], seq=[list(range(10))]) \
| chop(size=4) \
| check(ref=[list(range(4)), list(range(4, 8)), list(range(8, 10))])
def test_random(sim_cls):
skip_ifndef('RANDOM_TEST')
stim = get_stim()
verif(*stim, f=chop(sim_cls=sim_cls), ref=chop(name='ref_model'))
sim()
def test_formal():
chop(Intf(Queue[Tuple[Uint[16], Uint[16]]]))