def run(self, start=None, setpc=True):
""" sets pc to start if given or to entry address from elf header,
passes control to the device and handles breakpoints
"""
if setpc:
if not start:
entry_addr = self.elf.entry
else:
entry_addr = self.elf.symbols[start]
if isinstance(self, CortexM3):
entry_addr &= ~1
entry = self.reg_fmt % entry_addr
if self.verbose: print("set new pc: @test (0x%s)" % s(entry))
self.set_reg(self.pc_reg, entry)
if self.verbose: print('OK')
if self.verbose: print("continuing")
self.exit = False
kind, sig, data = stop_reply(self.cont_all())
while kind in (b'T', b'S') and sig == 5:
# Update current thread for a breakpoint handler.
event = stop_event(data)
self.thread = event[b"thread"]
self.handle_br()
if self.exit:
return
# Some threads can be created during the breakpoint handling.
# `cont_all` resumes them..
kind, sig, data = stop_reply(self.cont_all())
if kind == b'W': # The process exited, getting values is impossible
return
if (kind, sig) != (b'T', 0x0b): print('strange signal %s' % sig)
if hasattr(self, 'checkfault'):
self.checkfault()
else:
src_line = self.get_src_line(int(self.regs[self.pc_reg], 16 - 1))
if src_line:
print("0 %s:%s %s" %
(src_line['file'], src_line['lineno'], src_line['line']))
else:
print("%s %s" % (self.pc_reg, self.regs[self.pc_reg]))
if isinstance(self, CortexM3):
src_line = self.get_src_line(int(self.regs['lr'], 16) - 3)
if src_line:
print("1 %s:%s %s" % (src_line['file'], src_line['lineno'],
src_line['line']))
else:
print('lr %s' % s(self.regs['lr']))
self.dump_regs()
self.read_ack(20)
self.port.close(self)
sys.exit(0)
def run(self, start=None, setpc=True):
""" sets pc to start if given or to entry address from elf header,
passes control to the device and handles breakpoints
"""
if setpc:
if not start:
entry_addr = self.elf.entry
else:
entry_addr = self.elf.symbols[start]
if isinstance(self, CortexM3):
entry_addr &= ~1
entry = self.reg_fmt % entry_addr
if self.verbose: print("set new pc: @test (0x%s)" % s(entry))
self.set_reg(self.pc_reg, entry)
if self.verbose: print('OK')
if self.verbose: print("continuing")
self.exit = False
kind, sig, data = stop_reply(self.cont_all())
while kind in (b'T', b'S') and sig == 5:
# Update current thread for a breakpoint handler.
event = stop_event(data)
self.thread = event[b"thread"]
self.handle_br()
if self.exit:
return
# Some threads can be created during the breakpoint handling.
# `cont_all` resumes them..
kind, sig, data = stop_reply(self.cont_all())
if kind == b'W': # The process exited, getting values is impossible
return
if (kind, sig) != (b'T', 0x0b): print('strange signal %s' % sig)
if hasattr(self, 'checkfault'):
self.checkfault()
else:
src_line = self.get_src_line(int(self.regs[self.pc_reg],16 - 1))
if src_line:
print("0 %s:%s %s" % (src_line['file'], src_line['lineno'], src_line['line']))
else:
print("%s %s" % (self.pc_reg, self.regs[self.pc_reg]))
if isinstance(self, CortexM3):
src_line = self.get_src_line(int(self.regs['lr'],16) -3)
if src_line:
print("1 %s:%s %s" % (src_line['file'], src_line['lineno'], src_line['line']))
else:
print('lr %s' % s(self.regs['lr']))
self.dump_regs()
self.read_ack(20)
self.port.close(self)
sys.exit(0)
def step_over_br(self):
back = self.br[self.regs[self.pc_reg]]
addr = self.regs[self.pc_reg]
self.del_br(addr, quiet=True)
kind, sig, _ = stop_reply(self.step())
if kind in (b'T', b'S') and sig in (5, 0x0b):
self.set_br_a(addr, back["cb"], quiet=True, sym=back["sym"])
else:
print('strange signal while stepi over br, abort')
sys.exit(1)
def step_over_br(self):
back = self.br[self.regs[self.pc_reg]]
addr = self.regs[self.pc_reg]
self.del_br(addr, quiet=True)
kind, sig, _ = stop_reply(self.step())
if kind == b'T' and sig in (5, 0x0b):
self.set_br_a(addr, back["cb"], quiet=True, sym=back["sym"])
else:
print('strange signal while stepi over br, abort')
sys.exit(1)