def convert_acquire(self, instruction): """Return converted `AcquireInstruction`. Args: instruction (PulseQobjInstruction): acquire qobj Returns: Schedule: Converted and scheduled Instruction """ t0 = instruction.t0 duration = instruction.duration qubits = instruction.qubits discriminators = (instruction.discriminators if hasattr( instruction, 'discriminators') else None) kernels = (instruction.kernels if hasattr(instruction, 'kernels') else None) mem_slots = instruction.memory_slot reg_slots = (instruction.register_slot if hasattr( instruction, 'register_slot') else None) if not isinstance(discriminators, list): discriminators = [discriminators for _ in range(len(qubits))] if not isinstance(kernels, list): kernels = [kernels for _ in range(len(qubits))] schedule = Schedule() for i, qubit in enumerate(qubits): kernel = kernels[i] if kernel: kernel = commands.Kernel(name=kernel.name, params=kernel.params) discriminator = discriminators[i] if discriminator: discriminator = commands.Discriminator( name=discriminator.name, params=discriminator.params) channel = channels.AcquireChannel(qubit, buffer=self.buffer) if reg_slots: register_slot = channels.RegisterSlot(reg_slots[i]) else: register_slot = None memory_slot = channels.MemorySlot(mem_slots[i]) cmd = commands.Acquire(duration, discriminator=discriminator, kernel=kernel) schedule |= commands.AcquireInstruction(cmd, channel, memory_slot, register_slot) << t0 return schedule
def convert_acquire(self, instruction): """Return converted `Acquire`. Args: instruction (PulseQobjInstruction): acquire qobj Returns: Schedule: Converted and scheduled Instruction """ t0 = instruction.t0 duration = instruction.duration qubits = instruction.qubits acquire_channels = [channels.AcquireChannel(qubit) for qubit in qubits] mem_slots = [channels.MemorySlot(instruction.memory_slot[i]) for i in range(len(qubits))] if hasattr(instruction, 'register_slot'): register_slots = [channels.RegisterSlot(instruction.register_slot[i]) for i in range(len(qubits))] else: register_slots = [None] * len(qubits) discriminators = (instruction.discriminators if hasattr(instruction, 'discriminators') else None) if not isinstance(discriminators, list): discriminators = [discriminators] if any(discriminators[i] != discriminators[0] for i in range(len(discriminators))): warnings.warn("Can currently only support one discriminator per acquire. Defaulting " "to first discriminator entry.") discriminator = discriminators[0] if discriminator: discriminator = Discriminator(name=discriminators[0].name, **discriminators[0].params) kernels = (instruction.kernels if hasattr(instruction, 'kernels') else None) if not isinstance(kernels, list): kernels = [kernels] if any(kernels[0] != kernels[i] for i in range(len(kernels))): warnings.warn("Can currently only support one kernel per acquire. Defaulting to first " "kernel entry.") kernel = kernels[0] if kernel: kernel = Kernel(name=kernels[0].name, **kernels[0].params) schedule = Schedule() for acquire_channel, mem_slot, reg_slot in zip(acquire_channels, mem_slots, register_slots): schedule |= instructions.Acquire(duration, acquire_channel, mem_slot=mem_slot, reg_slot=reg_slot, kernel=kernel, discriminator=discriminator) << t0 return schedule
def test_relative_barrier(self): """Test the relative barrier directive.""" a0 = channels.AcquireChannel(0) d0 = channels.DriveChannel(0) m0 = channels.MeasureChannel(0) u0 = channels.ControlChannel(0) mem0 = channels.MemorySlot(0) reg0 = channels.RegisterSlot(0) chans = (a0, d0, m0, u0, mem0, reg0) name = "barrier" barrier = instructions.RelativeBarrier(*chans, name=name) self.assertEqual(barrier.name, name) self.assertEqual(barrier.duration, 0) self.assertEqual(barrier.channels, chans) self.assertEqual(barrier.operands, chans)
def test_shift_phase_non_pulse_channel(self): """Test shift phase constructor with illegal channel""" with self.assertRaises(exceptions.PulseError): instructions.ShiftPhase(1.57, channels.RegisterSlot(1), name="test")
def test_freq_non_pulse_channel(self): """Test shift frequency constructor with illegal channel""" with self.assertRaises(exceptions.PulseError): instructions.ShiftFrequency(4.5e9, channels.RegisterSlot(1), name="test")