def test_name_collision(self): """Name collision during ancilla allocation.""" qr_ancilla = QuantumRegister(3, 'ancilla') circuit = QuantumCircuit(qr_ancilla) circuit.h(qr_ancilla) dag = circuit_to_dag(circuit) initial_layout = Layout() initial_layout[0] = qr_ancilla[0] initial_layout[1] = qr_ancilla[1] initial_layout[2] = qr_ancilla[2] initial_layout.add_register(qr_ancilla) pass_ = FullAncillaAllocation(self.cmap5) pass_.property_set['layout'] = initial_layout pass_.run(dag) after_layout = pass_.property_set['layout'] layout_qregs = after_layout.get_registers() self.assertEqual(len(layout_qregs), 2) self.assertIn(qr_ancilla, layout_qregs) layout_qregs.remove(qr_ancilla) after_ancilla_register = layout_qregs.pop() self.assertEqual(len(after_ancilla_register), 2) self.assertRegex(after_ancilla_register.name, r'^ancilla\d+$') self.assertTrue( all(qubit in qr_ancilla or qubit in after_ancilla_register for qubit in after_layout.get_virtual_bits()))
def test_with_extension(self): """There are 2 virtual qubit to extend.""" ancilla = QuantumRegister(2, 'ancilla') layout = Layout({0: self.qr3[0], 1: ancilla[0], 2: self.qr3[1], 3: ancilla[1], 4: self.qr3[2]}) layout.add_register(ancilla) pass_ = EnlargeWithAncilla() pass_.property_set['layout'] = layout after = pass_.run(self.dag) qregs = list(after.qregs.values()) self.assertEqual(2, len(qregs)) self.assertEqual(self.qr3, qregs[0]) self.assertEqual(ancilla, qregs[1])