コード例 #1
0
    def generate(self, **kwargs):
        with ThreadSplitterContextManager(self):
            # TODO add MP support
            pc = PcConfig.get_base_boot_pc()
            (skip_boot, skip_boot_valid) = self.getOption("SkipBootCode")
            if skip_boot_valid and skip_boot == 1:
                pc = PcConfig.get_base_initial_pc()

            self.genInstruction('JAL##RISCV', {
                'rd': 0,
                'NoBnt': 1,
                'BRTarget': pc
            })  # Brach to calculated address
コード例 #2
0
ファイル: EnvRISCV.py プロジェクト: mfkiwl/force-riscv
    def setupResetRegion(self):
        self.setGlobalState("ResetPC", PcConfig.get_reset_pc())
        self.virtualMemoryRequest(
            "PhysicalRegion",
            {
                "RegionType": "ResetRegion",
                "Size": PcConfig.get_reset_region_size(),
                "Type": "I",
                "Bank": 0,
            },
        )

        (skip_boot, skip_boot_valid) = self.genThread.getOption("SkipBootCode")
        if skip_boot_valid and skip_boot == 1:
            self.setGlobalState("ResetPC", PcConfig.get_base_initial_pc())
コード例 #3
0
    def generate(self, **kwargs):
        with ThreadSplitterContextManager(self):
            pc = PcConfig.get_base_boot_pc()
            (skip_boot, skip_boot_valid) = self.getOption("SkipBootCode")
            if skip_boot_valid and skip_boot == 1:
                pc = PcConfig.get_base_initial_pc()

            (
                boot_pc_reg_index,
                thread_id_reg_index,
                pc_offset_reg_index,
            ) = self.getRandomGPRs(3, exclude="0")
            assembly_helper = AssemblyHelperRISCV(self)
            assembly_helper.genReadSystemRegister(
                thread_id_reg_index, "mhartid"
            )  # Get the thread ID

            load_gpr64_seq = LoadGPR64(self.genThread)
            load_gpr64_seq.load(
                pc_offset_reg_index, PcConfig.get_boot_pc_offset()
            )
            self.genInstruction(
                "MUL##RISCV",
                {
                    "rd": pc_offset_reg_index,
                    "rs1": thread_id_reg_index,
                    "rs2": pc_offset_reg_index,
                },
            )  # Multiply the base PC offset by the thread ID

            load_gpr64_seq.load(boot_pc_reg_index, PcConfig.get_base_boot_pc())
            assembly_helper.genAddRegister(
                boot_pc_reg_index, pc_offset_reg_index
            )  # Add the thread PC offset to the base initial PC

            self.genInstruction(
                "JALR##RISCV",
                {
                    "rd": 0,
                    "rs1": boot_pc_reg_index,
                    "simm12": 0,
                    "NoBnt": 1,
                    "NoRestriction": 1,
                },
            )  # Branch to calculated address
コード例 #4
0
    def generate(self, **kwargs):
        with ThreadSplitterContextManager(self):
            pc = PcConfig.get_base_boot_pc()
            (skip_boot, skip_boot_valid) = self.getOption("SkipBootCode") #TODO allow for granular control of skip boot code/skip thread splitter code
            if skip_boot_valid and skip_boot == 1:
                pc = PcConfig.get_base_initial_pc()

            (boot_pc_reg_index, thread_id_reg_index, pc_offset_reg_index) = self.getRandomGPRs(3, exclude='0')
            assembly_helper = AssemblyHelperRISCV(self)
            assembly_helper.genReadSystemRegister(thread_id_reg_index, 'mhartid')  # Get the thread ID

            load_gpr64_seq = LoadGPR64(self.genThread)
            load_gpr64_seq.load(pc_offset_reg_index, PcConfig.get_boot_pc_offset())
            self.genInstruction('MUL##RISCV', {'rd': pc_offset_reg_index, 'rs1': thread_id_reg_index, 'rs2': pc_offset_reg_index})  # Multiply the base PC offset by the thread ID

            load_gpr64_seq.load(boot_pc_reg_index, PcConfig.get_base_boot_pc())
            assembly_helper.genAddRegister(boot_pc_reg_index, pc_offset_reg_index)  # Add the thread PC offset to the base initial PC

            self.genInstruction('JALR##RISCV', {'rd': 0, 'rs1': boot_pc_reg_index, 'simm12': 0, 'NoBnt': 1, 'NoRestriction': 1})  # Branch to calculated address