def parse(fp):
insts = []
src = []
sink = []
inst_str = ''
src_str = ''
sink_str = ''
last = None
mode = COPY
for char in fp.read():
if char == '\n':
if inst_str:
insts.append(inst_str)
inst_str = ''
if src_str:
src.append(stoi(src_str, base=0))
src_str = ''
if sink_str:
sink.append(stoi(sink_str, base=0))
sink_str = ''
last = None
mode = COPY
elif char == '#':
mode = COMMENT
elif char == '<':
mode = MFC0
elif char == '>':
mode = MTC0
elif mode == COPY and char not in [',','(',')'] \
and not (last == char == ' '):
inst_str += char
last = char
elif mode == MFC0:
src_str += char
elif mode == MTC0:
sink_str += char
return insts, src, sink
def parse( fp ):
insts = []
src = []
sink = []
inst_str = ''
src_str = ''
sink_str = ''
last = None
mode = COPY
for char in fp.read():
if char == '\n':
if inst_str:
insts.append( inst_str )
inst_str = ''
if src_str:
src.append( stoi( src_str, base=0 ) )
src_str = ''
if sink_str:
sink.append( stoi( sink_str, base=0 ) )
sink_str = ''
last = None
mode = COPY
elif char == '#':
mode = COMMENT
elif char == '<':
mode = MFC0
elif char == '>':
mode = MTC0
elif mode == COPY and char not in [',','(',')'] \
and not (last == char == ' '):
inst_str += char
last = char
elif mode == MFC0:
src_str += char
elif mode == MTC0:
sink_str += char
return insts, src, sink
def execute_jal( s, src, sink, rf, fields ): if fields in s.symtable: jtarg = s.symtable[ fields ] else: jtarg = stoi( fields, base=0 ) #rf[31] = s.pc + 4 #s.pc = ((s.pc + 4) & 0xF0000000) | (jtarg << 2) # TODO: HACKY rf[31] = 4*(s.pc + 1) + reset_vector s.pc = ( (s.pc + 1) & 0xF0000000) | jtarg
def mainloop(insts, src, sink):
pc = 0
rf = RegisterFile()
src_ptr = sink_ptr = 0
while pc < len(insts):
inst, fields = insts[pc].split(' ', 1)
if inst == 'mfc0':
f0, f1 = fields.split(' ', 1)
f1 = f1.strip() # TODO: clean this up
rt, rd = reg_map[f0], reg_map[f1]
if rd == 1:
rf[rt] = src[src_ptr]
src_ptr += 1
elif rd == 17:
pass
else:
raise Exception('Invalid mfc0 destination!')
elif inst == 'mtc0':
f0, f1 = fields.split(' ', 1)
f1 = f1.strip() # TODO: clean this up
rt, rd = reg_map[f0], reg_map[f1]
if rd == 1: pass
elif rd == 2:
if sink[sink_ptr] != rf[rt]:
print 'Instruction: ' + insts[pc] + ' failed!'
raise Exception('Instruction: ' + insts[pc] + ' failed!')
print 'SUCCESS: rf[' + str(rt) + '] == ' + str(sink[sink_ptr])
sink_ptr += 1
elif rd == 10:
pass
else:
raise Exception('Invalid mtc0 destination!')
elif inst == 'addiu':
f0, f1, f2 = fields.split(' ', 3)
rd, rs, imm = reg_map[f0], reg_map[f1], stoi(f2, base=16)
rf[rd] = rf[rs] + imm
elif inst == 'addu':
f0, f1, f2 = fields.split(' ', 3)
rd, rs, rt = reg_map[f0], reg_map[f1], reg_map[f2]
rf[rd] = rf[rs] + rf[rt]
elif inst == 'print':
rt = reg_map[fields]
result = fields + ' = ' + str(rf[rt])
print result
pc += 1
def execute_bne( s, src, sink, rf, fields ):
f0, f1, f2 = fields.split( ' ', 3 )
rt, rs = reg_map[ f0 ], reg_map[ f1 ]
if f2 in s.symtable: imm = s.symtable[ f2 ]
else: imm = stoi( f2, base=0 )
# TODO: assuming label is absolute, not offset!
if rf[rs] != rf[rt]:
s.pc = imm
#s.pc = (s.pc + 1 + sext(imm)) << 2
else:
s.pc += 1
def execute_bgez( s, src, sink, rf, fields ):
f0, f1 = fields.split( ' ', 2 )
rs = reg_map[ f0 ]
if f1 in s.symtable: imm = s.symtable[ f1 ]
else: imm = stoi( f1, base=0 )
# TODO: assuming label is absolute, not offset!
if signed( rf[rs] ) >= 0:
s.pc = imm
#s.pc = (s.pc + 1 + sext(imm)) << 2
else:
s.pc += 1
def mainloop( insts, src, sink ):
pc = 0
rf = RegisterFile()
src_ptr = sink_ptr = 0
while pc < len( insts ):
inst, fields = insts[pc].split( ' ', 1 )
if inst == 'mfc0':
f0, f1 = fields.split( ' ', 1 )
f1 = f1.strip() # TODO: clean this up
rt, rd = reg_map[ f0 ], reg_map[ f1 ]
if rd == 1:
rf[ rt ] = src[ src_ptr ]
src_ptr += 1
elif rd == 17: pass
else: raise Exception('Invalid mfc0 destination!')
elif inst == 'mtc0':
f0, f1 = fields.split( ' ', 1 )
f1 = f1.strip() # TODO: clean this up
rt, rd = reg_map[ f0 ], reg_map[ f1 ]
if rd == 1: pass
elif rd == 2:
if sink[ sink_ptr ] != rf[ rt ]:
print 'Instruction: '+insts[pc]+' failed!'
raise Exception('Instruction: '+insts[pc]+' failed!')
print 'SUCCESS: rf[' + str( rt ) + '] == ' + str( sink[ sink_ptr ] )
sink_ptr += 1
elif rd == 10: pass
else: raise Exception('Invalid mtc0 destination!')
elif inst == 'addiu':
f0, f1, f2 = fields.split( ' ', 3 )
rd, rs, imm = reg_map[ f0 ], reg_map[ f1 ], stoi( f2, base=16 )
rf[ rd ] = rf[ rs ] + imm
elif inst == 'addu':
f0, f1, f2 = fields.split( ' ', 3 )
rd, rs, rt = reg_map[ f0 ], reg_map[ f1 ], reg_map[ f2 ]
rf[ rd ] = rf[ rs ] + rf[ rt ]
elif inst == 'print':
rt = reg_map[ fields ]
result = fields + ' = ' + str( rf[rt] )
print result
pc += 1
def mainloop( insts ):
pc = 0
rf = RegisterFile()
while pc < len( insts ):
inst, f0, f1, f2 = insts[ pc ]
if inst == 'addiu':
rd, rs, imm = int(f0[1:]), int(f1[1:]), stoi(f2,base=16)
rf[ rd ] = rf[ rs ] + imm
elif inst == 'addu':
rd, rs, rt = int(f0[1:]), int(f1[1:]), int(f2[1:])
rf[ rd ] = rf[ rs ] + rf[ rt ]
elif inst == 'print':
_, _, rt = f0, f1, int(f2[1:])
result = f2 + ' = ' + str( rf[rt] ) + '\n'
os.write( 1, result )
pc += 1
def execute_srl( s, src, sink, rf, fields ): f0, f1, f2 = fields.split( ' ', 3 ) rd, rt, shamt = reg_map[ f0 ], reg_map[ f1 ], stoi( f2, base=0 ) rf[rd] = rf[rt] >> shamt s.pc += 1
def execute_xori( s, src, sink, rf, fields ): f0, f1, f2 = fields.split( ' ', 3 ) rt, rs, imm = reg_map[ f0 ], reg_map[ f1 ], stoi( f2, base=0 ) rf[rt] = rf[rs] ^ imm s.pc += 1
def execute_j( s, src, sink, rf, fields ): if fields in s.symtable: jtarg = s.symtable[ fields ] else: jtarg = stoi( fields, base=0 ) #s.pc = ((s.pc + 4) & 0xF0000000) | (jtarg << 2) # TODO: HACKY s.pc = ((s.pc + 1) & 0xF0000000) | jtarg
def execute_sra( s, src, sink, rf, fields ): f0, f1, f2 = fields.split( ' ', 3 ) rd, rt, shamt = reg_map[ f0 ], reg_map[ f1 ], stoi( f2, base=0 ) rf[rd] = trim( signed( rf[rt] ) >> shamt ) s.pc += 1
def execute_lui( s, src, sink, rf, fields ): f0, f1 = fields.split( ' ', 2 ) rt, imm = reg_map[ f0 ], stoi( f1, base=0 ) rf[rt] = imm << 16 s.pc += 1
def parse( fp ):
insts = []
src = []
sink = []
symtable = {}
hi = {}
lo = {}
data = []
inst_str = ''
src_str = ''
sink_str = ''
temp_str = ''
last = None
mode = COPY
for char in fp.read():
if char == '\n':
if inst_str:
insts.append( inst_str.strip() )
inst_str = ''
if src_str:
src.append( stoi( src_str, base=0 ) )
src_str = ''
if sink_str:
sink.append( stoi( sink_str, base=0 ) )
sink_str = ''
if temp_str:
data.append( temp_str )
temp_str = ''
last = None
mode = COPY
elif char == '#':
mode = COMMENT
elif mode == COPY and char == '<':
mode = MFC0
elif mode == COPY and char == '>':
mode = MTC0
elif mode == COPY and char == ':':
symtable[ inst_str ] = len( insts )
inst_str = ''
mode = COMMENT
elif mode == COPY and char == '%':
temp_str = ''
mode = HI_LO
elif mode == COPY and char == '.':
temp_str = ''
mode = DATA
elif mode == COPY and char == '(':
if last != ' ':
inst_str += ' '
elif mode == COPY and char not in [',',')'] \
and not (last == char == ' '):
inst_str += char
last = char
elif mode == MFC0:
src_str += char
elif mode == MTC0:
sink_str += char
elif mode == DATA:
temp_str += char
if temp_str == 'data':
mode, temp_str = COMMENT, ''
elif mode == HI_LO:
temp_str += char
if temp_str == 'hi':
mode, temp_str = HI, ''
elif temp_str == 'lo':
mode, temp_str = LO, ''
elif mode == HI and char not in ['[','(',' ']:
if char in [']', ')']:
hi[ temp_str ] = len( insts )
temp_str = ''
else:
temp_str += char
elif mode == LO and char not in ['[','(',' ']:
if char in [']', ')']:
lo[ temp_str ] = len( insts )
temp_str = ''
else:
temp_str += char
for label, pc in hi.items():
insts[ pc ] += ' ' + hex( symtable[ label ] >> 16 )
for label, pc in lo.items():
insts[ pc ] += ' ' + hex( symtable[ label ] & 0xFFFF )
addr = 0
num_bytes = 0
mem = Memory()
for item in data:
size, value = item.split(' ', 1)
if size == 'word': num_bytes = 4
elif size == 'half': num_bytes = 2
elif size == 'hword': num_bytes = 2
elif size == 'byte': num_bytes = 1
else: raise Exception('Unsupported memory size!')
mem.write( addr, num_bytes, stoi( value, base=0 ) )
addr += num_bytes
print '*'*70
print 'Instructions'
print '============'
for inst in insts:
print inst
print
print 'Source'
print '======'
print src
print
print 'Sink'
print '===='
print sink
print
print 'Symbol Table'
print '============'
for key, value in symtable.items():
print key, value
print '*'*70
return insts, mem, symtable, src, sink
def execute_sb( s, src, sink, rf, fields ): f0, f1, f2 = fields.split( ' ', 3 ) rt, imm, rs = reg_map[ f0 ], stoi( f1, base=0 ), reg_map[ f2 ] addr = rf[rs] + sext(imm) - data_section s.mem.write( addr, 1, rf[rt] ) s.pc += 1
def execute_lb( s, src, sink, rf, fields ): f0, f1, f2 = fields.split( ' ', 3 ) rt, imm, rs = reg_map[ f0 ], stoi( f1, base=0 ), reg_map[ f2 ] addr = rf[rs] + sext(imm) - data_section rf[rt] = sext_byte( s.mem.read( addr, 1 ) ) s.pc += 1
def execute_sltiu( s, src, sink, rf, fields ): f0, f1, f2 = fields.split( ' ', 3 ) rt, rs, imm = reg_map[ f0 ], reg_map[ f1 ], stoi( f2, base=0 ) rf[rt] = rf[rs] < sext(imm) s.pc += 1