END = False
INI_time = time.time()
TEMPERATURE = np.empty(shape=(0))
RESISTANCE = np.empty(shape=(0))
while (not END) and (low_temp <= mytriton.GetTemperature(8) <= high_temp):
plt_Vg=np.array([])
plt_resistance=np.array([])
plt_leak_curr=np.array([])
dev.RampVoltage(DAC,1000*shift_voltage/s1h_gain,tt=ramp_time, steps = 20) # the factor 1000 is applied as the unit reads in mV.
start_T = mytriton.GetTemperature(8)
for count,gate_voltage in enumerate(pattern['ramp_pattern']): # ramping up the gate voltage
time = time.time() - INI_time
dev.RampVoltage(DAC,1000*gate_voltage/s1h_gain,tt=ramp_time, steps = 5) # the factor 1000 is applied as the unit reads in mV.
leakage_current = 1e9*gate_leakage_v_I_conversion*float(vmeasure.query('READ?')) # in the units of [nA]
print ('\n\n------------------------')
if np.abs(leakage_current) > safe_gate_current:
GATE_LEAKAGE = True
print ('gate current', 1e9*leakage_current, ' nA exceeds safe gate current limit reaching the gate voltage of', gate_voltage, 'V.')
applied_gate_array = np.array([])
I_leakage_array = np.array([])
##Inititalizing the devices
ivvi = IVVI_DAC(addr='COM5', verb=True)
ivvi.RampAllZero(tt=2.)
vmeas = stlab.adi(addr='TCPIP::192.168.1.105::INSTR') #for measuring the voltage accross the sample
v_gateleakage = stlab.adi(addr='TCPIP::192.168.1.162::INSTR') #for measuring the leakage current
## Estimating for the internal resistances
print ('#### Calibration for the internal resistances ####')
input ('Short the S3b_output and M1b_input (pin #4), Press Enter to continue...')
ivvi.RampVoltage(S3b_dac,V_bias/S3b_range*1e3,tt=0.5, steps = 5) ##ramping this voltage in 20seconds
I_cal_p = float(vmeas.query('READ?')) / M1b_total_gain
ivvi.RampVoltage(S3b_dac,-V_bias/S3b_range*1e3,tt=1, steps = 5) ##ramping this voltage in 20seconds
I_cal_n = float(vmeas.query('READ?')) / M1b_total_gain
R_cal = 2*V_bias/(I_cal_p-I_cal_n)
print ('V_bias:',V_bias)
print('I_cal_p:',I_cal_p)
print('I_cal_n',I_cal_n)
print ('#### Calibration finished ####')
print ('Total internal resistance measures: {:.2f}kOhm'.format(R_cal/1000))
input ('Connect to the device, Press Enter to continue...')
t0 = INI_time
T0 = 300
TIME = np.empty(shape=(0))
TEMPERATURE = np.empty(shape=(0))
RESISTANCE = np.empty(shape=(0))
## Estimating for the internal resistances
if initial_calibration:
I_cal_p = 0
I_cal_n = 0
print('#### Calibration for the internal resistances ####')
input(
'Short the S3b_output and M1b_input (pin #4), Press Enter to continue...'
)
ivvi.RampVoltage(S3b_dac, V_bias / S3b_range * 1e3, tt=0.5,
steps=5) ##ramping this voltage in 20seconds
for cnt in range(measure_iteration):
I_cal_p += float(vmeas.query('READ?')) / M1b_total_gain
I_cal_p = I_cal_p / measure_iteration
ivvi.RampVoltage(S3b_dac, -V_bias / S3b_range * 1e3, tt=1,
steps=5) ##ramping this voltage in 20seconds
for cnt in range(measure_iteration):
I_cal_n += float(vmeas.query('READ?')) / M1b_total_gain
I_cal_n = I_cal_n / measure_iteration
R_cal = 2 * V_bias / (I_cal_p - I_cal_n)
plt.rcParams["figure.figsize"] = [16,9]
plt.title(prefix)
plt.ylabel('current [nA]')
plt.xlabel('bias Voltage [$\mu$V]')
plt.xlim(V_bias_min*1e6,V_bias_max*1e6)
palette = plt.get_cmap('Set1') # create a color palette
''' Start the measurement '''
## Ramping up the gate to the first point
if Vg_ini !=0:
print('############# Initialize back-gate to',Vg_ini,'V #############')
ivvi.RampVoltage(S1h_dac,Vg_ini/S1h_gain*1000.,tt=Vg_ini/gate_ramp_speed) ##ramping to the
print('Wait {:.0f}s for back-gate satbility at {:.1f}V'.format(gate_time_sleep,Vg_ini))
time.sleep(gate_time_sleep)
last_time = time.time()
## Sweeping the gate
for gate_count,Vg in enumerate(Vglist):
if Vg !=0:
ivvi.RampVoltage(S1h_dac,Vg/S1h_gain*1000.,tt=deltaVg/gate_ramp_speed, steps = 3) ##ramping this gate voltage
print('Wait {:.0f}s for back-gate stability at {:.1f}'.format(gate_time_sleep, Vg))
time.sleep(gate_time_sleep)
I_leakage = float(v_gateleakage.query('READ?'))*1e3 #the factor 1e3 is used to convert the current to [nA]
else: I_leakage = 0
Keysight.SetOutputOn()
## Output setting
idstring = 'bias_current{:.0f}nA_at{:.2f}mK'.format(i_BiasMax*1e9,Tini).replace('.','p')
colnames = ['Iset (A)', 'Vmeas (V)', 'Rmeas (Ohm)', 'Vgate (V)', 'Leakage Current (A)', 'T (mK)', 'Time (s)', 'Ileakage (nA)']
last_time = time.time()
## Calculation
Vglist = np.linspace(Vgmax, Vgmin, (Vgmax-Vgmin)/deltaVg+1)
iBiaslist = np.linspace(i_BiasMax, i_BiasMin, (i_BiasMax-i_BiasMin)/delta_i_bias+1)
Vg_ini = Vglist[0]
print('############# Initialize back-gate to',Vg_ini,'V #############')
ivvi.RampVoltage(vgdac,Vg_ini/vggain*1000.,tt=Vg_ini/gate_ramp_speed) ##ramping to the
print('Wait {:.0f}s for back-gate satbility at {:.1f}V'.format(5*time_sleep,Vg_ini))
time.sleep(5*time_sleep)
myfile = stlab.newfile(prefix, idstring, colnames, autoindex=True)
END = False
total_count = Vglist.shape[0]
resistance_array = np.array([])
applied_gate_array = np.array([])
I_leakage_array = np.array([])
V_array = np.array([])
plt.rcParams["figure.figsize"] = [16,9]
plt.xlabel('gate voltage [V]')
plt.ylabel('resistance [$\Omega$]')
if M1b_mode == 'Low-Noise':
R_exp = 2000 + M1b_gain * 1e-3
if M1b_mode == 'Low-Rin':
R_exp = 2000 + M1b_gain * 1e-4
if calibrate:
I_cal = []
print('Calibration for internal resistances:')
input(
'Please short the S3b output and M1b input, press ENTER to continue ...'
)
for V_bias in V_bias_list:
ivvi.RampVoltage(S3b_dac, V_bias / S3b_range * 1e3, tt=0.1, steps=5)
i_cal = 0
for cnt in range(measure_average):
Iread = float(Imeas.query('READ?'))
i_cal += Iread / M1b_total_gain
time.sleep(time_sleep_measure)
I_cal = np.append(I_cal, i_cal / measure_average)
R_int = np.average(np.diff(V_bias_list) / np.diff(I_cal))
print('Calibration Finished: total internal resistance is {:.1f}kOhms.'.
format(1e-3 * R_int))
print('Expected internal resistance is {:.2f}kOhm'.format(1e-3 * R_exp))
h = input('Connect to the device, press Enter to continue or "e" to exit.')
if h == "e":
##########################################################
''' Initializing the devices '''
# initial configuration of the Lock-in
apilevel_example = 6 # The API level supported by this example.
(daq, device, props) = zhinst.utils.create_api_session('dev352', apilevel_example, required_devtype='.*LI|.*IA|.*IS')
zhinst.utils.api_server_version_check(daq)
zhinst.utils.disable_everything(daq, device)
out_mixer_channel = zhinst.utils.default_output_mixer_channel(props)
# resetting the IVVI
dev = IVVI_DAC('COM4') # IVVI
dev.RampAllZero()
ramp_time = np.abs(np.floor(shift_voltage/ramp_speed))
dev.RampVoltage(DAC,1000*shift_voltage/s1h_gain,tt=ramp_time, steps = 20) # the factor 1000 is applied as the unit reads in mV.
# initializing the Keithley for gate current measurement
vmeasure = stlab.adi('TCPIP::192.168.1.105::INSTR',read_termination='\n') # with Keithley DMM6500
vmeasure.write('SENS:VOLT:DC:RANG:AUTO 0')
vmeasure.write('SENS:VOLT:DC:RANGE 2')
vmeasure.write(':INIT:CONT 0')
vmeasure.write('VOLT:NPLC 1')
vmeasure.write('TRIG:SOUR IMM')
vmeasure.write(":SYST:AZER:STAT OFF")
vmeasure.write(":TRIG:COUN 1")
gate_leakage_v_I_conversion = 1e-6 # conversion factor of the measured voltage on S1h 'Current monitor' to leakage current
##Inititalizing the devices
ivvi = IVVI_DAC(addr='COM5', verb=True)
ivvi.RampAllZero(tt=2., steps=20)
Imeas = stlab.adi(
addr='TCPIP::192.168.1.105::INSTR'
) #for measuring the current converted to Voltage at M0 output
v_gateleakage = stlab.adi(
addr='TCPIP::192.168.1.162::INSTR') #for measuring the leakage current
''' Start the measurement '''
## Ramping up the gate to the first point
if Vg_ini != 0:
print('############# Initialize back-gate to', Vg_ini, 'V #############')
ivvi.RampVoltage(S1h_dac,
Vg_ini / S1h_gain * 1000.,
tt=Vg_ini / gate_ramp_speed) ##ramping to the
print('Wait {:.0f}s for back-gate satbility at {:.1f}V'.format(
time_sleep, Vg_ini))
time.sleep(time_sleep)
last_time = time.time()
## Sweeping the gate
for gate_count, Vg in enumerate(Vglist):
if Vg != 0:
ivvi.RampVoltage(S1h_dac,
Vg / S1h_gain * 1000.,
tt=deltaVg / gate_ramp_speed,
steps=3) ##ramping this gate voltage
vmeas = stlab.adi(addr='TCPIP::192.168.1.105::INSTR'
) #for measuring the voltage accross the sample
v_gateleakage = stlab.adi(
addr='TCPIP::192.168.1.162::INSTR') #for measuring the leakage current
idstring = '_at{:.2f}mK'.format(Tini).replace('.', 'p')
colnames = [
'Iset (A)', 'Vmeas (V)', 'Rmeas (Ohm)', 'Vgate (V)', 'T (mK)', 'Time (s)',
'Ileakage (nA)'
]
last_time = time.time()
Vglist = np.linspace(Vgmax, Vgmin, (Vgmax - Vgmin) / deltaVg + 1)
Vg_ini = Vglist[0]
print('############# Initialize back-gate to', Vg_ini, 'V #############')
ivvi.RampVoltage(vgdac, Vg_ini / vggain * 1000.,
tt=Vg_ini / gate_ramp_speed) ##ramping to the
print('Wait {:.0f}s for back-gate satbility at {:.1f}V'.format(
5 * time_sleep, Vg_ini))
time.sleep(5 * time_sleep)
myfile = stlab.newfile(prefix, idstring, colnames, autoindex=True)
END = False
total_count = Vglist.shape[0]
ivvi.RampVoltage(isdac, i / isgain * 1e3, tt=10.) #biasing current
resistance_array = np.array([])
applied_gate_array = np.array([])
I_leakage_array = np.array([])
for count, Vg in enumerate(Vglist):
ivvi.RampVoltage(vgdac,
# modulating the gate voltage
ramp_time = np.abs(np.floor(gate_pattern[0] / ramp_spead))
gate_voltage_step = gate_pattern[1] - gate_pattern[0]
ramp_time = np.abs(np.floor(gate_voltage_step / ramp_spead))
count = 0 # couter of step numbers
leakage_current = 0
S21dB = np.array([], [])
S21Ph = np.array([], [])
gate = np.array([])
Leakage_current = np.array([])
t_in = time.time()
dev.RampVoltage(DAC, gate_pattern[0] * 1000 / s1h_gain, tt=90)
time.sleep(10 * time_step)
for count, gate_voltage in enumerate(
gate_pattern): # ramping up the gate voltage
dev.RampVoltage(DAC, gate_voltage * 1000 / s1h_gain)
time.sleep(time_step)
leakage_current = gate_leakage_v_I_conversion * float(
vmeasure.query('READ?')) # in the units of [nA]
Leakage_current = np.append(Leakage_current, leakage_current)
print('\n\n------------------------')
for j in range(averaging):
data = VNA.MeasureScreen_pd()
idstring = '_at{:.2f}mK'.format(Tini).replace('.', 'p')
colnames = [
'Iset (A)', 'Vmeas (V)', 'Rmeas (Ohm)', 'Vgate (V)', 'T (mK)', 'Time (s)'
]
last_time = time.time()
Vglist = np.linspace(Vgmax, Vgmin, (Vgmax - Vgmin) / deltaVg + 1)
if Vglist.size == 0:
Vglist = [0]
Vg_ini = Vglist[0]
if Vg_ini != 0:
print('############# Initialize back-gate to', Vg_ini, 'V #############')
ivvi.RampVoltage(vgdac,
Vg_ini / vggain * 1000.,
tt=Vg_ini / gate_ramp_speed) ##ramping to the
print('Wait 1min for back-gate satbility at', Vg_ini, 'V')
time.sleep(60.)
myfile = stlab.newfile(prefix, idstring, colnames, autoindex=True)
END = False
total_count = Vglist.shape[0]
plt.rcParams["figure.figsize"] = [16, 9]
plt.xlabel('current [nA]')
plt.ylabel('voltage [V]')
palette = plt.get_cmap('Set1') # create a color palette
for i, Vg in enumerate(Vglist):
if Vg != 0:
