def main(): testUtil.runCycles(10000000) # Put Occ Sram test - Linear - Can be tested over Normal # Debug mode testUtil.writeUsFifo(PUTSRAM_OCC_CNTLDATA) # Write 32 bytes of data 8 times => 32*8 = 256 = 0x100 i_cnt = 0 while i_cnt < 8: testUtil.writeUsFifo(PUTSRAM_OCC_TESTDATA) i_cnt = i_cnt + 1 testUtil.writeEot() # Read the expected data for put sram testUtil.readDsFifo(PUTSRAM_OCC_EXP_CNTLDATA) testUtil.readEot() # Get Sram Linear testUtil.writeUsFifo(GETSRAM_OCC_CNTLDATA) testUtil.writeEot() # Read the Expected Data for get Sram i_cnt = 0 while i_cnt < 8: testUtil.readDsFifo(GETSRAM_OCC_EXP_TESTDATA) i_cnt = i_cnt + 1 testUtil.readDsFifo(GETSRAM_OCC_EXP_CNTLDATA) testUtil.readEot()
def getscom(addr, expStatus=[0, 0, 0, 0], HWPffdc=False): req = ([0, 0, 0, 4] + [0, 0, 0xA2, 0x01] + getdoubleword(addr)) testUtil.writeUsFifo(req) testUtil.writeEot() expData = ([0xc0, 0xde, 0xa2, 0x01] + expStatus) success = False if (expStatus == [0, 0, 0, 0]): success = True data = [0] * 8 if (success): data = testUtil.readDsEntryReturnVal() data += testUtil.readDsEntryReturnVal() testUtil.readDsFifo(expData) if (not success and HWPffdc): testUtil.extractHWPFFDC() #flush out distance testUtil.readDsEntryReturnVal() testUtil.readEot() val = 0 for i in range(0, 8): val |= data[i] << ((7 - i) * 8) return val
def getsram(addr, mode, length, primStatus, secStatus): req = (getsingleword(0x05) + getsingleword(0xa403) + getsingleword(mode) + getsingleword(addr) + getsingleword(length)) testUtil.runCycles(10000000) testUtil.writeUsFifo(req) testUtil.writeEot() data = [] if ((primStatus != 0) or (secStatus != 0)): length = 0 for i in range(0, int(-(-float(length) // 4))): data += list(testUtil.readDsEntryReturnVal()) readLen = testUtil.readDsEntryReturnVal() if (getsingleword(length) != list(readLen)): print getsingleword(length) print list(readLen) raise Exception("Invalid Length") expResp = (getsingleword(0xc0dea403) + gethalfword(primStatus) + gethalfword(secStatus) + getsingleword(0x03)) testUtil.readDsFifo(expResp) testUtil.readEot() return data[:length]
def main(): try: testUtil.runCycles(10000000) # Send a partial chip-op testUtil.writeUsFifo(TESTDATA) testUtil.resetFifo() # Make sure both the upstream and downstrem FIFOs are clear after the reset testUtil.waitTillUsFifoEmpty() testUtil.waitTillDsFifoEmpty() # Now send a complete chip-op on the upstream FIFO testUtil.writeUsFifo(TESTDATA_FULL) testUtil.writeEot() testUtil.resetFifo() # Make sure both the upstream and downstrem FIFOs are clear after the reset testUtil.waitTillUsFifoEmpty() testUtil.waitTillDsFifoEmpty() # Now send a get capabilities chip-op, so that in response, the DS FIFO # gets full before we do a reset testUtil.writeUsFifo(TESTDATA_2) testUtil.writeEot() testUtil.resetFifo() # Make sure both the upstream and downstrem FIFOs are clear after the reset testUtil.waitTillUsFifoEmpty() testUtil.waitTillDsFifoEmpty() except: print("\nTest completed with error(s), Raise error") raise print("\nTest completed with no errors")
def getmem(addr, len, flags): testUtil.runCycles(RUN_CYCLES) req = (getsingleword(6) + [0, 0, 0xA4, 0x01] + getsingleword(flags) + getdoubleword(addr) + getsingleword(len)) testUtil.writeUsFifo(req) testUtil.writeEot() # read data data = [] lenExp = len if (flags & 0x0008): lenExp += int(len / 8) if (flags & 0x0010): lenExp += int(len / 8) for i in range(0, int(-(-float(lenExp) // 4))): data += list(testUtil.readDsEntryReturnVal()) readLen = testUtil.readDsEntryReturnVal() if (getsingleword(lenExp) != list(readLen)): print getsingleword(lenExp) print list(readLen) raise Exception("Invalid Length") expResp = [ 0xc0, 0xde, 0xa4, 0x01, 0x0, 0x0, 0x0, 0x0, 0x00, 0x0, 0x0, 0x03 ] testUtil.readDsFifo(expResp) testUtil.readEot() return data[:lenExp]
def putmem(addr, data, flags, ecc=0): lenInBytes = len(data) if (len(data) < 8): data = data + [0] * (4 - len(data)) totalLen = 5 + len(data) / 4 coreChipletId = 0x00 if (flags & 0x0040): # LCO mode is set, so chiplet id - 0x20 coreChipletId = 0x20 req = ( getsingleword(totalLen) + [0, 0, 0xA4, 0x02] + [coreChipletId, ecc] + gethalfword(flags) #0,0,0x0,0xA5] #CoreChipletId/EccByte/Flags -> NoEccOverride/CacheInhibit/FastMode/NoTag/NoEcc/AutoIncr/Adu/Proc + getdoubleword(addr) + getsingleword(lenInBytes) # length of data + data) testUtil.writeUsFifo(req) testUtil.writeEot() testUtil.runCycles(RUN_CYCLES) if (flags & 0x0008): lenInBytes += int(len(data) / 8) if (flags & 0x0010): lenInBytes += int(len(data) / 8) expData = ( getsingleword(lenInBytes) + [0xc0, 0xde, 0xa4, 0x02, 0x0, 0x0, 0x0, 0x0, 0x00, 0x0, 0x0, 0x03]) testUtil.readDsFifo(expData) testUtil.readEot()
def main(): testUtil.runCycles(10000000) testUtil.writeUsFifo(TESTDATA) testUtil.writeEot() testUtil.runCycles(10000000) testUtil.readDsFifo(EXPDATA) testUtil.readEot()
def main(): testUtil.runCycles(10000000) #stop all thread in core0 testUtil.writeUsFifo(INST_START0_ALL_TESTDATA_WITH_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(INST_EXPDATA) testUtil.readEot()
def main( ): testUtil.runCycles( 10000000 ) testUtil.writeUsFifo( TESTDATA ) testUtil.writeEot( ) testUtil.readDsFifo( EXPDATA ) testUtil.readEot( ) # fail get mem in quiesce state testMemUtil.getmem_failure(0x08000000, 128*2, 0x02, 0x00010008, False)
def main(): testUtil.runCycles(10000000) # GetRing test - Aligned Data testUtil.writeUsFifo(GETRING_TESTDATA) testUtil.writeEot() testUtil.readDsEntry(678) ## 6242 entries testUtil.readDsFifo(GETRING_EXPDATA) testUtil.runCycles(10000000) testUtil.readEot()
def getmem_failure(addr, len, flags, responseWord): testUtil.runCycles(10000000) req = (getsingleword(6) + [0, 0, 0xA4, 0x01] + getsingleword(flags) + getdoubleword(addr) + getsingleword(len)) testUtil.writeUsFifo(req) testUtil.writeEot() expResp = ([0x0, 0x0, 0x0, 0x0] + [0xc0, 0xde, 0xa4, 0x01] + getsingleword(responseWord) + [0x0, 0x0, 0x0, 0x03]) testUtil.readDsFifo(expResp) testUtil.readEot()
def main(): testUtil.runCycles(10000000) testUtil.writeUsFifo(PUTREG_TESTDATA) testUtil.writeEot() testUtil.readDsFifo(PUTREG_EXPDATA) testUtil.readEot() testUtil.writeUsFifo(GETREG_TESTDATA) testUtil.writeEot() testUtil.readDsFifo(GETREG_EXPDATA) testUtil.readEot()
def main(): testUtil.runCycles(10000000) testUtil.writeUsFifo(TESTDATA) testUtil.writeEot() # Ignore first two enteries ( major number, minor number # and fw version) as they will keep on changing testUtil.readDsEntry(2) testUtil.readDsFifo(EXPDATA1) testUtil.readDsFifo(EXPDATA2) testUtil.readDsFifo(EXPDATA3) testUtil.readEot()
def getmem_failure(addr, len, flags, responseWord, withLen=True): testUtil.runCycles(RUN_CYCLES) req = (getsingleword(6) + [0, 0, 0xA4, 0x01] + getsingleword(flags) + getdoubleword(addr) + getsingleword(len)) testUtil.writeUsFifo(req) testUtil.writeEot() lenWord = [] if withLen: lenWord = [0x0, 0x0, 0x0, 0x0] expResp = (lenWord + [0xc0, 0xde, 0xa4, 0x01] + getsingleword(responseWord) + [0x0, 0x0, 0x0, 0x03]) testUtil.readDsFifo(expResp) testUtil.readEot()
def main(): testUtil.runCycles(10000000) testUtil.writeUsFifo(PUTMEM_TEST_HDR) loop = 1 while (loop <= LOOP_COUNT): testUtil.writeUsFifo(PUTMEM_TEST_DATA) loop += 1 testUtil.writeEot() testUtil.readDsFifo(PUTMEM_EXPDATA) testUtil.readEot()
def main(): testUtil.runCycles(10000000) # GetMem test testUtil.writeUsFifo(GETMEM_TESTDATA) testUtil.writeEot() # GetMem chipOp would send the read data first, # thus, would attempt to read the expected length of data first loop = 1 while (loop <= LOOP_COUNT): testUtil.readDsEntry(32) ## 32 entries ~ 128B PBA granule loop += 1 testUtil.readDsFifo(GETMEM_EXPDATA) testUtil.readEot()
def main(): testUtil.runCycles(10000000) print("\nStarting putscom test") testUtil.writeUsFifo(PUTSCOM_TESTDATA) testUtil.writeEot() testUtil.readDsFifo(PUTSCOM_EXPDATA) testUtil.readEot() print("\nStarting invalid putscom test") testUtil.writeUsFifo(PUTSCOM_TESTDATA_INVALID) testUtil.writeEot() testUtil.readDsFifo(PUTSCOM_EXPDATA_INVALID) testUtil.extractHWPFFDC() #flush out distance testUtil.readDsEntryReturnVal() testUtil.readEot() print("\nStarting getscom test") testUtil.writeUsFifo(GETSCOM_TESTDATA) testUtil.writeEot() testUtil.readDsFifo(GETSCOM_EXPDATA) testUtil.readEot() print("\nStarting invalid getscom test") testUtil.writeUsFifo(GETSCOM_TESTDATA_INVALID) testUtil.writeEot() testUtil.readDsFifo(GETSCOM_EXPDATA_INVALID) testUtil.extractHWPFFDC() #flush out distance testUtil.readDsEntryReturnVal() testUtil.readEot()
def main(): testUtil.runCycles(10000000) # GetMem test testUtil.writeUsFifo(GETMEM_TESTDATA) testUtil.writeEot() # GetMem chipOp would send the read data first, # thus, would attempt to read the expected length of data first loop = 1 while (loop <= LOOP_COUNT): testUtil.readDsFifo(GETMEM_EXP_RESPDATA) loop += 1 testUtil.readDsFifo(GETMEM_EXP_RESPHDR) testUtil.readEot()
def modifyScom(operation, addr, data, expStatus=[0, 0, 0, 0]): req = ([0, 0, 0, 7, 0, 0, 0xA2, 0x03] + getsingleword(operation) + getdoubleword(addr) + getdoubleword(data)) testUtil.writeUsFifo(req) testUtil.writeEot() expData = ([0xc0, 0xde, 0xa2, 0x03] + expStatus) success = False if (expStatus == [0, 0, 0, 0]): success = True testUtil.readDsFifo(expData) #flush out distance testUtil.readDsEntryReturnVal() testUtil.readEot()
def main( ): ( rc, out ) = quiet_run_command( "sbe-ddlevel 0", output_modes.regular ) if(rc == "DD1"): print "Not running Get Capabilities on DD1" return testUtil.runCycles( 10000000 ) testUtil.writeUsFifo( TESTDATA ) testUtil.writeEot( ) # Ignore first 7 enteries ( major number, minor number # and fw version & tag) as they will keep on changing testUtil.readDsEntry( 7 ) testUtil.readDsFifo( EXPDATA1 ) testUtil.readDsFifo( EXPDATA2 ) testUtil.readDsFifo( EXPDATA3 ) testUtil.readEot( )
def putScomUnderMask(addr, data, mask, expStatus=[0, 0, 0, 0]): req = ([0, 0, 0, 8, 0, 0, 0xA2, 0x04] + getdoubleword(addr) + getdoubleword(data) + getdoubleword(mask)) testUtil.writeUsFifo(req) testUtil.writeEot() expData = ([0xc0, 0xde, 0xa2, 0x04] + expStatus) success = False if (expStatus == [0, 0, 0, 0]): success = True testUtil.readDsFifo(expData) #flush out distance testUtil.readDsEntryReturnVal() testUtil.readEot()
def putsram(addr, mode, data, primStatus, secStatus): req = (getsingleword(5 + (len(data) / 4)) + [0, 0, 0xA4, 0x04] + getsingleword(mode) + getsingleword(addr) + getsingleword(len(data)) + data) testUtil.runCycles(10000000) testUtil.writeUsFifo(req) testUtil.writeEot() if ((primStatus != 0) or (secStatus != 0)): data = [] expData = (getsingleword(len(data)) + [0xc0, 0xde, 0xa4, 0x04] + gethalfword(primStatus) + gethalfword(secStatus) + getsingleword(0x03)) testUtil.readDsFifo(expData) testUtil.readEot()
def main(): testUtil.runCycles(10000000) #PutMemAdu Test testUtil.writeUsFifo(PUTMEMADU_CNTLDATA) testUtil.writeUsFifo(PUTMEMADU_TESTDATA) testUtil.writeEot() testUtil.readDsFifo(PUTMEMADU_EXPDATA) testUtil.readEot() # GetMemAdu test testUtil.writeUsFifo(GETMEMADU_TESTDATA) testUtil.writeEot() testUtil.readDsFifo(GETMEMADU_EXPDATA) testUtil.runCycles(10000000) testUtil.readEot()
def main(): testUtil.runCycles(10000000) testUtil.writeUsFifo(STOPCLOCK_CORE_TESTDATA) testUtil.writeEot() testUtil.readDsFifo(STOPCLOCK_PASS_EXPDATA) testUtil.runCycles(10000000) testUtil.readEot() # testUtil.writeUsFifo( STOPCLOCK_ALL_CORE_TESTDATA ) # testUtil.writeEot( ) # testUtil.readDsFifo( STOPCLOCK_PASS_EXPDATA ) # testUtil.runCycles( 10000000 ) # testUtil.readEot( ) # testUtil.runCycles(10000000) testUtil.writeUsFifo(STOPCLOCK_EQ_TESTDATA) testUtil.writeEot() testUtil.readDsFifo(STOPCLOCK_EQ_EXPDATA) testUtil.runCycles(10000000) testUtil.readEot() # # testUtil.runCycles( 10000000 ) # testUtil.writeUsFifo( STOPCLOCK_ALL_EQ_TESTDATA ) # testUtil.writeEot( ) # testUtil.readDsFifo( STOPCLOCK_EQ_EXPDATA ) # testUtil.runCycles( 10000000 ) # testUtil.readEot( ) testUtil.writeUsFifo(STOPCLOCK_PROC_TESTDATA) testUtil.writeEot() testUtil.readDsFifo(STOPCLOCK_PASS_EXPDATA) testUtil.runCycles(10000000) testUtil.readEot() testUtil.writeUsFifo(STOPCLOCK_INVALIDTARGET_TESTDATA) testUtil.writeEot() testUtil.readDsFifo(STOPCLOCK_FAIL_EXPDATA) testUtil.runCycles(10000000) testUtil.readEot()
def main(): testUtil.runCycles(10000000) testUtil.writeUsFifo(PUTSCOM_TESTDATA) testUtil.writeEot() testUtil.readDsFifo(PUTSCOM_EXPDATA) testUtil.readEot() testUtil.writeUsFifo(PUTSCOMUMASK_TESTDATA) testUtil.writeEot() testUtil.readDsFifo(PUTSCOMUMASK_EXPDATA) testUtil.readEot() testUtil.writeUsFifo(GETSCOMUMASK_TESTDATA) testUtil.writeEot() testUtil.readDsFifo(GETSCOMUMASK_EXPDATA) testUtil.readEot()
def main(): testUtil.runCycles(10000000) print("\nStarting control fastarray test") print("\nTest case: Setup") testUtil.writeUsFifo(CONTROL_FAST_ARRAY_SETUP_TESTDATA) testUtil.writeEot() testUtil.readDsFifo(CONTROL_FAST_ARRAY_VALID) testUtil.readEot() print("\nTest case: Catchup") testUtil.writeUsFifo(CONTROL_FAST_ARRAY_CATCHUP_TESTDATA) testUtil.writeEot() testUtil.readDsFifo(CONTROL_FAST_ARRAY_VALID) testUtil.readEot() print("\nTest case: Cleanup") testUtil.writeUsFifo(CONTROL_FAST_ARRAY_CLEANUP_TESTDATA) testUtil.writeEot() testUtil.readDsFifo(CONTROL_FAST_ARRAY_VALID) testUtil.readEot()
def main(): testUtil.runCycles(10000000) print("\nStarting control tracearray test") # Stop all the trace bus for traceId in TRACE_IDS: print("Stop : " + str(traceId[2])) CONTROL_TRACE_ARRAY_STOP_TESTDATA = [ 0, 0, 0, 0x04, 0, 0, 0xA6, 0x02, 0, traceId[0], 0, traceId[1], #TARGET_PROC_CHIP, chiplet xx 0, traceId[2], 0, 0x14 ] #stop & ignore mux testUtil.writeUsFifo(CONTROL_TRACE_ARRAY_STOP_TESTDATA) testUtil.writeEot() testUtil.readDsFifo(CONTROL_TRACE_ARRAY_VALID) testUtil.readEot() # dump traces from all the trace bus for traceId in TRACE_IDS: print("Collect dump : " + str(traceId[2])) CONTROL_TRACE_ARRAY_COLLECT_DUMP_TESTDATA = [ 0, 0, 0, 0x04, 0, 0, 0xA6, 0x02, 0, traceId[0], 0, traceId[1], #TARGET_PROC_CHIP, chiplet xx 0, traceId[2], 0, 0x18 ] #PROC_TB_PIB , stop & ignore mux testUtil.writeUsFifo(CONTROL_TRACE_ARRAY_COLLECT_DUMP_TESTDATA) testUtil.writeEot() testUtil.readDsEntry(128 * 4) # Flush tracearray buffer - 128 rows of 4words CONTROL_TRACE_ARRAY_VALID_DUMP = [ 0, 0, 0x02, 0x00, #Number of Words - 0x200 - 128*4 0xC0, 0xDE, 0xA6, 0x2, 0, 0, 0, 0, #Primary and secondary status 0, 0, 0, 0x03 ] testUtil.readDsFifo(CONTROL_TRACE_ARRAY_VALID_DUMP) testUtil.readEot() # Reset and restart all the trace bus for traceId in TRACE_IDS: print("Reset and restart : " + str(traceId[2])) CONTROL_TRACE_ARRAY_RESET_RESTART_TESTDATA = [ 0, 0, 0, 0x04, 0, 0, 0xA6, 0x02, 0, traceId[0], 0, traceId[1], #TARGET_PROC_CHIP, chiplet xx 0, traceId[2], 0, 0x13 ] #reset, restart & ignore mux testUtil.writeUsFifo(CONTROL_TRACE_ARRAY_RESET_RESTART_TESTDATA) testUtil.writeEot() testUtil.readDsFifo(CONTROL_TRACE_ARRAY_VALID) testUtil.readEot()
def main(): testUtil.runCycles(10000000) # Generate FSPI rc testScomUtil.getscom(0x0A000000, [0x00, 0xFE, 0x00, 0x11], True) testUtil.writeUsFifo(TESTDATA) testUtil.writeEot() print("\n HWP internal ffdc") testUtil.extractHWPFFDC(True) print("\n SBE internal ffdc") data = testUtil.readDsEntryReturnVal() magicBytes = ((data[0] << 8) | data[1]) if (magicBytes == 0xFFDC): print("\nMagic Bytes Match") else: raise Exception('data mistmach') packLen = ((data[2] << 8) | data[3]) print("\nFFDC package length = " + str(packLen)) # extract Sequence ID, Command class and command data = testUtil.readDsEntryReturnVal() seqId = ((data[0] << 24) | (data[1] << 16)) cmdClass = data[2] cmd = data[3] print("\n SeqId [" + str(seqId) + "] CmdClass [" + str(cmdClass) + "] Cmd [" + str(cmd) + "]") data = testUtil.readDsEntryReturnVal() fapiRc = ((data[0] << 24) | (data[1] << 16) | (data[2] << 8) | data[3]) print("\nFAPI rc = " + str(hex(fapiRc))) data = testUtil.readDsEntryReturnVal() primaryStatus = ((data[0] << 8) | data[1]) secondaryStatus = ((data[2] << 8) | data[3]) print ("\nPrimary Status " + str(hex(primaryStatus)) + " Secondary Status "\ + str(hex(secondaryStatus))) data = testUtil.readDsEntryReturnVal() commitID = ((data[0] << 24) | (data[1] << 16) | (data[2] << 8) | data[3]) print("\ncommitID = " + str(hex(commitID))) data = testUtil.readDsEntryReturnVal() ddLevel = ((data[0] << 24) | (data[1] << 16) | (data[2] << 8) | data[3]) print("\nddLevel = " + str(hex(ddLevel))) data = testUtil.readDsEntryReturnVal() header = ((data[0] << 24) | (data[1] << 16) | (data[2] << 8) | data[3]) print("\nHeader = " + str(hex(header))) for i in range(0, (bin(header).count("1"))): #read user data id data = testUtil.readDsEntryReturnVal() id = (data[0] << 8) | data[1] print "User data Id [" + str(hex(id)) + "]" len = (data[2] << 8) | data[3] #if it is trace field SBE_FFDC_TRACE_DUMP fileName = "" if (id == 0x0002): fileName = "trace.bin" print("\nlength of trace dump " + str(len)) #if it is trace field SBE_FFDC_ATTR_DUMP elif (id == 0x0001): fileName = "attr.bin" print("\nlength of attr dump " + str(len)) myBin = open(fileName, 'wb') print("\nwriting " + fileName) loopCount = (len) / 4 for j in range(0, loopCount): data = testUtil.readDsEntryReturnVal() myBin.write(bytearray(data)) print("write to a file Done") myBin.close() print("Read the Expected data") testUtil.readDsFifo(EXPDATA) print("Read Eot") testUtil.readEot()
def main(): testUtil.runCycles(10000000) #Try an invalid data case testUtil.writeUsFifo(INST_INVALID_TESTDATA) testUtil.writeEot() testUtil.readDsFifo(INST_INVALID_EXPDATA_ERR) testUtil.readEot() # Control Instruction Message - Stop testUtil.writeUsFifo(INST_STOP_0_0_TESTDATA_WITH_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(INST_EXPDATA) testUtil.readEot() testUtil.writeUsFifo(INST_STOP_0_1_TESTDATA_WITH_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(INST_EXPDATA) testUtil.readEot() testUtil.writeUsFifo(INST_STOP_0_2_TESTDATA_WITH_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(INST_EXPDATA) testUtil.readEot() testUtil.writeUsFifo(INST_STOP_0_3_TESTDATA_WITH_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(INST_EXPDATA) testUtil.readEot() testUtil.writeUsFifo(INST_STOP_0_0_TESTDATA_WITHOUT_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(STOP_INST_EXPDATA_ERR_WTH_FFDC) testUtil.extractHWPFFDC() #flush out distance testUtil.readDsEntryReturnVal() testUtil.readEot() testUtil.writeUsFifo(INST_STOP_0_1_TESTDATA_WITHOUT_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(STOP_INST_EXPDATA_ERR_WTH_FFDC) testUtil.extractHWPFFDC() #flush out distance testUtil.readDsEntryReturnVal() testUtil.readEot() testUtil.writeUsFifo(INST_STOP_0_2_TESTDATA_WITHOUT_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(STOP_INST_EXPDATA_ERR_WTH_FFDC) testUtil.extractHWPFFDC() #flush out distance testUtil.readDsEntryReturnVal() testUtil.readEot() testUtil.writeUsFifo(INST_STOP_0_3_TESTDATA_WITHOUT_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(STOP_INST_EXPDATA_ERR_WTH_FFDC) testUtil.extractHWPFFDC() #flush out distance testUtil.readDsEntryReturnVal() testUtil.readEot() #stop all thread in core0 testUtil.writeUsFifo(INST_STOP0_ALL_TESTDATA_WITH_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(INST_EXPDATA) testUtil.readEot() testUtil.writeUsFifo(INST_STOP0_ALL_TESTDATA_WITHOUT_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(STOP_INST_EXPDATA_ERR_WTH_FFDC) testUtil.extractHWPFFDC() #flush out distance testUtil.readDsEntryReturnVal() testUtil.readEot() # Control Instruction Message - Start testUtil.writeUsFifo(INST_START_0_0_TESTDATA_WITH_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(INST_EXPDATA) testUtil.readEot() testUtil.writeUsFifo(INST_START_0_1_TESTDATA_WITH_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(INST_EXPDATA) testUtil.readEot() testUtil.writeUsFifo(INST_START_0_2_TESTDATA_WITH_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(INST_EXPDATA) testUtil.readEot() testUtil.writeUsFifo(INST_START_0_3_TESTDATA_WITH_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(INST_EXPDATA) testUtil.readEot() testUtil.writeUsFifo(INST_START_0_0_TESTDATA_WITHOUT_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(START_INST_EXPDATA_ERR_WTH_FFDC) testUtil.extractHWPFFDC() #flush out distance testUtil.readDsEntryReturnVal() testUtil.readEot() testUtil.writeUsFifo(INST_START_0_1_TESTDATA_WITHOUT_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(START_INST_EXPDATA_ERR_WTH_FFDC) testUtil.extractHWPFFDC() #flush out distance testUtil.readDsEntryReturnVal() testUtil.readEot() testUtil.writeUsFifo(INST_START_0_2_TESTDATA_WITHOUT_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(START_INST_EXPDATA_ERR_WTH_FFDC) testUtil.extractHWPFFDC() #flush out distance testUtil.readDsEntryReturnVal() testUtil.readEot() testUtil.writeUsFifo(INST_START_0_3_TESTDATA_WITHOUT_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(START_INST_EXPDATA_ERR_WTH_FFDC) testUtil.extractHWPFFDC() #flush out distance testUtil.readDsEntryReturnVal() testUtil.readEot() #start all thread in core0 testUtil.writeUsFifo(INST_START0_ALL_TESTDATA_WITH_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(INST_EXPDATA) testUtil.readEot() testUtil.writeUsFifo(INST_START0_ALL_TESTDATA_WITHOUT_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(START_INST_EXPDATA_ERR_WTH_FFDC) testUtil.extractHWPFFDC() #flush out distance testUtil.readDsEntryReturnVal() testUtil.readEot() # Control Instruction Message - Step testUtil.writeUsFifo(INST_STEP_0_0_TESTDATA_WITH_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(INST_EXPDATA) testUtil.readEot() testUtil.writeUsFifo(INST_STEP_0_1_TESTDATA_WITH_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(INST_EXPDATA) testUtil.readEot() testUtil.writeUsFifo(INST_STEP_0_2_TESTDATA_WITH_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(INST_EXPDATA) testUtil.readEot() testUtil.writeUsFifo(INST_STEP_0_3_TESTDATA_WITH_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(INST_EXPDATA) testUtil.readEot() testUtil.writeUsFifo(INST_STEP_0_0_TESTDATA_WITHOUT_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(STEP_INST_EXPDATA_ERR_WTH_FFDC) testUtil.extractHWPFFDC() #flush out distance testUtil.readDsEntryReturnVal() testUtil.readEot() testUtil.writeUsFifo(INST_STEP_0_1_TESTDATA_WITHOUT_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(STEP_INST_EXPDATA_ERR_WTH_FFDC) testUtil.extractHWPFFDC() #flush out distance testUtil.readDsEntryReturnVal() testUtil.readEot() testUtil.writeUsFifo(INST_STEP_0_2_TESTDATA_WITHOUT_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(STEP_INST_EXPDATA_ERR_WTH_FFDC) testUtil.extractHWPFFDC() #flush out distance testUtil.readDsEntryReturnVal() testUtil.readEot() testUtil.writeUsFifo(INST_STEP_0_3_TESTDATA_WITHOUT_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(STEP_INST_EXPDATA_ERR_WTH_FFDC) testUtil.extractHWPFFDC() #flush out distance testUtil.readDsEntryReturnVal() testUtil.readEot() #step all thread in core0 testUtil.writeUsFifo(INST_STEP0_ALL_TESTDATA_WITH_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(INST_EXPDATA) testUtil.readEot() testUtil.writeUsFifo(INST_STEP0_ALL_TESTDATA_WITHOUT_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(STEP_INST_EXPDATA_ERR_WTH_FFDC) testUtil.extractHWPFFDC() #flush out distance testUtil.readDsEntryReturnVal() testUtil.readEot() # Control Instruction Message - Sreset testUtil.writeUsFifo(INST_SRESET_0_0_TESTDATA_WITH_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(INST_EXPDATA) testUtil.readEot() testUtil.writeUsFifo(INST_SRESET_0_1_TESTDATA_WITH_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(INST_EXPDATA) testUtil.readEot() testUtil.writeUsFifo(INST_SRESET_0_2_TESTDATA_WITH_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(INST_EXPDATA) testUtil.readEot() testUtil.writeUsFifo(INST_SRESET_0_3_TESTDATA_WITH_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(INST_EXPDATA) testUtil.readEot() testUtil.writeUsFifo(INST_SRESET_0_0_TESTDATA_WITHOUT_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(INST_EXPDATA) testUtil.readEot() testUtil.writeUsFifo(INST_SRESET_0_1_TESTDATA_WITHOUT_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(INST_EXPDATA) testUtil.readEot() testUtil.writeUsFifo(INST_SRESET_0_2_TESTDATA_WITHOUT_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(INST_EXPDATA) testUtil.readEot() testUtil.writeUsFifo(INST_SRESET_0_3_TESTDATA_WITHOUT_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(INST_EXPDATA) testUtil.readEot() #step all thread in core0 testUtil.writeUsFifo(INST_SRESET0_ALL_TESTDATA_WITH_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(INST_EXPDATA) testUtil.readEot() testUtil.writeUsFifo(INST_SRESET0_ALL_TESTDATA_WITHOUT_WARN_FLG) testUtil.writeEot() testUtil.readDsFifo(INST_EXPDATA) testUtil.readEot()