コード例 #1
0
ファイル: pwa.py プロジェクト: fyliu1204/tulip-control
# System variables and requirements
sys_vars = {'X0reach'}

# []<>home
sys_prog = {'home'}

# [](park -> <> lot)
sys_init = {'X0reach'}
sys_safe = {'X(X0reach) <-> lot || (X0reach && !park)'}
sys_prog |= {'X0reach'}

# Create the specification
specs = spec.GRSpec(env_vars, sys_vars, env_init, sys_init, env_safe, sys_safe,
                    env_prog, sys_prog)
specs.moore = True
specs.qinit = '\E \A'

# Synthesize
ctrl = synth.synthesize(specs, sys=disc_dynamics.ts, ignore_sys_init=True)
assert ctrl is not None, 'unrealizable'
if plotting:
    ax = plot_strategy(disc_dynamics, ctrl)
    ax.figure.savefig('pwa_proj_mealy.pdf')

# Save graphical representation of controller for viewing
if not ctrl.save('pwa.png'):
    print(ctrl)

# Simulation
コード例 #2
0
if os.name == "posix":
    start = os.times()[2]

ctrl = synth.synthesize(
    'gr1c', specs, sys=sys_ts.ts, ignore_sys_init=True,
    #action_vars=('u_in', 'act')
)
if os.name == "posix":
    end = os.times()[2]
    elapsed = (end - start)
    logger.info('Synthesis lasted: ' + str(elapsed))

logger.info(ctrl)
ctrl.save(imgpath + 'double_tank.pdf')

ax = plot_strategy(sys_ts, ctrl)
ax.figure.savefig(imgpath + 'proj_mealy.pdf')

"""Simulate""
num_it = 25
init_state = {}
init_state['u_in'] = 0

destfile = 'rsdisturbance_example.gexf'
states = grsim.grsim(
    [aut], env_states=[init_state], num_it=num_it,
    deterministic_env=False, graph_vis=False,
    destfile=destfile
)

uin_arr = []
コード例 #3
0
ctrl = synth.synthesize(
    'gr1c',
    specs,
    sys=sys_ts.ts,
    ignore_sys_init=True,
    #action_vars=('u_in', 'act')
)
if os.name == "posix":
    end = os.times()[2]
    elapsed = (end - start)
    logger.info('Synthesis lasted: ' + str(elapsed))

logger.info(ctrl)
ctrl.save(imgpath + 'double_tank.pdf')

ax = plot_strategy(sys_ts, ctrl)
ax.figure.savefig(imgpath + 'proj_mealy.pdf')

## Simulate
# num_it = 25
# init_state = {}
# init_state['u_in'] = 0

# destfile = 'rsdisturbance_example.gexf'
# states = grsim.grsim(
#     [aut], env_states=[init_state], num_it=num_it,
#     deterministic_env=False, graph_vis=False,
#     destfile=destfile
# )

# uin_arr = []
コード例 #4
0
ファイル: pwa.py プロジェクト: mihirjs/tulip-control
env_prog = '!park'
env_safe = set()                # empty set

# System variables and requirements
sys_vars = {'X0reach'}

# []<>home
sys_prog = {'home'}

# [](park -> <> lot)
sys_init = {'X0reach'}
sys_safe = {'X(X0reach) <-> lot || (X0reach && !park)'}
sys_prog |= {'X0reach'}

# Create the specification
specs = spec.GRSpec(env_vars, sys_vars, env_init, sys_init,
                    env_safe, sys_safe, env_prog, sys_prog)

# Synthesize
ctrl = synth.synthesize('jtlv', specs,
                        sys=disc_dynamics.ts, ignore_sys_init=True)
if plotting:
    ax = plot_strategy(disc_dynamics, ctrl)
    ax.figure.savefig('pwa_proj_mealy.pdf')

# Save graphical representation of controller for viewing
if not ctrl.save('pwa.png'):
    print(ctrl)

# Simulation