def cap(self):
if not self._cap:
self.regs.clkreq.cap = 1
if self.regs.clkack.cap != 1:
raise RuntimeError("submodule clock failure?")
uio = Uio(self.path.parent / 'cap', parent=self)
self._cap = uio.map(ECap)
self._cap.irq.uio = uio
return self._cap
def qep(self):
if not self._qep:
self.regs.clkreq.qep = 1
if self.regs.clkack.qep != 1:
raise RuntimeError("submodule clock failure?")
uio = Uio(self.path.parent / 'qep', parent=self)
self._qep = uio.map(EQep)
self._qep.irq.uio = uio
return self._qep
def __init__(self):
self.uio = Uio('uio_argsort')
self.argsort_axi = ArgSort_AXI(self.uio.regs())
self.udmabuf_in = Udmabuf('udmabuf-argsort-in' )
self.udmabuf_out = Udmabuf('udmabuf-argsort-out')
self.udmabuf_tmp = Udmabuf('udmabuf-argsort-tmp')
self.in_dtype = np.uint32
self.out_dtype = np.uint32
self.tmp_dtype = np.uint64
self.in_max_size = min((self.udmabuf_in .buf_size ) // (np.dtype(self.in_dtype ).itemsize), self.argsort_axi.max_size)
self.out_max_size = min((self.udmabuf_out.buf_size ) // (np.dtype(self.out_dtype).itemsize), self.argsort_axi.max_size)
self.tmp_max_size = min((self.udmabuf_tmp.buf_size//2) // (np.dtype(self.tmp_dtype).itemsize), self.argsort_axi.max_size)
self.debug_mode = 0
class ArgSort_Test:
def __init__(self):
self.uio = Uio('uio_argsort')
self.argsort_axi = ArgSort_AXI(self.uio.regs())
self.udmabuf_in = Udmabuf('udmabuf-argsort-in' )
self.udmabuf_out = Udmabuf('udmabuf-argsort-out')
self.udmabuf_tmp = Udmabuf('udmabuf-argsort-tmp')
self.in_dtype = np.uint32
self.out_dtype = np.uint32
self.tmp_dtype = np.uint64
self.in_max_size = min((self.udmabuf_in .buf_size ) // (np.dtype(self.in_dtype ).itemsize), self.argsort_axi.max_size)
self.out_max_size = min((self.udmabuf_out.buf_size ) // (np.dtype(self.out_dtype).itemsize), self.argsort_axi.max_size)
self.tmp_max_size = min((self.udmabuf_tmp.buf_size//2) // (np.dtype(self.tmp_dtype).itemsize), self.argsort_axi.max_size)
self.debug_mode = 0
def memmap_in(self, size):
if (size > self.in_max_size):
raise ValueError('size({0}) is over size of in-buffer({1})' .format(size,self.in_max_size ))
return self.udmabuf_in .memmap(dtype=self.in_dtype , shape=(size))
def memmap_out(self, size):
if (size > self.out_max_size):
raise ValueError('size({0}) is over size of out-buffer({1})'.format(size,self.out_max_size))
return self.udmabuf_out.memmap(dtype=self.out_dtype, shape=(size))
def allocate_array(self, size):
if (size > self.tmp_max_size):
raise ValueError('size({0}) is over size of tmp-buffer({1})'.format(size,self.tmp_max_size))
self.in_array = self.memmap_in(size)
self.out_array = self.memmap_out(size)
def run(self):
start = time.time()
self.argsort_axi.setup(self.udmabuf_in .phys_addr ,
self.udmabuf_out.phys_addr,
self.udmabuf_tmp.phys_addr + 0x00000000,
self.udmabuf_tmp.phys_addr + self.udmabuf_tmp.buf_size//2,
self.in_array.size,
self.debug_mode
)
self.uio.irq_on()
self.argsort_axi.start()
self.uio.wait_irq()
self.argsort_axi.clear_status()
self.run_time = time.time() - start
def __init__(self, uioLabel, size, defaultWordLength = 4):
self.defaultWordLength = defaultWordLength
self.myUio = Uio(uioLabel)
self.memBlanket = type("memBlanket", (ctypes.Structure,),
{
"_fields_": [("number", ctypes.c_ubyte*int(size))],
"__getitem__": bitBlanket.getitem,
"__setitem__":bitBlanket.setitem
}
)
self.memBlanket = self.myUio.map(self.memBlanket)
class bitBlanket():
def __init__(self, uioLabel, size, defaultWordLength = 4):
self.defaultWordLength = defaultWordLength
self.myUio = Uio(uioLabel)
self.memBlanket = type("memBlanket", (ctypes.Structure,),
{
"_fields_": [("number", ctypes.c_ubyte*int(size))],
"__getitem__": bitBlanket.getitem,
"__setitem__":bitBlanket.setitem
}
)
self.memBlanket = self.myUio.map(self.memBlanket)
byteSize = (ctypes.c_ubyte, ctypes.c_ushort, ctypes.c_uint,
ctypes.c_ulong)
def __getitem__(self, i):
#rehandle slices
if isinstance(i, int):
i = (i, self.defaultWordLength)
return self.memBlanket[i].value
def __setitem__(self, i, value):
#rehandle slices
#if isinstance(i, int):
# i = (i, self.defaultWordLength)
self.memBlanket[i] = value
def getitem(self, i):
if not isinstance(i, tuple) or (i.__len__() != 2):
raise TypeError('subindices must be 2-element tuples: %r' % i)
try:
pointerType = bitBlanket.byteSize[int(i[1]/2)]
except ValueError:
print('second indice must be 1, 2, 4, or 8 (bytes)')
raise
return ctypes.cast(ctypes.byref(getattr(self, "number"), i[0]),
ctypes.POINTER(pointerType)).contents
def setitem(self, i, value):
if not isinstance(i, tuple) or (i.__len__() != 2):
raise TypeError('subindices must be 2-element tuples: %r' % i)
try:
pointerType = bitBlanket.byteSize[int(i[1]/2)]
except ValueError:
print('second indice must be 1, 2, 4, or 8 (bytes)')
raise
ctypes.cast(ctypes.byref(getattr(self, "number"), i[0]),
ctypes.POINTER(pointerType))[0] = pointerType(value)
#!/usr/bin/python3
from uio import Uio
pin = Uio("/dev/uio/gpio-irq")
pin.irq_enable()
while True:
pin.irq_recv()
print("Ping!")
# If the irq is level-triggered instead of edge-triggered, you should
# ensure that it is no longer asserted before reenabling it, otherwise
# it will just immediately trigger again.
pin.irq_enable()
#!/usr/bin/python3
import sys
sys.path.insert(0, '../src')
from ti.icss import Icss
from uio import Uio
import ctypes
EVENT0 = 16 # range 16..31
EVENT1 = 17 # range 16..31
IRQ = 2 # range 2..9
pruss = Icss("/dev/uio/pruss/module")
irq = Uio("/dev/uio/pruss/irq%d" % IRQ)
intc = pruss.intc
(core0, core1) = pruss.cores
pruss.initialize()
# clear and enable events and route them to our irq
for event in EVENT0, EVENT1:
intc.ev_ch[event] = IRQ
intc.ev_clear_one(event)
intc.ev_enable_one(event)
# load program onto both cores
core0.load('fw/intc-test.bin')
core1.load('fw/intc-test.bin')
from udmabuf import Udmabuf
from uio import Uio
from pump import Pump
import numpy as np
import time
if __name__ == '__main__':
uio0 = Uio('uio0')
pump = Pump(uio0.regs())
udmabuf4 = Udmabuf('udmabuf4')
udmabuf5 = Udmabuf('udmabuf5')
test_dtype = np.uint8
test_size = min(int(udmabuf4.buf_size/(np.dtype(test_dtype).itemsize)),
int(udmabuf5.buf_size/(np.dtype(test_dtype).itemsize)))
udmabuf4_array = udmabuf4.memmap(dtype=test_dtype, shape=(test_size))
udmabuf5_array = udmabuf5.memmap(dtype=test_dtype, shape=(test_size))
udmabuf4_array[:] = np.random.randint(0,255,(test_size))
udmabuf5_array[:] = np.random.randint(0,255,(test_size))
total_time = 0
total_size = 0
count = 0
for i in range (0,9):
start = time.time()
pump.setup(udmabuf4.phys_addr, udmabuf5.phys_addr, test_size)
uio0.irq_on()
pump.start()
uio0.wait_irq()
pump.clear_status
from uio import Uio
from argsort_axi import ArgSort_AXI
if __name__ == '__main__':
uio = Uio('uio_argsort')
argsort_axi = ArgSort_AXI(uio.regs())
argsort_axi.print_info()
argsort_axi.print_debug()
sys.path.insert(0, '../src')
from ti.icss import Icss
from uio import Uio
import ctypes
import asyncio
loop = asyncio.get_event_loop()
EVENT0 = 16 # range 16..31
EVENT1 = 17 # range 16..31
IRQ = 2 # range 2..9
pruss = Icss("/dev/uio/pruss/module")
irq = Uio("/dev/uio/pruss/irq%d" % IRQ)
intc = pruss.intc
(core0, core1) = pruss.cores
pruss.initialize()
# clear and enable events and route them to our irq
for event in EVENT0, EVENT1:
intc.ev_ch[event] = IRQ
intc.ev_clear_one(event)
intc.ev_enable_one(event)
# load program onto both cores
core0.load('fw/intc-test.bin')
core1.load('fw/intc-test.bin')
#!/usr/bin/python3
from uio import Uio
import ctypes
from ctypes import c_uint32 as uint
########## L3 interconnect service network #####################################
#
# Welcome to the most fussy register space on the SoC!
# Only single word access allowed. Byte/halfword/multi-word access = bus error.
l3_sn = Uio("/dev/uio/l3-sn")
class ComponentID(ctypes.Structure):
_fields_ = [
("vendor", uint, 16), # 1 = Arteris
("type", uint, 16),
("hash", uint, 24),
("version", uint, 8),
]
class FlagOutput(ctypes.Structure):
src_t = uint # one bit per input
_fields_ = [
("enabled", src_t), #rw
("pending", src_t), #r-
]
from udmabuf import Udmabuf
from uio import Uio
import numpy as np
import time
if __name__ == '__main__':
uio1 = Uio('uio1')
regs = uio1.regs()
udmabuf4 = Udmabuf('udmabuf4')
udmabuf5 = Udmabuf('udmabuf5')
test_dtype = np.uint32
test_size = min(int(udmabuf4.buf_size/(np.dtype(test_dtype).itemsize)),
int(udmabuf5.buf_size/(np.dtype(test_dtype).itemsize)))
udmabuf4_array = udmabuf4.memmap(dtype=test_dtype, shape=(test_size))
udmabuf4_array[:] = np.random.randint(-21474836478,2147483647,(test_size))
udmabuf4.set_sync_to_device(0, test_size*(np.dtype(test_dtype).itemsize))
udmabuf5_array = udmabuf5.memmap(dtype=test_dtype, shape=(test_size))
udmabuf5_array[:] = np.random.randint(-21474836478,2147483647,(test_size))
udmabuf5.set_sync_to_cpu( 0, test_size*(np.dtype(test_dtype).itemsize))
total_setup_time = 0
total_cleanup_time = 0
total_xfer_time = 0
total_xfer_size = 0
count = 0
for i in range (0,9):
start_time = time.time()
#!/usr/bin/python3
import asyncio
from uio import Uio
loop = asyncio.get_event_loop()
pin = Uio( "p9.12-irq", blocking=False )
def irq_callback():
pin.irq_recv()
print( "Ping!" )
loop.stop()
loop.add_reader( pin.fileno(), irq_callback )
pin.irq_enable()
loop.run_forever()
#!/usr/bin/python3
from ti.icss import Icss
from uio import Uio
import ctypes
EVENT0 = 16 # range 16..31
EVENT1 = 17 # range 16..31
IRQ = 2 # range 2..9
pruss = Icss("/dev/uio/pruss/module")
irq = Uio("/dev/uio/pruss/irq%d" % IRQ)
intc = pruss.intc
pruss.initialize()
# clear and enable events and route them to our irq
for event in EVENT0, EVENT1:
intc.ev_ch[event] = IRQ
intc.ev_clear_one(event)
intc.ev_enable_one(event)
# load program onto both cores
with open('pruss-intc-test-fw.bin', 'rb') as f:
program = f.read()
pruss.iram0.write(program)
pruss.iram1.write(program)
# map and set parameters
class Params(ctypes.Structure):
from udmabuf import Udmabuf
from uio import Uio
import numpy as np
import time
if __name__ == '__main__':
uio0 = Uio('uio0')
regs = uio0.regs()
udmabuf4 = Udmabuf('udmabuf4')
udmabuf5 = Udmabuf('udmabuf5')
test_dtype = np.uint32
test_size = min(int(udmabuf4.buf_size / (np.dtype(test_dtype).itemsize)),
int(udmabuf5.buf_size / (np.dtype(test_dtype).itemsize)))
udmabuf4_array = udmabuf4.memmap(dtype=test_dtype, shape=(test_size))
udmabuf4_array[:] = np.random.randint(-21474836478, 2147483647,
(test_size))
udmabuf4.set_sync_to_device(0, test_size * (np.dtype(test_dtype).itemsize))
udmabuf5_array = udmabuf5.memmap(dtype=test_dtype, shape=(test_size))
udmabuf5_array[:] = np.random.randint(-21474836478, 2147483647,
(test_size))
udmabuf5.set_sync_to_cpu(0, test_size * (np.dtype(test_dtype).itemsize))
total_setup_time = 0
total_cleanup_time = 0
total_xfer_time = 0
total_xfer_size = 0
count = 0
for i in range(0, 9):
#!/usr/bin/python3 from uio import Uio pin = Uio( "p9.12-irq" ) pin.irq_enable() pin.irq_recv() print( "Ping!" )
from udmabuf import Udmabuf
from uio import Uio
import numpy as np
import time
if __name__ == '__main__':
uio1 = Uio('negative-uio')
regs = uio1.regs()
udmabuf4 = Udmabuf('negative-udmabuf4')
udmabuf5 = Udmabuf('negative-udmabuf5')
test_dtype = np.uint32
test_size = min(int(udmabuf4.buf_size / (np.dtype(test_dtype).itemsize)),
int(udmabuf5.buf_size / (np.dtype(test_dtype).itemsize)))
udmabuf4_array = udmabuf4.memmap(dtype=test_dtype, shape=(10))
udmabuf4_array[:] = [
64591051, 3172697395, 0, 0, 76157580, 46281898, 1342177280, 48498273,
3373798755, 4290117632
]
udmabuf4.set_sync_to_device(0, 10 * (np.dtype(test_dtype).itemsize))
udmabuf5_array = udmabuf5.memmap(dtype=test_dtype, shape=(4))
udmabuf5_array[:] = [0, 0, 0, 0]
udmabuf5.set_sync_to_cpu(0, 4 * (np.dtype(test_dtype).itemsize))
print(udmabuf4_array)
print(udmabuf5_array)
total_setup_time = 0
total_cleanup_time = 0
total_xfer_time = 0
#!/usr/bin/python3
import asyncio
from uio import Uio
loop = asyncio.get_event_loop()
pin = Uio("/dev/uio/gpio-irq", blocking=False)
pin.irq_enable()
def irq_callback():
pin.irq_recv()
print("Ping!")
# If the irq is level-triggered instead of edge-triggered, you should
# ensure that it is no longer asserted before reenabling it, otherwise
# it will just immediately trigger again.
pin.irq_enable()
loop.add_reader(pin.fileno(), irq_callback)
loop.run_forever()
#!/usr/bin/python3
import sys
sys.path.insert(0, '../src')
from uio import Uio
from ti.subarctic.lcdc import Lcdc, lcdc_fck
from time import sleep
uio = Uio("/dev/uio/lcdc")
lcdc = uio.map(Lcdc)
# lcdc functional clock rate
fck = lcdc_fck()
print("lcdc_fck = %f MHz" % (fck / 1e6))
# global config
lcdc.clock_div = 6 # FIXME pick suitable value
lcdc.pinmux = 0 # rfb
# memory clock rate
mck = fck / lcdc.clock_div
print("lcdc_mck = %f MHz (1 cycle = %f ns)" % (mck / 1e6, 1e9 / mck))
# sanity checks
if fck > 252000000:
raise RuntimeError('lcdc functional clock exceeds max spec')
if mck > 126000000:
raise RuntimeError('lcdc memory clock exceeds max spec')
elif mck > 42000000 and lcdc.pinmux == 0:
raise RuntimeError('lcdc memory clock exceeds max spec for rfb mode')