def _emit(self,
cond_br,
target=None,
reg=None,
absolute=False,
link=REGISTERS['null']):
if target is None:
imm = 0
elif isinstance(target, Label):
target.pinned = False
self.asm._add_backpatch_item(target.name)
imm = 0
elif isinstance(target, int):
imm = target
else:
raise AssembleError('Invalid branch target: {}'.format(target))
if reg:
if (not (reg.spec & enc._REG_AR)
or reg.name not in enc.GENERAL_PURPOSE_REGISTERS):
raise AssembleError(
'Must be general purpose regfile A register {}'.format(
reg))
assert (reg.addr < 32)
raddr_a = reg.addr
use_reg = True
else:
raddr_a = 0
use_reg = False
waddr_add, waddr_mul, write_swap, pack = \
self._encode_write_operands(link)
if pack:
raise AssembleError('Packing is not available for link register')
insn = enc.BranchInsn(sig=0xF,
cond_br=cond_br,
rel=not absolute,
reg=use_reg,
raddr_a=raddr_a,
ws=write_swap,
waddr_add=waddr_add,
waddr_mul=waddr_mul,
immediate=imm)
if self.asm.sanity_check:
insn.verbose = BranchInstr(enc._COND_REV[cond_br], target, reg,
absolute, link)
self.asm._emit(insn)
REGISTERS['ra0'].pack('16a') # no throw
assert_raises(AssembleError, REGISTERS['rb0'].pack, '16a')
REGISTERS['ra0'].unpack('16a') # no throw
REGISTERS['r4'].unpack('16a') # no throw
assert_raises(AssembleError, REGISTERS['rb0'].unpack, '16a')
#============================ Instruction encoding ============================
SAMPLE_ALU_INSN = enc.AluInsn(
sig=0, unpack=1, pm=1, pack=2, cond_add=3, cond_mul=4, sf=1, ws=1,
waddr_add=53, waddr_mul=12, op_mul=4, op_add=2, raddr_a=33, raddr_b=53,
add_a=4, add_b=7, mul_a=6, mul_b=2
)
SAMPLE_BRANCH_INSN = enc.BranchInsn(
sig=0xf, cond_br=13, rel=1, reg=0, raddr_a=27, ws=1, waddr_add=53,
waddr_mul=12, immediate=0x12345678
)
SAMPLE_LOAD_INSN = enc.LoadInsn(
sig=0xe, unpack=1, pm=1, pack=2, cond_add=3, cond_mul=4, sf=1, ws=1,
waddr_add=53, waddr_mul=12, immediate=0x12345678
)
SAMPLE_SEMA_INSN = enc.SemaInsn(
sig=0xe, unpack=4, pm=1, pack=2, cond_add=3, cond_mul=4, sf=1, ws=1,
waddr_add=53, waddr_mul=12, sa=1, semaphore=13
)
def test_equality():
assert SAMPLE_ALU_INSN == SAMPLE_ALU_INSN
assert SAMPLE_ALU_INSN != SAMPLE_BRANCH_INSN
