def compileToStage(self, program, stage, debug = False, optimizeBehavior = True): returnString = "" to_declassify = compiler.parseFile(program) if debug: self.print_ast(to_declassify, "Parsed") if self.stageDict[stage] < self.stageDict["declassify"]: return to_uniquify = P3Declassify().visit(to_declassify, None) if debug: self.print_ast(to_uniquify, "Declassified") if self.stageDict[stage] < self.stageDict["uniquify"]: return to_explicate = P3Uniquify().visit(to_uniquify) if debug: self.print_ast(to_explicate, "Uniquified") if self.stageDict[stage] < self.stageDict["explicate"]: return to_heapify = P3Explicate().visit(to_explicate) if debug: self.print_ast(to_heapify, "Explicated") if self.stageDict[stage] < self.stageDict["heapify"]: return to_closure_convert = P3Heapify().visit(to_heapify) if debug: self.print_ast(to_closure_convert, "Heapified") if self.stageDict[stage] < self.stageDict["close"]: return (ast, fun_list) = P3Closure().visit(to_closure_convert) to_flatten = P3Closure().doClosure(to_closure_convert) if debug: self.print_ast(Stmt(to_flatten), "Closure Conversion") if self.stageDict[stage] < self.stageDict["flatten"]: return flattened = P3ASTFlattener().visit(to_flatten) #a list of functions if debug: self.print_ast(Stmt(flattened), "Flattened AST") if optimizeBehavior == True : if self.stageDict[stage] < self.stageDict["tailcallanalyze"] : return optimized = flattened for func in flattened: TailCallAnalysis().visit(func) if debug: self.print_ast(Stmt(optimized), "Optimized AST") asmString = "" data_section = "" for func in flattened: selector = Myx86Selector() tmpIR = selector.generate_x86_code(func) data_section += selector.dataSection ig = InterferenceGraph(tmpIR) coloredIR=ig.allocateRegisters() no_ifs = P3RemoveStructuredControlFlow().removeIfs(coloredIR) ig.setIR(no_ifs) asmString += ig.emitColoredIR() return "\n"+ data_section +"\n.text"+asmString if self.stageDict[stage] < self.stageDict["select"]: return selected = [] data_section = "" #x86Selector = Myx86Selector() for func in flattened: #selected.append(x86Selector.generate_x86_code(func)) x86Selector = Myx86Selector() selected.append(x86Selector.generate_x86_code(func)) data_section += x86Selector.dataSection if debug: self.print_ast(selected[-1], "Instruction Selection") if debug: print data_section #if debug: print x86Selector.dataSection if self.stageDict[stage] < self.stageDict["allocate"]: return allocated = [] igList = [] for func in selected: igList.append(InterferenceGraph(func)) allocated.append(igList[-1].allocateRegisters()) if debug: self.print_ast(allocated[-1], "Register Allocation") if self.stageDict[stage] < self.stageDict["remove"]: return removed = [] for func in allocated: removed.append(P3RemoveStructuredControlFlow().removeIfs(func)) if debug: self.print_ast(removed[-1], "Remove Struct Control Flow") if self.stageDict[stage] < self.stageDict["print"]: return counter = 0 for func in removed: igList[counter].setIR(func) returnString += igList[counter].emitColoredIR() counter += 1 return "\n"+ data_section +"\n.text"+returnString
print "-" * 20 + "Closure Converted AST" + "-" * 20 P2Uniquify().print_ast(ast.node) print "-" * 20 + "Final Func List" + "-" * 20 to_flatten = P2Closure().doClosure(to_closure_convert) P2Uniquify().print_ast(Stmt(to_flatten)) print "-" * 20 + "Flattened Func List" + "-" * 20 flattened = P2ASTFlattener().visit(to_flatten) P2Uniquify().print_ast(Stmt(flattened)) print "-" * 20 + "x86IR" + "-" * 20 ir_list = [] for func in flattened: ir_list += [Myx86Selector().generate_x86_code(func)] for func in ir_list: Myx86Selector().prettyPrint(func) print "-" * 20 + "x86IR Colored" + "-" * 20 ir_list = InterferenceGraph(ir_list[0]).allocateRegFunc(ir_list) Myx86Selector().prettyPrint(func) print "-" * 20 + "x86IR Without Ifs" + "-" * 20 no_ifs = P1Removex86Ifs(ir_list).removeIfs() print InterferenceGraph(no_ifs).emitColoredIR() #if __name__ == "__main__": # from p1explicate import * # from p1flattener import * # from Myx86Selector import * # import sys # import InterferenceGraph # explicated_ast = P1Explicate().visit(compiler.parse(sys.argv[1])) # flattened_ast = P1ASTFlattener().visit(explicated_ast) # ir = Myx86Selector().generate_x86_code(flattened_ast) # graph = InterferenceGraph.InterferenceGraph(ir)