def sdramdev(master_clk_i, sdram_clk_o, sdram_clk_i, pb_i, \
sd_intf, host_intf_inst, i_wb_cyc, i_wb_stb, i_wb_we, i_wb_addr, i_wb_data, o_wb_ack, \
o_wb_stall, o_wb_data, i_wb_sel):
clk = Signal(bool(0))
@always_comb
def clock_routing():
sdram_clk_o.next = master_clk_i
clk.next = sdram_clk_i
initialized = Signal(bool(False))
@always_seq(clk.posedge, reset=None)
def internal_reset():
if initialized == False:
initialized.next = not initialized
# Get an internal version of the pushbutton signal and debounce it.
pb, pb_prev, pb_debounced = [Signal(bool(0)) for _ in range(3)]
#pb_inst = input_pin(pb_i, pb, pullup=True)
#pb_debouncer = debouncer(clk, pb, pb_debounced, dbnc_window_g=0.01)
DEBOUNCE_INTERVAL = int(49)
debounce_cntr = Signal(intbv(DEBOUNCE_INTERVAL - 1, 0, DEBOUNCE_INTERVAL))
@always_seq(clk.posedge, reset=None)
def debounce_pb():
if pb_i != pb_prev:
debounce_cntr.next = DEBOUNCE_INTERVAL - 1
else:
if debounce_cntr == 0:
pb_debounced.next = pb_i
debounce_cntr.next = 1
else:
debounce_cntr.next = debounce_cntr - 1
pb_prev.next = pb_i
reset = Signal(bool(False))
@always_comb
def reset_logic():
# Reset if not initialized upon startup or if pushbutton is pressed (low).
reset.next = not initialized or not pb_debounced
test_status = Signal(intbv(0)[8:])
"""
sdramdevfsm_inst = sdramdevfsm(clk, reset, host_intf_inst, \
i_wb_cyc, i_wb_stb, i_wb_we, i_wb_addr, i_wb_data, o_wb_ack, \
o_wb_stall, o_wb_data , i_wb_sel)
"""
sdramdevfsm_inst = sdramdevfsm(clk, reset, host_intf_inst, \
i_wb_cyc, i_wb_stb, i_wb_we, i_wb_addr, i_wb_data, o_wb_ack, \
o_wb_stall, o_wb_data , i_wb_sel)
sdramdevfsm_inst.convert(name='sdramdev')
SdCntl_inst = SdramCntl(clk, host_intf_inst, sd_intf)
#SdCntl_inst.convert(name = 'Sdcntl')
"""
50MHz 20 nsec
during a read
5 clks to read
6 clks in between address chg
120 nsec
during a write
4 clks in between address chg
4 clks in between data chg
80 nsec
"""
return instances()
def sdram_test(master_clk_i, sdram_clk_o, sdram_clk_i, led_status, i_uart_rx,
o_uart_tx, pb_i, sd_intf):
clk50MHz = Signal(bool(0))
w_TX_Serial = Signal(bool(0))
w_TX_Active = Signal(bool(0))
w_RX_DV = Signal(bool(0))
w_RX_Byte = Signal(intbv(0)[8:])
o_TX_Done = Signal(bool(0))
state_tx = Signal(t_state_tx.TX_IDLE)
state_rx = Signal(t_state_rx.RX_IDLE)
clk = Signal(bool(0))
@always(master_clk_i.posedge)
def div2():
clk50MHz.next = not clk50MHz
@always_comb
def clock_routing():
sdram_clk_o.next = clk50MHz
clk.next = sdram_clk_i
initialized = Signal(bool(False))
@always_seq(clk.posedge, reset=None)
def internal_reset():
if initialized == False:
initialized.next = not initialized
# Get an internal version of the pushbutton signal and debounce it.
pb, pb_prev, pb_debounced = [Signal(bool(0)) for _ in range(3)]
#pb_inst = input_pin(pb_i, pb, pullup=True)
#pb_debouncer = debouncer(clk, pb, pb_debounced, dbnc_window_g=0.01)
DEBOUNCE_INTERVAL = int(49)
debounce_cntr = Signal(intbv(DEBOUNCE_INTERVAL - 1, 0, DEBOUNCE_INTERVAL))
@always_seq(clk.posedge, reset=None)
def debounce_pb():
if pb_i != pb_prev:
debounce_cntr.next = DEBOUNCE_INTERVAL - 1
else:
if debounce_cntr == 0:
pb_debounced.next = pb_i
debounce_cntr.next = 1
else:
debounce_cntr.next = debounce_cntr - 1
pb_prev.next = pb_i
reset = Signal(bool(False))
@always_comb
def reset_logic():
# Reset if not initialized upon startup or if pushbutton is pressed (low).
reset.next = not initialized or not pb_debounced
test_status = Signal(intbv(0)[8:])
host_intf_inst = host_intf()
memory_test_inst = memory_test(clk, reset, test_status, led_status,
host_intf_inst)
sdramCntl_inst = SdramCntl(clk, host_intf_inst, sd_intf)
"""
50MHz 1M 1e-06 per bit 10 e-6 per char
"""
uart_rx_inst = uart_rx(sdram_clk_o,
i_uart_rx,
w_RX_DV,
w_RX_Byte,
state_rx,
CLKS_PER_BIT=434)
uart_tx_inst = uart_tx(sdram_clk_o,
w_RX_DV,
w_RX_Byte,
w_TX_Active,
w_TX_Serial,
o_TX_Done,
state_tx,
CLKS_PER_BIT=434)
forceHi_inst = forceHi(w_TX_Serial, w_TX_Active, o_uart_tx)
return instances()