def test():
"""Test NL AC analysis (API)"""
cir = ahkab.Circuit('CS amplifier')
mys = ahkab.time_functions.sin(0, 1, 60)
cir.add_vsource('vin', '1', '0', dc_value=3, ac_value=1)
cir.add_vsource('vdd', '3', '0', dc_value=30)
cir.add_resistor('Rd', '3', '2', 10e3)
cir.add_capacitor('Cd', '3', '2', 40e-12)
cir.add_resistor('Rs', '4', '0', 1e3)
cir.add_capacitor('Cs', '4', '0', 4e-6)
cir.add_model('ekv', 'ekv0', {'TYPE':'n', 'VTO':.4, 'KP':1e-2})
cir.add_mos('m1', '2', '1', '4', '0', w=100e-6, l=1e-6, model_label='ekv0')
print(cir)
opa = ahkab.new_op(outfile='acnl', verbose=6)
aca = ahkab.new_ac(1, 100e6, 10e3, outfile='acnl', verbose=6)
r = ahkab.run(cir, [opa, aca])['ac']
testbench = testing.APITest('acnl', cir, [opa, aca], skip_on_travis=False,
er=1e-3, ea=1e-5)
testbench.setUp()
testbench.test()
if not cli:
testbench.tearDown()
def generate_network(mem_pars, net_pars):
if net_pars['type'] == graph_type[1]:
G = nx.watts_strogatz_graph(net_pars['N'], net_pars['k'],
net_pars['p'])
elif net_pars['type'] == graph_type[2]:
G = nx.random_regular_graph(net_pars['degree'], net_pars['N'])
cir = Circuit('Memristor network test')
# assign dictionary with terminals and memristors
memdict = {}
w = mem_pars['w']
D = mem_pars['D']
Roff = mem_pars['Roff']
Ron = mem_pars['Ron']
mu = mem_pars['mu']
Tao = mem_pars['Tao']
for e in G.edges_iter():
rval = round(Roff + 0.01 * Roff * (random.random() - 0.5), 2)
key = 'R' + str(e[0]) + str(e[1])
[v1, v2] = [e[0], e[1]]
memdict[key] = [
v1, v2, memristor.memristor(w, D, Roff, Ron, mu, Tao, 0.0)
] # we set v=0.0 value in the beginning
cir.add_resistor(key, 'n' + str(v1), 'n' + str(v2), rval)
G[e[0]][e[1]]['weight'] = rval
# edge_labels[e]=rval;
for n in G.nodes_iter():
G.node[n]['number'] = n
# Add random ground and voltage terminal nodes
[v1, gnd] = random.sample(xrange(0, len(G.nodes())), 2)
lastnode = len(G.nodes())
G.add_edge(v1, lastnode)
G.node[lastnode]['number'] = 'V1'
lastnode += 1
G.add_edge(gnd, lastnode)
G.node[lastnode]['number'] = 'gnd'
plot_graph(G)
export_graph(
G,
'/Users/nfrik/CloudStation/Research/LaBean/ESN/FalstadSPICE/test.txt')
cir.add_resistor("RG", 'n' + str(gnd), cir.gnd, 0.001)
cir.add_vsource("V1", 'n' + str(v1), cir.gnd, 1000)
opa = new_op()
# netdict contains setup graph and circuit
networkdict = {}
networkdict['Graph'] = G
networkdict['Circuit'] = cir
networkdict['Memristors'] = memdict
networkdict['Opa'] = opa
return networkdict
def score_resistiveDivider(self, Indiv):
# Avoid shortcircuited resistances by making minimal resistance = 1
R1=Indiv.gene_value('R1')+1
R2=Indiv.gene_value('R2')+1
# This circuit has a trivial solution: R1 = min(int)+1 and R2 = max(int)+1
mycircuit = circuit.Circuit(title="Resistive Divider Circuit")
# Reference ground
gnd = mycircuit.get_ground_node()
# This makes sure nodes are uniquely defined
n1 = mycircuit.create_node('n1')
n2 = mycircuit.create_node('n2')
# Add the resistors to the schematic
mycircuit.add_resistor("R1", 'n1', 'n2', value=R1)
mycircuit.add_resistor("R2", 'n2', gnd, value=R2)
# Add a voltage source
mycircuit.add_vsource("V1", n1="n1", n2=gnd, dc_value=1, ac_value=1)
# Resistors are passives with a flat frequency characteristic so an operating point (op) analysis is enough
op_analysis = ahkab.new_op()
# Start the simulation and store the result in <result>
result = ahkab.run(mycircuit, op_analysis)
# The figure of merit to maximize is the voltage at the intermediate node between R1 and R2
score = result['op']['VN2']*100
return score
def test():
"""Test NL AC analysis (API)"""
cir = ahkab.Circuit('CS amplifier')
mys = ahkab.time_functions.sin(0, 1, 60)
cir.add_vsource('vin', '1', '0', dc_value=3, ac_value=1)
cir.add_vsource('vdd', '3', '0', dc_value=30)
cir.add_resistor('Rd', '3', '2', 10e3)
cir.add_capacitor('Cd', '3', '2', 40e-12)
cir.add_resistor('Rs', '4', '0', 1e3)
cir.add_capacitor('Cs', '4', '0', 4e-6)
cir.add_model('ekv', 'ekv0', {'TYPE': 'n', 'VTO': .4, 'KP': 1e-2})
cir.add_mos('m1', '2', '1', '4', '0', w=100e-6, l=1e-6, model_label='ekv0')
print(cir)
opa = ahkab.new_op(outfile='acnl', verbose=6)
aca = ahkab.new_ac(1, 100e6, 10e3, outfile='acnl', verbose=6)
r = ahkab.run(cir, [opa, aca])['ac']
testbench = testing.APITest('acnl',
cir, [opa, aca],
skip_on_travis=False,
er=1e-3,
ea=1e-5)
testbench.setUp()
testbench.test()
if not cli:
testbench.tearDown()
def test():
"""Test pulse and sin API"""
step = devices.pulse(v1=0, v2=1, td=500e-9, tr=1e-12, pw=1, tf=1e-12, per=2)
damped_sin = devices.sin(vo=0, va=1, td=500e-9, freq=15e3, theta=5e3, phi=90.)
exp = devices.exp(v1=.5, v2=-.05, td1=0, tau1=20e-6, td2=400e-6, tau2=20e-6)
mycircuit = circuit.Circuit(title="Butterworth Example circuit", filename=None)
gnd = mycircuit.get_ground_node()
mycircuit.add_resistor(part_id="R1", n1="n1", n2="n2", value=600)
mycircuit.add_inductor(part_id="L1", n1="n2", n2="n3", value=15.24e-3)
mycircuit.add_capacitor(part_id="C1", n1="n3", n2=gnd, value=119.37e-9)
mycircuit.add_inductor(part_id="L2", n1="n3", n2="n4", value=61.86e-3)
mycircuit.add_capacitor(part_id="C2", n1="n4", n2=gnd, value=155.12e-9)
mycircuit.add_resistor(part_id="R2", n1="n4", n2=gnd, value=1.2e3)
mycircuit.add_vsource("V1", n1="n1", n2='n5', dc_value=3.3333, ac_value=.33333, function=step)
mycircuit.add_vsource("V2", n1="n5", n2='n6', dc_value=3.3333, ac_value=.33333, function=damped_sin)
mycircuit.add_vsource("V3", n1="n6", n2=gnd, dc_value=3.3333, ac_value=.33333, function=exp)
op_analysis = ahkab.new_op(outfile='time_functions')
ac_analysis = ahkab.new_ac(start=1e3, stop=1e5, points=100, outfile='time_functions')
tran_analysis = ahkab.new_tran(tstart=0, tstop=1.2e-3, tstep=1e-6, x0=None, outfile='time_functions')
testbench = testing.APITest('time_functions', mycircuit,
[op_analysis, ac_analysis, tran_analysis],
skip_on_travis=True, er=1e-3, ea=1e-5)
testbench.setUp()
testbench.test()
if cli:
r = ahkab.run(mycircuit, an_list=[op_analysis, ac_analysis, tran_analysis])
fig = plt.figure()
plt.title(mycircuit.title + " - TRAN Simulation")
plt.plot(r['tran']['T'], r['tran']['VN1'], label="Input voltage")
plt.hold(True)
plt.plot(r['tran']['T'], r['tran']['VN4'], label="output voltage")
plt.legend()
plt.hold(False)
plt.grid(True)
#plt.ylim([0,1.2])
plt.ylabel('Step response')
plt.xlabel('Time [s]')
fig.savefig('tran_plot.png')
fig = plt.figure()
plt.subplot(211)
plt.semilogx(r['ac']['w'], np.abs(r['ac']['Vn4']), 'o-')
plt.ylabel('abs(V(n4)) [V]')
plt.title(mycircuit.title + " - AC Simulation")
plt.subplot(212)
plt.grid(True)
plt.semilogx(r['ac']['w'], np.angle(r['ac']['Vn4']), 'o-')
plt.xlabel('Angular frequency [rad/s]')
plt.ylabel('arg(V(n4)) [rad]')
fig.savefig('ac_plot.png')
else:
testbench.tearDown()
def test():
"""Test pulse and sin API"""
step = time_functions.pulse(v1=0, v2=1, td=500e-9, tr=1e-12, pw=1, tf=1e-12, per=2)
damped_sin = time_functions.sin(vo=0, va=1, td=500e-9, freq=15e3, theta=5e3, phi=90.)
exp = time_functions.exp(v1=.5, v2=-.05, td1=0, tau1=20e-6, td2=400e-6, tau2=20e-6)
mycircuit = circuit.Circuit(title="Butterworth Example circuit", filename=None)
gnd = mycircuit.get_ground_node()
mycircuit.add_resistor(part_id="R1", n1="n1", n2="n2", value=600)
mycircuit.add_inductor(part_id="L1", n1="n2", n2="n3", value=15.24e-3)
mycircuit.add_capacitor(part_id="C1", n1="n3", n2=gnd, value=119.37e-9)
mycircuit.add_inductor(part_id="L2", n1="n3", n2="n4", value=61.86e-3)
mycircuit.add_capacitor(part_id="C2", n1="n4", n2=gnd, value=155.12e-9)
mycircuit.add_resistor(part_id="R2", n1="n4", n2=gnd, value=1.2e3)
mycircuit.add_vsource("V1", n1="n1", n2='n5', dc_value=3.3333, ac_value=.33333, function=step)
mycircuit.add_vsource("V2", n1="n5", n2='n6', dc_value=3.3333, ac_value=.33333, function=damped_sin)
mycircuit.add_vsource("V3", n1="n6", n2=gnd, dc_value=3.3333, ac_value=.33333, function=exp)
op_analysis = ahkab.new_op(outfile='time_functions')
ac_analysis = ahkab.new_ac(start=1e3, stop=1e5, points=100, outfile='time_functions')
tran_analysis = ahkab.new_tran(tstart=0, tstop=1.2e-3, tstep=1e-6, x0=None, outfile='time_functions')
testbench = testing.APITest('time_functions', mycircuit,
[op_analysis, ac_analysis, tran_analysis],
skip_on_travis=True, er=1e-3, ea=1e-5)
testbench.setUp()
testbench.test()
if cli:
r = ahkab.run(mycircuit, an_list=[op_analysis, ac_analysis, tran_analysis])
fig = plt.figure()
plt.title(mycircuit.title + " - TRAN Simulation")
plt.plot(r['tran']['T'], r['tran']['VN1'], label="Input voltage")
plt.hold(True)
plt.plot(r['tran']['T'], r['tran']['VN4'], label="output voltage")
plt.legend()
plt.hold(False)
plt.grid(True)
#plt.ylim([0,1.2])
plt.ylabel('Step response')
plt.xlabel('Time [s]')
fig.savefig('tran_plot.png')
fig = plt.figure()
plt.subplot(211)
plt.semilogx(r['ac']['w'], np.abs(r['ac']['Vn4']), 'o-')
plt.ylabel('abs(V(n4)) [V]')
plt.title(mycircuit.title + " - AC Simulation")
plt.subplot(212)
plt.grid(True)
plt.semilogx(r['ac']['w'], np.angle(r['ac']['Vn4']), 'o-')
plt.xlabel('Angular frequency [rad/s]')
plt.ylabel('arg(V(n4)) [rad]')
fig.savefig('ac_plot.png')
else:
testbench.tearDown()
def run_ac(circuit):
"""
:param circuit: ahkab circuit
:return: results for AC analysis
"""
opa = ahkab.new_op()
aca = ahkab.new_ac(ac_params['start'], ac_params['stop'], ac_params['pts'])
return ahkab.run(circuit, [opa, aca])['ac']
def generate_network(mem_pars, net_pars):
if net_pars['type']==graph_type[1]:
G = nx.watts_strogatz_graph(net_pars['N'],net_pars['k'],net_pars['p'])
elif net_pars['type']==graph_type[2]:
G = nx.random_regular_graph(net_pars['degree'], net_pars['N'])
cir = Circuit('Memristor network test')
# assign dictionary with terminals and memristors
memdict = {}
w = mem_pars['w']
D = mem_pars['D']
Roff = mem_pars['Roff']
Ron = mem_pars['Ron']
mu = mem_pars['mu']
Tao = mem_pars['Tao']
for e in G.edges_iter():
rval = round(Roff + 0.01 * Roff * (random.random() - 0.5), 2)
key = 'R' + str(e[0]) + str(e[1])
[v1, v2] = [e[0], e[1]]
memdict[key] = [v1, v2,
memristor.memristor(w, D, Roff, Ron, mu, Tao, 0.0)] # we set v=0.0 value in the beginning
cir.add_resistor(key, 'n' + str(v1), 'n' + str(v2), rval)
G[e[0]][e[1]]['weight'] = rval
# edge_labels[e]=rval;
for n in G.nodes_iter():
G.node[n]['number'] = n
# Add random ground and voltage terminal nodes
[v1, gnd] = random.sample(xrange(0, len(G.nodes())), 2)
lastnode = len(G.nodes())
G.add_edge(v1, lastnode)
G.node[lastnode]['number'] = 'V1'
lastnode += 1
G.add_edge(gnd, lastnode)
G.node[lastnode]['number'] = 'gnd'
plot_graph(G)
export_graph(G,'/Users/nfrik/CloudStation/Research/LaBean/ESN/FalstadSPICE/test.txt')
cir.add_resistor("RG", 'n' + str(gnd), cir.gnd, 0.001)
cir.add_vsource("V1", 'n' + str(v1), cir.gnd, 1000)
opa = new_op()
# netdict contains setup graph and circuit
networkdict = {}
networkdict['Graph'] = G
networkdict['Circuit'] = cir
networkdict['Memristors'] = memdict
networkdict['Opa']=opa
return networkdict
def test_op_solution():
"""Test results.op_solution"""
######### CIRCUIT ##############
ttn = ahkab.Circuit('Twin-T Notch Stopband filter')
ttn.add_vsource('V1', 'in', ttn.gnd, dc_value=1, ac_value=1)
# first path
ttn.add_capacitor('C1', 'in', 'n1', 2.2e-12)
ttn.add_capacitor('C2', 'n1', 'out', 2.2e-12)
ttn.add_resistor('R1', 'n1', ttn.gnd, 1e3)
# second path
ttn.add_resistor('R2', 'in', 'n2', 2e3)
ttn.add_resistor('R3', 'n2', 'out', 2e3)
ttn.add_capacitor('C3', 'n2', ttn.gnd, 2*2.2e-12)
ttn.add_vcvs('E1', 'outb', ttn.gnd, 'out', ttn.gnd, 1.)
# set up the OP and run
opa = ahkab.new_op()
r = ahkab.run(ttn, opa)['op']
####### CHECKS ###########
# str representation
print(str(r))
r.keys()
# 'sd' is not an existing key
try:
r['sd']
assert False
except KeyError:
pass
# fallback on default
assert r.get('sd', 1e3) == 1e3
assert r.get('VN1') == 0
# the important part is not the value
np.allclose(r.asmatrix(),
np.array([[ 1.00000000e+00],
[ 0.00000000e+00],
[ 1.00000000e+00],
[ 1.00000000e+00],
[ 1.00000000e+00],
[ 1.01736171e-20],
[ 0.00000000e+00]]), rtol=1e-3)
r.print_short()
set(list(zip(*r.items()))[0]) == set(r.keys())
set(list(zip(*r.items()))[1]) == set(r.values())
# iterator
keys = set()
values = set()
for k, v in r:
keys |= {k}
values |= {float(v)}
assert keys == set(r.keys())
assert values == set(r.values())
def test_op_solution():
"""Test results.op_solution"""
######### CIRCUIT ##############
ttn = ahkab.Circuit('Twin-T Notch Stopband filter')
ttn.add_vsource('V1', 'in', ttn.gnd, dc_value=1, ac_value=1)
# first path
ttn.add_capacitor('C1', 'in', 'n1', 2.2e-12)
ttn.add_capacitor('C2', 'n1', 'out', 2.2e-12)
ttn.add_resistor('R1', 'n1', ttn.gnd, 1e3)
# second path
ttn.add_resistor('R2', 'in', 'n2', 2e3)
ttn.add_resistor('R3', 'n2', 'out', 2e3)
ttn.add_capacitor('C3', 'n2', ttn.gnd, 2 * 2.2e-12)
ttn.add_vcvs('E1', 'outb', ttn.gnd, 'out', ttn.gnd, 1.)
# set up the OP and run
opa = ahkab.new_op()
r = ahkab.run(ttn, opa)['op']
####### CHECKS ###########
# str representation
print(str(r))
r.keys()
# 'sd' is not an existing key
try:
r['sd']
assert False
except KeyError:
pass
# fallback on default
assert r.get('sd', 1e3) == 1e3
assert r.get('VN1') == 0
# the important part is not the value
np.allclose(r.asmatrix(),
np.array([[1.00000000e+00], [0.00000000e+00], [1.00000000e+00],
[1.00000000e+00], [1.00000000e+00], [1.01736171e-20],
[0.00000000e+00]]),
rtol=1e-3)
r.print_short()
set(list(zip(*r.items()))[0]) == set(r.keys())
set(list(zip(*r.items()))[1]) == set(r.values())
# iterator
keys = set()
values = set()
for k, v in r:
keys |= {k}
values |= {float(v)}
assert keys == set(r.keys())
assert values == set(r.values())
def PDN_circuit(args):
logging.basicConfig(filename='PDN.log',filemode='w', level=logging.INFO)
#args = parser.parse_args()
if len(args.currents) == 0:
raise ValueError("input currents should not be empty")
mycircuit = circuit.Circuit(title="PDN circuit")
gnd = mycircuit.get_ground_node()
v_nodes = []
c_nodes = []
inter_nodes = []
_NODE_COUNT = args.cores
ROW_SIZE = args.rsize
# declare Vdd nodes
for i in range(_NODE_COUNT):
v_nodes.append(mycircuit.create_node('nv'+str(i)))
c_nodes.append(mycircuit.create_node('nc'+str(i)))
inter_nodes.append(mycircuit.create_node('ni'+str(i)))
# subcircuit for Metal layer parasitics (MLP) and cores
# The values to the cores are obtained as command line inputs.
for i in range(_NODE_COUNT):
mycircuit.add_resistor("Rb"+str(i), n1=v_nodes[i] , n2=inter_nodes[i] , value = 40e-3)
mycircuit.add_inductor("Lb"+str(i), n1=inter_nodes[i] , n2=c_nodes[i] , value = 0.5e-11)
mycircuit.add_capacitor("Cb"+str(i), n1=c_nodes[i] , n2=gnd , value = 1.6e-6)
mycircuit.add_isource("Ib"+str(i), n1=c_nodes[i] , n2=gnd , dc_value = args.currents[i]) # 0.1e-3)
# connection between cores
if (i+1)%ROW_SIZE != 0:
if i%2 == 0:
mycircuit.add_resistor("Rcc"+str(i), n1=c_nodes[i] ,n2=c_nodes[i+1] ,value = 50e-3)
if (i+ROW_SIZE) < _NODE_COUNT:
if (i/ROW_SIZE)%2 == 0:
mycircuit.add_resistor("Rcc"+str(i+_NODE_COUNT), n1=c_nodes[i] ,n2=c_nodes[i+ROW_SIZE] ,value = 50e-3)
mycircuit.add_vsource("V"+str(i), n1=v_nodes[i], n2=gnd, dc_value=args.voltages[i])
# OP analysis
op_analysis = ahkab.new_op()
r = ahkab.run(mycircuit, an_list=[op_analysis])
# print r['op'].results
with open('vdd_out.log', 'w') as v_out:
for i in range(_NODE_COUNT):
gvdd = r['op'].results['vnv'+str(i)]
cvdd = r['op'].results['vnc'+str(i)]
if gvdd > 0:
F_normal = float((gvdd-0.30)*(gvdd-0.30)/gvdd)
F_dip = float((cvdd-0.30)*(cvdd-0.30)/cvdd)
print ("Node %d : current: %f, Grid Vdd is %f, Core Vdd is %f, variation is %f percent" % (i, args.currents[i], gvdd , cvdd, 100*(gvdd-cvdd)/gvdd))
v_out.write(str(cvdd)+' ')
return r
def setUp(self):
######### CIRCUIT ##############
ttn = ahkab.Circuit('Twin-T Notch Stopband filter')
ttn.add_vsource('V1', 'in', ttn.gnd, dc_value=1, ac_value=1)
# first path
ttn.add_capacitor('C1', 'in', 'n1', 2.2e-12)
ttn.add_capacitor('C2', 'n1', 'out', 2.2e-12)
ttn.add_resistor('R1', 'n1', ttn.gnd, 1e3)
# second path
ttn.add_resistor('R2', 'in', 'n2', 2e3)
ttn.add_resistor('R3', 'n2', 'out', 2e3)
ttn.add_capacitor('C3', 'n2', ttn.gnd, 2*2.2e-12)
ttn.add_vcvs('E1', 'outb', ttn.gnd, 'out', ttn.gnd, 1.)
# set up the OP and run
opa = ahkab.new_op()
self.r = ahkab.run(ttn, opa)['op']
def take_decision_circuit(observations, parameters):
observations = normalize_observations(observations)
observations.append(1) # The bias paramter is multiplied by 1 (or -1)
# Multiply observations that have indicies in the array negative_weights by -1 to compensate for the paramters by multiplied by -1
for i in range(len(observations)):
if i in negative_weights:
observations[i] *= -1
# Creating an opamp circuit that adds the input voltages; resistors are used as the paramters (actually 1/parameters)
mycir = ahkab.Circuit('Simple Example Circuit')
add_op_amp(mycir, "_opamp1")
mycir.add_vsource("V1", "v1_r1", mycir.gnd, observations[0])
mycir.add_vsource("V2", "v2_r2", mycir.gnd, observations[1])
mycir.add_vsource("V3", "v3_r3", mycir.gnd, observations[2])
mycir.add_vsource("V4", "v4_r4", mycir.gnd, observations[3])
mycir.add_resistor("R1",
"inverting_input_opamp1",
"v1_r1",
value=1 / parameters[0] * 1000)
mycir.add_resistor("R2",
"inverting_input_opamp1",
"v2_r2",
value=1 / parameters[1] * 1000)
mycir.add_resistor("R3",
"inverting_input_opamp1",
"v3_r3",
value=1 / parameters[2] * 1000)
mycir.add_resistor("R4",
"inverting_input_opamp1",
"v4_r4",
value=1 / parameters[3] * 1000)
mycir.add_resistor("over",
"inverting_input_opamp1",
"output_opamp1",
value=1000)
opa = ahkab.new_op()
r = ahkab.run(mycir, opa)['op']
# output is multiplied by -1 because the opamp inverts the output signal
jump_prob = r["VOUTPUT_OPAMP1"][0][0] * -1
if jump_prob > 2.5:
return 1
else:
return 0
def test():
"""Test CCCS API"""
# The circuit is:
#test for transresitances
#va 1 2 type=vdc vdc=.1 vac=1
#r1 1 0 .5k
#r2 2 0 .5k
#h1 3 4 va 5000
#r3 3 0 1k
#r4 4 5 1k
#l1 5 0 10u
#c1 5 0 10u
#.op
#.ac start=50k stop=5e5 nsteps=1000
#.symbolic
#.plot ac |v(5)|
mycircuit = circuit.Circuit(title="Test CCVS API", filename=None)
gnd = mycircuit.get_ground_node()
mycircuit.add_resistor(part_id="R1", n1="1", n2=gnd, value=500)
mycircuit.add_resistor(part_id="R2", n1="2", n2=gnd, value=500)
mycircuit.add_vsource("VA", n1="1", n2='2', dc_value=0.1, ac_value=1.)
mycircuit.add_ccvs('H1', n1='3', n2='4', source_id='VA', value=5000)
mycircuit.add_resistor(part_id="R3", n1="3", n2=gnd, value=1e3)
mycircuit.add_resistor(part_id="R4", n1="4", n2="5", value=1e3)
mycircuit.add_inductor(part_id="L1", n1="5", n2=gnd, value=10e-6)
mycircuit.add_capacitor(part_id="C1", n1="5", n2=gnd, value=10e-6)
print(mycircuit)
op_analysis = ahkab.new_op(outfile='hvsource_api', verbose=6)
symb_analysis = ahkab.new_symbolic(outfile='hvsource_api', verbose=6)
ac_analysis = ahkab.new_ac(outfile='hvsource_api', start=50e3, stop=500e3,
points=1000, verbose=6)
testbench = testing.APITest('hvsource', mycircuit,
[op_analysis, symb_analysis, ac_analysis],
skip_on_travis=False, er=1e-3, ea=1e-5)
testbench.setUp()
testbench.test()
if not cli:
testbench.tearDown()
def test():
"""Test CCCS API"""
# The circuit is:
#test for transresitances
#va 1 2 type=vdc vdc=.1 vac=1
#r1 1 0 .5k
#r2 2 0 .5k
#h1 3 4 va 5000
#r3 3 0 1k
#r4 4 5 1k
#l1 5 0 10u
#c1 5 0 10u
#.op
#.ac start=50k stop=5e5 nsteps=1000
#.symbolic
#.plot ac |v(5)|
mycircuit = circuit.Circuit(title="Test CCVS API", filename=None)
gnd = mycircuit.get_ground_node()
mycircuit.add_resistor(part_id="R1", n1="1", n2=gnd, value=500)
mycircuit.add_resistor(part_id="R2", n1="2", n2=gnd, value=500)
mycircuit.add_vsource("VA", n1="1", n2='2', dc_value=0.1, ac_value=1.)
mycircuit.add_ccvs('H1', n1='3', n2='4', source_id='VA', value=5000)
mycircuit.add_resistor(part_id="R3", n1="3", n2=gnd, value=1e3)
mycircuit.add_resistor(part_id="R4", n1="4", n2="5", value=1e3)
mycircuit.add_inductor(part_id="L1", n1="5", n2=gnd, value=10e-6)
mycircuit.add_capacitor(part_id="C1", n1="5", n2=gnd, value=10e-6)
print(mycircuit)
op_analysis = ahkab.new_op(outfile='hvsource_api', verbose=6)
symb_analysis = ahkab.new_symbolic(outfile='hvsource_api', verbose=6)
ac_analysis = ahkab.new_ac(outfile='hvsource_api', start=7957.747,
stop=79577.471, points=1000, verbose=6)
testbench = testing.APITest('hvsource', mycircuit,
[op_analysis, symb_analysis, ac_analysis],
skip_on_travis=False, er=1e-3, ea=1e-5)
testbench.setUp()
testbench.test()
if not cli:
testbench.tearDown()
def setUp(self):
ttn = ahkab.Circuit('PSS Linear circuit')
sin_wave = ahkab.time_functions.sin(vo=0,
va=2,
td=0,
freq=1e6,
theta=0,
phi=0.)
ttn.add_vsource('VIN', 'in', ttn.gnd, dc_value=5, function=sin_wave)
ttn.add_resistor('R1', 'in', 'n1', 10e3)
ttn.add_resistor('R2', 'n1', 'out', 20e3)
ttn.add_resistor('R3', 'n2', ttn.gnd, 10e3)
ttn.add_resistor('R4', 'n3', ttn.gnd, 20e3)
ttn.add_resistor('R5', 'n3', 'out', 40e3)
ttn.add_capacitor('C1', 'n1', 'n2', 31.83e-12)
ttn.add_capacitor('C2', 'n1', 'n2', 15.91e-12)
ttn.add_vcvs('E1', 'out', ttn.gnd, 'n2', 'n3', 1e6)
# create a simulation object and run it!
op = ahkab.new_op()
pssa = ahkab.new_pss(1e-6, points=60)
self.r = ahkab.run(ttn, [op, pssa])['pss']
def test():
"""Test CCCS API"""
# The circuit is:
# test for transconductors
# va 1 2 type=vdc vdc=.1
# r1 1 0 .5k
# r2 2 0 .5k
# f1 3 4 va 5
# r3 3 0 1k
# r4 4 0 1k
# .op
# .symbolic
mycircuit = circuit.Circuit(title="Test CCCS API", filename=None)
gnd = mycircuit.get_ground_node()
mycircuit.add_resistor(part_id="R1", n1="1", n2=gnd, value=500)
mycircuit.add_resistor(part_id="R2", n1="2", n2=gnd, value=500)
mycircuit.add_cccs('F1', n1='3', n2='4', source_id='VA', value=5)
mycircuit.add_resistor(part_id="R3", n1="3", n2=gnd, value=1e3)
mycircuit.add_resistor(part_id="R4", n1="4", n2=gnd, value=1e3)
mycircuit.add_vsource("VA", n1="1", n2='2', dc_value=0.1)
print(mycircuit)
op_analysis = ahkab.new_op(outfile='fisource_api', verbose=6)
symb_analysis = ahkab.new_symbolic(outfile='fisource_api', verbose=6)
testbench = testing.APITest('fisource',
mycircuit, [op_analysis, symb_analysis],
skip_on_travis=False,
er=1e-3,
ea=1e-5)
testbench.setUp()
testbench.test()
if not cli:
testbench.tearDown()
def test():
"""Test VCCS (API)"""
# The circuit is:
# test for transconductors
# va 1 2 type=idc idc=1m
# r1 1 0 .5k
# r2 2 0 .5k
# g1 3 4 2 1 1e-3
# r3 3 0 1k
# r4 4 0 1k
# .op
# .symbolic
mycircuit = circuit.Circuit(title="Test CCCS API", filename=None)
gnd = mycircuit.get_ground_node()
mycircuit.add_resistor(part_id="R1", n1="1", n2=gnd, value=500)
mycircuit.add_resistor(part_id="R2", n1="2", n2=gnd, value=500)
mycircuit.add_vccs('G1', n1='3', n2='4', sn1='2', sn2='1', value=1e-3)
mycircuit.add_resistor(part_id="R3", n1="3", n2=gnd, value=1e3)
mycircuit.add_resistor(part_id="R4", n1="4", n2=gnd, value=1e3)
mycircuit.add_isource("IA", n1="1", n2='2', dc_value=1e-3)
print(mycircuit)
op_analysis = ahkab.new_op(outfile='gisource_api', verbose=6)
symb_analysis = ahkab.new_symbolic(outfile='gisource_api', verbose=6)
testbench = testing.APITest('gisource', mycircuit,
[op_analysis, symb_analysis],
skip_on_travis=False, er=1e-3, ea=1e-5)
testbench.setUp()
testbench.test()
if not cli:
testbench.tearDown()
def test():
"""Test CCCS API"""
# The circuit is:
# test for transconductors
# va 1 2 type=vdc vdc=.1
# r1 1 0 .5k
# r2 2 0 .5k
# f1 3 4 va 5
# r3 3 0 1k
# r4 4 0 1k
# .op
# .symbolic
mycircuit = circuit.Circuit(title="Test CCCS API", filename=None)
gnd = mycircuit.get_ground_node()
mycircuit.add_resistor(part_id="R1", n1="1", n2=gnd, value=500)
mycircuit.add_resistor(part_id="R2", n1="2", n2=gnd, value=500)
mycircuit.add_cccs("F1", n1="3", n2="4", source_id="VA", value=5)
mycircuit.add_resistor(part_id="R3", n1="3", n2=gnd, value=1e3)
mycircuit.add_resistor(part_id="R4", n1="4", n2=gnd, value=1e3)
mycircuit.add_vsource("VA", n1="1", n2="2", dc_value=0.1)
print(mycircuit)
op_analysis = ahkab.new_op(outfile="fisource_api", verbose=6)
symb_analysis = ahkab.new_symbolic(outfile="fisource_api", verbose=6)
testbench = testing.APITest(
"fisource", mycircuit, [op_analysis, symb_analysis], skip_on_travis=False, er=1e-3, ea=1e-5
)
testbench.setUp()
testbench.test()
if not cli:
testbench.tearDown()
def test():
"""Full wave rectifier test circuit"""
cir = assemble()
## define analyses
op1 = ahkab.new_op(outfile='rectifier')
tran1 = ahkab.new_tran(0,
200e-3,
1e-4,
outfile='rectifier',
verbose=0 + cli * 6)
# set the options
sim_opts = {}
sim_opts.update({'gmin': 1e-7})
sim_opts.update({'nl_voltages_lock': False})
sim_opts.update({'nl_voltages_lock_factor': 20})
sim_opts.update({'iea': 1e-1})
sim_opts.update({'default_tran_method': 'TRAP'})
sim_opts.update({'hmin': 1e-20})
sim_opts.update({'transient_max_nr_iter': 200})
## create a testbench
testbench = testing.APITest('rectifier',
cir, [op1, tran1],
skip_on_travis=True,
sim_opts=sim_opts,
ea=1e-1,
er=1.)
## setup and test
testbench.setUp()
testbench.test()
## this section is recommended. If something goes wrong, you may call the
## test from the cli and the plots to video in the following will allow
## for quick inspection
if cli:
## re-run the test to grab the results
cir = assemble()
res = ahkab.run(cir, an_list=[op1, tran1])
# print-out for good measure
print("OP Results:")
print(list(res['op'].items()))
## plot and save interesting data
fig = plt.figure()
plt.title(cir.title + " inputs")
plt.plot(res['tran'].get_x(),
res['tran']['VINA'] - res['tran']['VINB'],
label='Transf. input')
plt.hold(True)
plt.plot(res['tran'].get_x(),
res['tran']['vint1'],
label='Transformer output #1')
plt.plot(res['tran'].get_x(),
res['tran']['vint2'],
label='Transformer output #2')
plt.hold(False)
plt.grid(True)
plt.legend()
plt.ylabel('Voltage [V]')
plt.xlabel('Time [s]')
fig.savefig('rectf1_plot.png')
fig = plt.figure()
plt.title(cir.title + " outputs")
plt.plot(res['tran'].get_x(),
res['tran']['vint4'] - res['tran']['vint3'],
label="output voltage")
plt.legend()
plt.grid(True)
plt.ylabel('Voltage [V]')
plt.xlabel('Time [s]')
fig.savefig('rectf2_plot.png')
else:
testbench.tearDown()
gnd = mycircuit.get_ground_node()
mycircuit.add_resistor("R1", n1="n1", n2="n2", value=600)
mycircuit.add_inductor("L1", n1="n2", n2="n3", value=15.24e-3)
mycircuit.add_capacitor("C1", n1="n3", n2=gnd, value=119.37e-9)
mycircuit.add_inductor("L2", n1="n3", n2="n4", value=61.86e-3)
mycircuit.add_capacitor("C2", n1="n4", n2=gnd, value=155.12e-9)
mycircuit.add_resistor("R2", n1="n4", n2=gnd, value=1.2e3)
voltage_step = time_functions.pulse(v1=0, v2=1, td=500e-9, tr=1e-12, pw=1, tf=1e-12, per=2)
mycircuit.add_vsource("V1", n1="n1", n2=gnd, dc_value=5, ac_value=1, function=voltage_step)
print mycircuit
op_analysis = ahkab.new_op()
ac_analysis = ahkab.new_ac(start=1e3, stop=1e5, points=100)
tran_analysis = ahkab.new_tran(tstart=0, tstop=1.2e-3, tstep=1e-6, x0=None)
r = ahkab.run(mycircuit, an_list=[op_analysis, ac_analysis, tran_analysis])
import pylab
fig = pylab.figure()
pylab.title(mycircuit.title + " - TRAN Simulation")
pylab.plot(r['tran']['T'], r['tran']['VN1'], label="Input voltage")
pylab.hold(True)
pylab.plot(r['tran']['T'], r['tran']['VN4'], label="output voltage")
pylab.legend()
pylab.hold(False)
pylab.grid(True)
v2=1,
td=500e-9,
tr=1e-12,
pw=1,
tf=1e-12,
per=2)
mycircuit.add_vsource("V1",
n1="n1",
n2=gnd,
dc_value=5,
ac_value=1,
function=voltage_step)
print mycircuit
op_analysis = ahkab.new_op()
ac_analysis = ahkab.new_ac(start=1e3, stop=1e5, points=100)
tran_analysis = ahkab.new_tran(tstart=0, tstop=1.2e-3, tstep=1e-6, x0=None)
r = ahkab.run(mycircuit, an_list=[op_analysis, ac_analysis, tran_analysis])
import pylab
fig = pylab.figure()
pylab.title(mycircuit.title + " - TRAN Simulation")
pylab.plot(r['tran']['T'], r['tran']['VN1'], label="Input voltage")
pylab.hold(True)
pylab.plot(r['tran']['T'], r['tran']['VN4'], label="output voltage")
pylab.legend()
pylab.hold(False)
pylab.grid(True)
# s.connect(server_address)
mycir = ahkab.Circuit('Simple Circuit')
mycir.add_resistor('R1', 'n1', mycir.gnd, value=5)
mycir.add_vsource('V1', 'n2', 'n1', dc_value=8)
mycir.add_resistor('R2', 'n2', mycir.gnd, value=2)
mycir.add_vsource('V2', 'n3', 'n2', dc_value=4)
mycir.add_resistor('R3', 'n3', mycir.gnd, value=4)
mycir.add_resistor('R4', 'n001', 'n3', value=1)
mycir.add_vsource('V3', 'n4', mycir.gnd, dc_value=10)
mycir.add_resistor('R5', 'n2', 'n4', value=4)
mycir.add_resistor('R6','n4','n001',value=10)
opa = ahkab.new_op() # Assembles an OP analysis and returns the analysis object.
r = ahkab.run(mycir, opa)['op']
#print(r)
# print('---------------------------------------------')
# a = mycir.get_nodes_number()
# print(a)
# print('----------------------------------------------')
#print the output to a file
with open('test_file.txt', 'w') as f:
print(r, file=f)
with open('test_file.txt', 'r') as f:
data = f.read()#.replace('\n', '')
import ahkab
import matplotlib
import six
import tkinter
mycir = ahkab.Circuit('Simple Example Circuit')
mycir.add_resistor('R1', 'n1', mycir.gnd, value=5)
mycir.add_vsource('V1', 'n2', 'n1', dc_value=8)
mycir.add_resistor('R2', 'n2', mycir.gnd, value=2)
mycir.add_vsource('V2', 'n3', 'n2', dc_value=4)
mycir.add_resistor('R3', 'n3', mycir.gnd, value=4)
mycir.add_resistor('R4', 'n3', 'n4', value=1)
mycir.add_vsource('V3', 'n4', mycir.gnd, dc_value=10)
mycir.add_resistor('R5', 'n2', 'n4', value=4)
opa = ahkab.new_op()
r = ahkab.run(mycir, opa)['op']
print(r)
def test():
"""Full wave rectifier test circuit"""
cir = assemble()
## define analyses
op1 = ahkab.new_op(outfile='rectifier')
tran1 = ahkab.new_tran(0, 200e-3, 1e-4, outfile='rectifier',
verbose=0+cli*6)
# set the options
sim_opts = {}
sim_opts.update({'gmin':1e-7})
sim_opts.update({'nl_voltages_lock':False})
sim_opts.update({'nl_voltages_lock_factor':20})
sim_opts.update({'iea':1e-1})
sim_opts.update({'default_tran_method':'TRAP'})
sim_opts.update({'hmin':1e-20})
sim_opts.update({'transient_max_nr_iter':200})
## create a testbench
testbench = testing.APITest('rectifier', cir, [op1, tran1],
skip_on_travis=True, sim_opts=sim_opts,
ea=1e-1, er=1.)
## setup and test
testbench.setUp()
testbench.test()
## this section is recommended. If something goes wrong, you may call the
## test from the cli and the plots to video in the following will allow
## for quick inspection
if cli:
## re-run the test to grab the results
cir = assemble()
res = ahkab.run(cir, an_list=[op1, tran1])
# print-out for good measure
print("OP Results:")
print(list(res['op'].items()))
## plot and save interesting data
fig = plt.figure()
plt.title(cir.title + " inputs")
plt.plot(res['tran'].get_x(), res['tran']['VINA']-res['tran']['VINB'], label='Transf. input')
plt.hold(True)
plt.plot(res['tran'].get_x(), res['tran']['vint1'], label='Transformer output #1')
plt.plot(res['tran'].get_x(), res['tran']['vint2'], label='Transformer output #2')
plt.hold(False)
plt.grid(True)
plt.legend()
plt.ylabel('Voltage [V]')
plt.xlabel('Time [s]')
fig.savefig('rectf1_plot.png')
fig = plt.figure()
plt.title(cir.title + " outputs")
plt.plot(res['tran'].get_x(), res['tran']['vint4']-res['tran']['vint3'],
label="output voltage")
plt.legend()
plt.grid(True)
plt.ylabel('Voltage [V]')
plt.xlabel('Time [s]')
fig.savefig('rectf2_plot.png')
else:
testbench.tearDown()
