예제 #1
0
def test_A(pdk_dir, design_dir):
    logging.getLogger().setLevel(logging.getLevelName("CRITICAL"))

    nm = design_dir.name
    run_dir = pathlib.Path(
        os.environ['ALIGN_WORK_DIR']).resolve() / pdk_dir.name / nm
    run_dir.mkdir(parents=True, exist_ok=True)
    os.chdir(run_dir)

    args = [
        str(design_dir), '-f',
        str(design_dir / f"{nm}.sp"), '-s', nm, '-p',
        str(pdk_dir), '-flat',
        str(1 if nm in run_flat else 0), '--check', '--generate'
    ]
    results = align.CmdlineParser().parse_args(args)
    assert results is not None, f"{nm} :No results generated"

    gold_dir = pathlib.Path(os.environ['ALIGN_HOME']).resolve(
    ) / "tests" / "compiler" / "gold" / "FinFET14nm_Mock_PDK" / nm

    gds_dir = run_dir / "3_pnr" / "Results"

    for suffix in ['json']:
        for p in gold_dir.rglob(f'nm.{suffix}'):
            assert filecmp.cmp(gds_dir / p.name, gold_dir / p.name, False)
예제 #2
0
def test_row():
    nm = 'row'

    run_dir = ALIGN_WORK_DIR / f'{nm}_entrypoint2'

    if run_dir.exists():
        assert run_dir.is_dir()
        shutil.rmtree(run_dir)

    run_dir.mkdir(parents=True, exist_ok=False)

    (run_dir / '1_topology').mkdir(parents=False, exist_ok=False)
    (run_dir / '2_primitives').mkdir(parents=False, exist_ok=False)

    topmodule = gen_row_module(nm.upper())

    verilog_d = {'modules': [topmodule], 'global_signals': []}

    with (run_dir / '1_topology' /
          f'{nm.upper()}.verilog.json').open('wt') as fp:
        json.dump(verilog_d, fp=fp, indent=2)

    gen_primitives(run_dir)

    # ==========================

    os.chdir(run_dir)

    args = [
        'dummy_input_directory_can_be_anything', '-s', nm, '--flow_start',
        '3_pnr', '--skipGDS'
    ]
    results = align.CmdlineParser().parse_args(args)

    assert results is not None
예제 #3
0
def test_integration(pdk_dir, design_dir, maxerrors, router_mode, skipGDS):

    uid = os.environ.get('PYTEST_CURRENT_TEST')
    uid = uid.split(' ')[0].split(':')[-1].replace('[', '_').replace(
        ']', '').replace('-', '_')
    run_dir = pathlib.Path(os.environ['ALIGN_WORK_DIR']).resolve() / uid
    run_dir.mkdir(parents=True, exist_ok=True)
    os.chdir(run_dir)

    nm = design_dir.name

    args = [
        str(design_dir), '-f',
        str(design_dir / f"{nm}.sp"), '-s', nm, '-p',
        str(pdk_dir), '-flat',
        str(1 if nm in run_flat else 0), '-l', 'WARNING', '-v', 'INFO'
    ]
    args.extend(['--router_mode', router_mode])

    if skipGDS:
        args.extend(['--skipGDS'])
    else:
        args.extend(['--regression'])

    results = align.CmdlineParser().parse_args(args)

    assert results is not None, f"{nm} :No results generated"
    for result in results:
        _, variants = result
        for (k, v) in variants.items():
            assert 'errors' in v, f"No Layouts were generated for {nm} ({k})"
            assert v[
                'errors'] <= maxerrors, f"{nm} ({k}):Number of DRC errorrs: {str(v['errors'])}"
예제 #4
0
def test_cmdline(design,num_placements,PDN_mode,select_in_ILP):
    run_dir = ALIGN_WORK_DIR / f'{design}_{num_placements}_{1 if PDN_mode else 0}'

    if run_dir.exists():
        assert run_dir.is_dir()
        shutil.rmtree(run_dir)

    run_dir.mkdir(parents=True, exist_ok=False)
    os.chdir(run_dir)

    design_dir = ALIGN_HOME / 'examples' / design
    pdk_dir = ALIGN_HOME / 'pdks' / 'FinFET14nm_Mock_PDK'
    args = [str(design_dir), '-f', str(design_dir / f"{design}.sp"), '-s', design, '-p', str(pdk_dir), '-flat',  str(0), '-v', 'INFO', '-l', 'INFO', '-n', str(num_placements)]
    if PDN_mode:
        args.append( '--PDN_mode')
    if select_in_ILP:
        args.append( '--select_in_ILP')

    results = align.CmdlineParser().parse_args(args)

    assert results is not None, "ALIGN exception encountered"

    for result in results:
        _, variants = result
        for (k,v) in variants.items():
            print(k,v)
            assert 'errors' in v
            assert v['errors'] == 0
예제 #5
0
def test_A( pdk_dir, design_dir):
    nm = design_dir.name
    run_dir = pathlib.Path( os.environ['ALIGN_WORK_DIR']).resolve() / pdk_dir.name / nm
    run_dir.mkdir(parents=True, exist_ok=True)
    os.chdir(run_dir)

    args = [str(design_dir), '-f', str(design_dir / f"{nm}.sp"), '-s', nm, '-p', str(pdk_dir), '-flat',  str(1 if nm in run_flat else 0), '--check', '--generate']
    results = align.CmdlineParser().parse_args(args)

    assert results is not None, f"{nm} :No results generated"
    for result in results:
        _, variants = result
        for (k,v) in variants.items():
            assert 'errors' in v, f"No Layouts were generated for {nm} ({k})"
            assert v['errors'] == 0, f"{nm} ({k}):Number of DRC errorrs: {str(v['errors'])}"
예제 #6
0
def test_cmdline(design):
    run_dir = ALIGN_HOME / 'tests' / 'tmp'
    run_dir.mkdir(parents=True, exist_ok=True)
    os.chdir(run_dir)

    design_dir = ALIGN_HOME / 'examples' / design
    pdk_dir = ALIGN_HOME / 'pdks' / 'FinFET14nm_Mock_PDK'
    args = [
        str(design_dir), '-f',
        str(design_dir / f"{design}.sp"), '-s', design, '-p',
        str(pdk_dir), '-flat',
        str(0), '--check'
    ]

    results = align.CmdlineParser().parse_args(args)

    for result in results:
        _, variants = result
        for (k, v) in variants.items():
            print(k, v)
            assert 'errors' in v
            assert v['errors'] == 0
예제 #7
0
def test_regression(pdk_dir, design_dir):
    logging.getLogger().setLevel(logging.getLevelName("CRITICAL"))

    uid = os.environ.get('PYTEST_CURRENT_TEST')
    uid = uid.split(' ')[0].split(':')[-1].replace('[', '_').replace(']', '').replace('-', '_')
    run_dir = pathlib.Path(os.environ['ALIGN_WORK_DIR']).resolve() / uid
    run_dir.mkdir(parents=True, exist_ok=True)
    os.chdir(run_dir)

    nm = design_dir.name

    args = [str(design_dir), '-f', str(design_dir / f"{nm}.sp"), '-s', nm, '-p', str(pdk_dir),
            '-flat',  str(1 if nm in run_flat else 0), '--generate', '--regression']

    results = align.CmdlineParser().parse_args(args)
    assert results is not None, f"{nm} :No results generated"

    gold_dir = pathlib.Path(os.environ['ALIGN_HOME']).resolve() / "tests" / "gold" / "FinFET14nm_Mock_PDK" / nm / "regression"
    result_dir = run_dir / "regression"

    for suffix in ['v', 'const', 'lef']:
        for p in gold_dir.rglob(f'*.{suffix}'):
            assert filecmp.cmp(result_dir / p.name, gold_dir / p.name, False)
예제 #8
0
def test_verilog_json():
    nm = 'current_mirror_ota'

    run_dir = ALIGN_WORK_DIR / f'{nm}_pnr_cmdline'

    if run_dir.exists():
        assert run_dir.is_dir()
        shutil.rmtree(run_dir)

    run_dir.mkdir(parents=True, exist_ok=False)
    os.chdir(run_dir)

    design_dir = ALIGN_HOME / 'examples' / nm
    args = [str(design_dir), '--flow_stop', '3_pnr:prep']
    results = align.CmdlineParser().parse_args(args)

    os.chdir(run_dir / "3_pnr")
    nm = nm.upper()
    d = "inputs"
    argv = [
        'pnr_compiler.py', "inputs", f'{nm}.lef', f'{nm}.verilog.json',
        f'{nm}.map', 'layers.json', nm, '1', '0'
    ]
    cmdline(argv, results_dir='Results')
예제 #9
0
#!/usr/bin/env python
import align
import sys

if __name__ == '__main__':
    ret = align.CmdlineParser().parse_args()
    sys.exit(0 if ret is not None else 1)