def process():
# test, input = 32 values (8 words), output = 24 values (6 words),
# so 32*24/4 = 192 filter words
yield self.dut.input_depth_words.eq(8)
yield self.dut.filter_value_words.eq(192)
for n, (inputs, expected) in enumerate(data()):
start_run, in_store_ready, fifo_has_space = inputs
yield self.dut.start_run.eq(start_run)
yield self.dut.in_store_ready.eq(in_store_ready)
yield self.dut.fifo_has_space.eq(fifo_has_space)
yield Delay(0.25)
gate, all_output_finished, madd_done, acc_done, pp_done, out_word_done = expected
self.assertEqual((yield self.dut.gate), gate, f"case={n}")
self.assertEqual((yield self.dut.all_output_finished),
all_output_finished, f"case={n}")
self.assertEqual((yield self.dut.madd_done), madd_done,
f"case={n}")
self.assertEqual((yield self.dut.acc_done), acc_done,
f"case={n}")
self.assertEqual((yield self.dut.pp_done), pp_done,
f"case={n}")
self.assertEqual((yield self.dut.out_word_done), out_word_done,
f"case={n}")
yield
def process():
for n, (input, expected) in enumerate(DATA):
yield self.dut.input.eq(input)
yield Delay(0.25)
self.assertEqual((yield self.dut.output), expected,
f"case={n}")
yield
def process():
yield self.dut.max.eq(4)
for n, (inputs, expected) in enumerate(DATA):
restart, en = inputs
yield self.dut.restart.eq(restart)
yield self.dut.en.eq(en)
yield Delay(0.25)
self.assertEqual((yield self.dut.done), expected, f"case={n}")
yield
def send_data(self, data):
dut = self.dut
yield dut.input_data.payload.eq(data)
yield dut.input_data.valid.eq(1)
yield Delay(0.1) # Allow simulation to proceed
while not (yield dut.input_data.ready):
yield
yield
yield dut.input_data.valid.eq(0)
def process():
for n, (inputs, expected) in enumerate(DATA):
shift_en, in_value = inputs
yield self.dut.shift_en.eq(shift_en)
yield self.dut.in_value.eq(in_value)
yield Delay(0.25)
if expected is not None:
self.assertEqual((yield self.dut.result), expected,
f"case={n}")
yield
def process():
for n, (input, expected) in enumerate(DATA):
start_run, all_output_finished, in_store_ready, fifo_has_space = input
yield self.dut.start_run.eq(start_run)
yield self.dut.all_output_finished.eq(all_output_finished)
yield self.dut.in_store_ready.eq(in_store_ready)
yield self.dut.fifo_has_space.eq(fifo_has_space)
yield Delay(0.25)
self.assertEqual((yield self.dut.gate), expected, f"case={n}")
yield
def process():
for (a_word, b_word, enable, clear), expected in DATA:
yield dut.a_word.eq(a_word)
yield dut.b_word.eq(b_word)
yield dut.enable.eq(enable)
yield dut.clear.eq(clear)
yield Delay(0.1) # Wait for input values to settle
# Check on accumulator, as calcuated last cycle
self.assertEqual(expected, (yield dut.accumulator))
yield Tick()
def process():
dut = self.dut
for (waddr, wdata, we, raddr), rdata in DATA:
yield dut.write_addr.eq(waddr)
yield dut.write_data.eq(wdata)
yield dut.write_enable.eq(we)
yield dut.read_addr.eq(raddr)
yield Delay(0.1)
if rdata is not None:
self.assertEqual((yield dut.read_data), rdata)
yield
def process():
dut = self.dut
for (count, reset, next_), (value, last) in DATA:
yield dut.count.eq(count)
yield dut.reset.eq(reset)
yield dut.next.eq(next_)
yield Delay(0.1)
if value is not None:
self.assertEqual((yield dut.value), value)
if last is not None:
self.assertEqual((yield dut.last), last)
yield
def process():
for n, (inputs, expected) in enumerate(DATA):
with self.subTest(n=n, inputs=inputs, expected=expected):
new_en, new_value, ready = inputs
yield self.dut.new_en.eq(new_en)
yield self.dut.new_value.eq(new_value)
yield self.dut.output.ready.eq(ready)
yield Delay(0.25)
valid, value = expected
self.assertEqual((yield self.dut.output.valid), valid)
self.assertEqual((yield self.dut.value), value)
if valid:
self.assertEqual((yield self.dut.output.payload), value)
yield
def process():
for n, (inputs, expected) in enumerate(DATA):
start, r_data, r_rdy = inputs
yield self.dut.start.eq(start)
yield self.dut.r_data.eq(r_data)
yield self.dut.r_rdy.eq(r_rdy)
yield Delay(0.25)
r_en, done, output = expected
self.assertEqual((yield self.dut.r_en), r_en, f"case={n}")
self.assertEqual((yield self.dut.done), done, f"case={n}")
if done:
self.assertEqual((yield self.dut.output), output,
f"case={n}")
yield
def process():
yield self.dut.limit.eq(4) # depth constant for this test
yield
for n, (inputs, outputs) in enumerate(DATA):
restart, next, mem_data = inputs
yield self.dut.restart.eq(restart)
yield self.dut.next.eq(next)
yield self.dut.mem_data.eq(mem_data)
yield Delay(0.1)
mem_addr, data = outputs
self.assertEqual((yield self.dut.mem_addr), mem_addr,
f"cycle={n}")
if data is not None:
self.assertEqual((yield self.dut.data), data, f"cycle={n}")
yield
def process():
for num_allowed, start, input_valid, running, finished in data:
# Set inputs
payload = random.randrange(256)
yield dut.num_allowed.eq(num_allowed)
yield dut.start.eq(start)
yield dut.stream_in.valid.eq(input_valid)
yield dut.stream_in.payload.eq(payload)
# Allow time for inputs to apply and then check outputs
yield Delay(0.1)
self.assertEqual(running, (yield dut.running))
self.assertEqual(running, (yield dut.stream_in.ready))
if running:
self.assertEqual(payload, (yield dut.stream_out.payload))
self.assertEqual(running and input_valid,
(yield dut.stream_out.valid))
self.assertEqual(finished, (yield dut.finished))
yield
def process():
for n, (inputs, expected) in enumerate(DATA):
write_addr, write_data, read_addr = inputs
if write_addr is None:
yield self.dut.write_enable.eq(0)
else:
yield self.dut.write_enable.eq(1)
yield self.dut.write_addr.eq(write_addr)
yield self.dut.write_data.eq(write_data)
yield self.dut.read_addr.eq(read_addr)
yield Delay(0.25)
if expected[0] is not None:
self.assertEqual((yield self.dut.read_data[:32]),
expected[0])
self.assertEqual((yield self.dut.read_data[32:64]),
expected[1])
self.assertEqual((yield self.dut.read_data[64:96]),
expected[2])
self.assertEqual((yield self.dut.read_data[96:]),
expected[3])
yield
def process():
for n, (inputs, outputs) in enumerate(data):
restart, input_depth, w_data, w_en, r_next, r_finished = inputs
yield self.dut.restart.eq(restart)
if input_depth is not None:
yield self.dut.input_depth.eq(input_depth)
yield self.dut.w_data.eq(w_data)
yield self.dut.w_en.eq(w_en)
yield self.dut.r_next.eq(r_next)
yield self.dut.r_finished.eq(r_finished)
yield Delay(0.25)
w_ready, r_ready, r_data = outputs
if w_ready is not None:
self.assertEqual((yield self.dut.w_ready), w_ready,
f"cycle={n}")
if r_ready is not None:
self.assertEqual((yield self.dut.r_ready), r_ready,
f"cycle={n}")
if r_data is not None:
self.assertEqual((yield self.dut.r_data), r_data,
f"cycle={n}")
yield
def process():
for (data, data_prev, data_prev3) in zip(DATA[3:], DATA[2:], DATA):
# Set inputs
yield self.dut.input_a.eq(data.a)
yield self.dut.input_b.eq(data.b)
yield self.dut.input_first.eq(data.first)
yield self.dut.input_last.eq(data.last)
yield Delay(0.1)
# check inputs correctly passed onward
self.assertEqual((yield self.dut.output_a),
data_prev.a & 0xffff_ffff)
self.assertEqual((yield self.dut.output_b),
data_prev.b & 0xffff_ffff)
self.assertEqual((yield self.dut.output_first),
data_prev.first)
self.assertEqual((yield self.dut.output_last), data_prev.last)
# Check output is as expected
self.assertEqual((yield self.dut.output_accumulator),
data_prev3.expected)
self.assertEqual((yield self.dut.output_accumulator_new),
data_prev3.last)
yield
#
# https://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
from amaranth.sim import Delay
from amaranth_cfu import TestBase
from amaranth_cfu.util import pack128
from .input_store import Signal, InputStore
SETTLE_DELAY = Delay(0.25)
class InputStoreTest(TestBase):
def create_dut(self):
return InputStore()
def send(self, stream, payload):
yield stream.payload.eq(payload)
yield stream.valid.eq(1)
yield
while not (yield stream.ready):
yield
yield stream.valid.eq(0)
def receive(self, stream, expected):