예제 #1
0
 def InitSemaphore(self,addr):
   semaphore = AccessStruct(self.mem,SignalSemaphoreDef,struct_addr=addr)
   semaphore.w_s("ss_Owner",0)
   semaphore.w_s("ss_NestCount",0)
   semaphore.w_s("ss_QueueCount",0xffff)
   semaphore.w_s("ss_Link.ln_Type",self.NT_SIGNALSEM)
   semaphore.w_s("ss_WaitQueue.mlh_Head",semaphore.s_get_addr("ss_WaitQueue.mlh_Tail"))
   semaphore.w_s("ss_WaitQueue.mlh_Tail",0)
   semaphore.w_s("ss_WaitQueue.mlh_TailPred",semaphore.s_get_addr("ss_WaitQueue.mlh_Head"))
   return self.register_semaphore(addr)
예제 #2
0
 def InitSemaphore(self, addr):
     semaphore = AccessStruct(self.mem,
                              SignalSemaphoreDef,
                              struct_addr=addr)
     semaphore.w_s("ss_Owner", 0)
     semaphore.w_s("ss_NestCount", 0)
     semaphore.w_s("ss_QueueCount", 0xffff)
     semaphore.w_s("ss_Link.ln_Type", self.NT_SIGNALSEM)
     semaphore.w_s("ss_WaitQueue.mlh_Head",
                   semaphore.s_get_addr("ss_WaitQueue.mlh_Tail"))
     semaphore.w_s("ss_WaitQueue.mlh_Tail", 0)
     semaphore.w_s("ss_WaitQueue.mlh_TailPred",
                   semaphore.s_get_addr("ss_WaitQueue.mlh_Head"))
     return self.register_semaphore(addr)
예제 #3
0
 def AddHead(self, ctx):
     list_addr = ctx.cpu.r_reg(REG_A0)
     node_addr = ctx.cpu.r_reg(REG_A1)
     log_exec.info("AddHead(%06x, %06x)" % (list_addr, node_addr))
     l = AccessStruct(ctx.mem, ListDef, list_addr)
     n = AccessStruct(ctx.mem, NodeDef, node_addr)
     n.w_s("ln_Pred", l.s_get_addr("lh_Head"))
     h = l.r_s("lh_Head")
     n.w_s("ln_Succ", h)
     AccessStruct(ctx.mem, NodeDef, h).w_s("ln_Pred", node_addr)
     l.w_s("lh_Head", node_addr)
예제 #4
0
 def AddTail(self, ctx):
   list_addr = ctx.cpu.r_reg(REG_A0)
   node_addr = ctx.cpu.r_reg(REG_A1)
   log_exec.info("AddTail(%06x, %06x)" % (list_addr, node_addr))
   l = AccessStruct(ctx.mem, ListDef, list_addr)
   n = AccessStruct(ctx.mem, NodeDef, node_addr)
   n.w_s("ln_Succ", l.s_get_addr("lh_Tail"))
   tp = l.r_s("lh_TailPred")
   n.w_s("ln_Pred", tp)
   AccessStruct(ctx.mem, NodeDef, tp).w_s("ln_Succ", node_addr)
   l.w_s("lh_TailPred", node_addr)