def toolchain_erase(self):
""" Erases the LUNA board's flash. """
from apollo_fpga import ApolloDebugger
from apollo_fpga.flash import ensure_flash_gateware_loaded
# Create our connection to the debug module.
debugger = ApolloDebugger()
ensure_flash_gateware_loaded(debugger, platform=self.__class__())
with debugger.flash as flash:
flash.erase()
debugger.soft_reset()
def toolchain_erase(self):
""" Erases the LUNA board's flash. """
from apollo_fpga import ApolloDebugger
from apollo_fpga.ecp5 import ECP5_JTAGProgrammer
# Create our connection to the debug module.
debugger = ApolloDebugger()
self._ensure_unconfigured(debugger)
with debugger.jtag as jtag:
programmer = ECP5_JTAGProgrammer(jtag)
programmer.erase_flash()
debugger.soft_reset()
def toolchain_flash(self, products, name="top"):
""" Programs the LUNA board's flash via its sideband connection. """
from apollo_fpga import ApolloDebugger
from apollo_fpga.flash import ensure_flash_gateware_loaded
# Create our connection to the debug module.
debugger = ApolloDebugger()
ensure_flash_gateware_loaded(debugger, platform=self.__class__())
# Grab our generated bitstream, and upload it to the .
bitstream = products.get("{}.bit".format(name))
with debugger.flash as flash:
flash.program(bitstream)
debugger.soft_reset()
def toolchain_flash(self, products, name="top"):
""" Programs the LUNA board's flash via its sideband connection. """
from apollo_fpga import ApolloDebugger
from apollo_fpga.ecp5 import ECP5_JTAGProgrammer
# Create our connection to the debug module.
debugger = ApolloDebugger()
self._ensure_unconfigured(debugger)
# Grab our generated bitstream, and upload it to the .
bitstream = products.get("{}.bit".format(name))
with debugger.jtag as jtag:
programmer = ECP5_JTAGProgrammer(jtag)
programmer.flash(bitstream)
debugger.soft_reset()
def main():
commands = {
# Info queries
'info': print_device_info,
'jtag-scan': print_chain_info,
# JTAG commands
'svf': play_svf_file,
'configure': configure_fpga,
'reconfigure': reconfigure_ecp5,
# SPI debug exchanges
'spi': debug_spi,
'spi-inv': debug_spi_inv,
'spi-reg': debug_spi_register,
# JTAG-SPI debug exchanges.
'jtag-spi': jtag_debug_spi,
'jtag-reg': jtag_debug_spi_register,
# Misc
'leds': set_led_pattern,
}
# Set up a simple argument parser.
parser = argparse.ArgumentParser(
description="Apollo FPGA Configuration / Debug tool",
formatter_class=argparse.RawTextHelpFormatter)
parser.add_argument('command',
metavar='command:',
choices=commands,
help=COMMAND_HELP_TEXT)
parser.add_argument(
'argument',
metavar="[argument]",
nargs='?',
help='the argument to the given command; often a filename')
parser.add_argument('value',
metavar="[value]",
nargs='?',
help='the value to a register write command')
args = parser.parse_args()
device = ApolloDebugger()
# Set up python's logging to act as a simple print, for now.
logging.basicConfig(level=logging.INFO, format="%(message)-s")
# Execute the relevant command.
command = commands[args.command]
command(device, args)
def toolchain_program(self, products, name):
""" Programs the relevant LUNA board via its sideband connection. """
from apollo_fpga import ApolloDebugger
from apollo_fpga.ecp5 import ECP5_JTAGProgrammer
# Create our connection to the debug module.
debugger = ApolloDebugger()
# Grab our generated bitstream, and upload it to the FPGA.
bitstream = products.get("{}.bit".format(name))
with debugger.jtag as jtag:
programmer = ECP5_JTAGProgrammer(jtag)
programmer.configure(bitstream)
def toolchain_program(self, products, name):
""" Programs the relevant Daisho board via its sideband connection. """
from apollo_fpga import ApolloDebugger
from apollo_fpga.intel import IntelJTAGProgrammer
# If the user has opted to use their own programming cable, use it instead.
if os.environ.get("PROGRAM_WITH_QUARTUS", False):
self._toolchain_program_quartus(products, name)
return
# Create our connection to the debug module.
debugger = ApolloDebugger()
# Grab our generated bitstream, and upload it to the FPGA.
bitstream = products.get("{}.rbf".format(name))
with debugger.jtag as jtag:
programmer = IntelJTAGProgrammer(jtag)
programmer.configure(bitstream)
psram.perform_write.eq(0),
psram.register_space.eq(1),
psram.final_word.eq(1),
psram.start_transfer.eq(psram_address_changed),
psram.address.eq(psram_address),
]
# Return our elaborated module.
return m
if __name__ == "__main__":
test = top_level_cli(HyperRAMDiagnostic)
# Create a debug and ILA connection.
dut = ApolloDebugger()
logging.info(
f"Connected to onboard dut; hardware revision r{dut.major}.{dut.minor} (s/n: {dut.serial_number})."
)
logging.info("Running basic HyperRAM diagnostics.")
iterations = 100
passes = 0
failures = 0
failed_tests = set()
def test_id_read():
dut.registers.register_write(REGISTER_RAM_REG_ADDR, 0x0)
dut.registers.register_write(REGISTER_RAM_REG_ADDR, 0x0)
# Create a simple SFR that will trigger an ILA capture when written,
# and which will display our sample status read.
spi_registers.add_sfr(REGISTER_ILA,
read=self.ila.complete,
write_strobe=self.ila.trigger)
# Attach the LEDs and User I/O to the MSBs of our counter.
leds = [platform.request("led", i, dir="o") for i in range(0, 6)]
m.d.comb += Cat(leds).eq(self.counter[-7:-1])
# Return our elaborated module.
return m
if __name__ == "__main__":
example = top_level_cli(ILASharedBusExample)
# Create a debug and ILA connection.
debugger = ApolloDebugger()
ila = ApolloILAFrontend(debugger, ila=example.ila, use_inverted_cs=True)
# Trigger an ILA capture.
debugger.spi.register_write(REGISTER_ILA, 0)
# Wait for the capture to be complete.
while not debugger.spi.register_read(REGISTER_ILA):
time.sleep(0.001)
# Finally, read back the capture and display it on-screen.
ila.interactive_display()
