def execute(self, processor):
if processor.condition_passed():
try:
processor.null_check_if_thumbee(self.n)
except EndOfInstruction:
pass
else:
offset_addr = bits_add(processor.registers.get(
self.n), self.imm32, 32) if self.add else bits_sub(
processor.registers.get(self.n), self.imm32, 32)
address = offset_addr if self.index else processor.registers.get(
self.n)
if have_lpae() and lower_chunk(address, 3) == 0b000:
if processor.big_endian():
data = chain(processor.registers.get(self.t),
processor.registers.get(self.t2), 32)
else:
data = chain(processor.registers.get(self.t2),
processor.registers.get(self.t), 32)
processor.mem_a_set(address, 8, data)
else:
processor.mem_a_set(address, 4,
processor.registers.get(self.t))
processor.mem_a_set(bits_add(address, 4, 32), 4,
processor.registers.get(self.t2))
if self.wback:
processor.registers.set(self.n, offset_addr)
def from_bitarray(instr, processor):
imm8 = substring(instr, 7, 0)
rd = substring(instr, 11, 8)
imm3 = substring(instr, 14, 12)
i = bit_at(instr, 26)
imm32 = chain(i, chain(imm3, imm8, 8), 11)
if rd in (13, 15):
print('unpredictable')
else:
return AdrT3(instr, add=True, d=rd, imm32=imm32)
def from_bitarray(instr, processor):
imm8 = substring(instr, 7, 0)
imm3 = substring(instr, 14, 12)
rn = substring(instr, 19, 16)
i = bit_at(instr, 26)
imm32 = thumb_expand_imm(chain(i, chain(imm3, imm8, 8), 11))
if rn == 15:
print('unpredictable')
else:
return CmpImmediateT2(instr, n=rn, imm32=imm32)
def from_bitarray(instr, processor):
imm8 = substring(instr, 7, 0)
rd = substring(instr, 11, 8)
imm3 = substring(instr, 14, 12)
setflags = bit_at(instr, 20)
i = bit_at(instr, 26)
imm32, carry = thumb_expand_imm_c(chain(i, chain(imm3, imm8, 8), 11), processor.registers.cpsr.c)
if rd in (13, 15):
print('unpredictable')
else:
return MovImmediateT2(instr, setflags=setflags, d=rd, imm32=imm32, carry=carry)
def from_bitarray(instr, processor):
imm8 = substring(instr, 7, 0)
rd = substring(instr, 11, 8)
imm3 = substring(instr, 14, 12)
imm4 = substring(instr, 19, 16)
i = bit_at(instr, 26)
imm16 = chain(imm4, chain(i, chain(imm3, imm8, 8), 11), 12)
if rd in (13, 15):
print('unpredictable')
else:
return MovtT1(instr, d=rd, imm16=imm16)
def from_bitarray(instr, processor):
imm8 = substring(instr, 7, 0)
imm3 = substring(instr, 14, 12)
rn = substring(instr, 19, 16)
i = bit_at(instr, 26)
imm32, carry = thumb_expand_imm_c(chain(i, chain(imm3, imm8, 8), 11),
processor.registers.cpsr.c)
if rn in (13, 15):
print('unpredictable')
else:
return TeqImmediateT1(instr, n=rn, imm32=imm32, carry=carry)
def from_bitarray(instr, processor):
imm8 = substring(instr, 7, 0)
rd = substring(instr, 11, 8)
imm3 = substring(instr, 14, 12)
setflags = bit_at(instr, 20)
i = bit_at(instr, 26)
imm32 = thumb_expand_imm(chain(i, chain(imm3, imm8, 8), 11))
if rd == 15 and not setflags:
print('unpredictable')
else:
return SubSpMinusImmediateT2(instr, setflags=setflags, d=rd, imm32=imm32)
def from_bitarray(instr, processor):
imm8 = substring(instr, 7, 0)
rd = substring(instr, 11, 8)
imm3 = substring(instr, 14, 12)
imm4 = substring(instr, 19, 16)
i = bit_at(instr, 26)
imm32 = chain(imm4, chain(i, chain(imm3, imm8, 8), 11), 12)
if rd in (13, 15):
print('unpredictable')
else:
return MovImmediateT3(instr, setflags=False, d=rd, imm32=imm32)
def from_bitarray(instr, processor):
imm8 = substring(instr, 7, 0)
rd = substring(instr, 11, 8)
imm3 = substring(instr, 14, 12)
rn = substring(instr, 19, 16)
setflags = bit_at(instr, 20)
i = bit_at(instr, 26)
imm32 = thumb_expand_imm(chain(i, chain(imm3, imm8, 8), 11))
if rd in (13, 15) or rn in (13, 15):
print('unpredictable')
else:
return SbcImmediateT1(instr, setflags=setflags, d=rd, n=rn, imm32=imm32)
def from_bitarray(instr, processor):
imm8 = substring(instr, 7, 0)
rd = substring(instr, 11, 8)
imm3 = substring(instr, 14, 12)
rn = substring(instr, 19, 16)
i = bit_at(instr, 26)
setflags = False
imm32 = chain(i, chain(imm3, imm8, 8), 11)
if rd in (13, 15):
print('unpredictable')
else:
return AddImmediateThumbT4(instr, setflags=setflags, d=rd, n=rn, imm32=imm32)
def from_bitarray(instr, processor):
imm8 = substring(instr, 7, 0)
rd = substring(instr, 11, 8)
imm3 = substring(instr, 14, 12)
rn = substring(instr, 19, 16)
setflags = bit_at(instr, 20)
i = bit_at(instr, 26)
imm32, carry = thumb_expand_imm_c(chain(i, chain(imm3, imm8, 8), 11), processor.registers.cpsr.c)
if rd == 13 or (rd == 15 and not setflags) or rn in (13, 15):
print('unpredictable')
else:
return BicImmediateT1(instr, setflags=setflags, d=rd, n=rn, imm32=imm32, carry=carry)
def from_bitarray(instr, processor):
imm8 = substring(instr, 7, 0)
rd = substring(instr, 11, 8)
imm3 = substring(instr, 14, 12)
i = bit_at(instr, 26)
setflags = False
imm32 = chain(i, chain(imm3, imm8, 8), 11)
if rd == 15:
print('unpredictable')
else:
return AddSpPlusImmediateT4(instr,
setflags=setflags,
d=rd,
imm32=imm32)
def from_bitarray(instr, processor):
imm11 = substring(instr, 10, 0)
j2 = bit_at(instr, 11)
j1 = bit_at(instr, 13)
imm10 = substring(instr, 25, 16)
s = bit_at(instr, 26)
i1 = bit_not(j1 ^ s, 1)
i2 = bit_not(j2 ^ s, 1)
imm32 = sign_extend(
chain(s, chain(i1, chain(i2, chain(imm10, imm11 << 1, 12), 22),
23), 24), 25, 32)
if processor.in_it_block() and not processor.last_in_it_block():
print('unpredictable')
else:
return BT4(instr, imm32=imm32)
def from_bitarray(instr, processor):
rn = substring(instr, 2, 0)
imm5 = substring(instr, 7, 3)
i = bit_at(instr, 9)
nonzero = bit_at(instr, 11)
imm32 = chain(i, imm5, 5) << 2
return CbzT1(instr, nonzero=nonzero, n=rn, imm32=imm32)
def decode_instruction(instr):
instr_l = bit_at(instr, 20)
instr_op = substring(instr, 24, 23)
instr_w_rn = chain(bit_at(instr, 21), substring(instr, 19, 16), 4)
if instr_op == 0b00 and not instr_l:
# Store Return State
return SrsThumbT1
elif instr_op == 0b00 and instr_l:
# Return From Exception
return RfeT1
elif instr_op == 0b01 and not instr_l:
# Store Multiple (Increment After, Empty Ascending)
return StmT2
elif instr_op == 0b01 and instr_l and instr_w_rn != 0b11101:
# Load Multiple (Increment After, Full Descending)
return LdmThumbT2
elif instr_op == 0b01 and instr_l and instr_w_rn == 0b11101:
# Pop Multiple Registers from the stack
return PopThumbT2
elif instr_op == 0b10 and not instr_l and instr_w_rn != 0b11101:
# Store Multiple (Decrement Before, Full Descending)
return StmdbT1
elif instr_op == 0b10 and not instr_l and instr_w_rn == 0b11101:
# Push Multiple Registers to the stack.
return PushT2
elif instr_op == 0b10 and instr_l:
# Load Multiple (Decrement Before, Empty Ascending)
return LdmdbT1
elif instr_op == 0b11 and not instr_l:
# Store Return State
return SrsThumbT2
elif instr_op == 0b11 and instr_l:
# Return From Exception
return RfeT2
def it_advance(self):
if bits_ops.lower_chunk(self.cpsr.it, 3) == 0b000:
self.cpsr.it = 0
else:
itstate = self.cpsr.it
mask, carry = shift.lsl_c(bits_ops.lower_chunk(itstate, 4), 4, 1)
condition_state = chain(carry, mask, 4)
self.cpsr.it = set_substring(itstate, 4, 0, condition_state)
def from_bitarray(instr, processor):
imm24 = substring(instr, 23, 0)
h = bit_at(instr, 24)
imm32 = sign_extend(chain(imm24, h, 1) << 1, 26, 32)
target_instrset = InstrSet.THUMB
return BlBlxImmediateA2(instr,
target_instr_set=target_instrset,
imm32=imm32)
def from_bitarray(instr, processor):
imm4 = substring(instr, 3, 0)
imm12 = substring(instr, 19, 8)
imm32 = chain(imm12, imm4, 4)
if substring(instr, 31, 28) != 0b1110:
print('unpredictable')
else:
return BkptA1(instr)
def from_bitarray(instr, processor):
imm11 = substring(instr, 10, 0)
j2 = bit_at(instr, 11)
j1 = bit_at(instr, 13)
imm10 = substring(instr, 25, 16)
s = bit_at(instr, 26)
i1 = bit_not(j1 ^ s, 1)
i2 = bit_not(j2 ^ s, 1)
imm32 = sign_extend(
chain(s, chain(i1, chain(i2, chain(imm10, imm11 << 1, 12), 22),
23), 24), 25, 32)
target_instr_set = processor.registers.current_instr_set()
if processor.in_it_block() and not processor.last_in_it_block():
print('unpredictable')
else:
return BlBlxImmediateT1(instr,
target_instr_set=target_instr_set,
imm32=imm32)
def from_bitarray(instr, processor):
imm12 = substring(instr, 11, 0)
rd = substring(instr, 15, 12)
imm4 = substring(instr, 19, 16)
imm32 = chain(imm4, imm12, 12)
if rd == 15:
print('unpredictable')
else:
return MovImmediateA2(instr, setflags=False, d=rd, imm32=imm32)
def from_bitarray(instr, processor):
register_list = substring(instr, 12, 0)
m = bit_at(instr, 14)
unaligned_allowed = True
registers = chain(m, register_list, 14)
if bit_count(registers, 1, 16) < 2:
print('unpredictable')
else:
return PushT2(instr, registers=registers, unaligned_allowed=unaligned_allowed)
def from_bitarray(instr, processor):
imm12 = substring(instr, 11, 0)
rd = substring(instr, 15, 12)
imm4 = substring(instr, 19, 16)
imm16 = chain(imm4, imm12, 12)
if rd == 15:
print('unpredictable')
else:
return MovtA1(instr, d=rd, imm16=imm16)
def from_bitarray(instr, processor):
rd = chain(bit_at(instr, 7), substring(instr, 2, 0), 3)
rm = substring(instr, 6, 3)
setflags = False
if rd == 15 and processor.in_it_block(
) and not processor.last_in_it_block():
print('unpredictable')
else:
return MovRegisterThumbT1(instr, setflags=setflags, m=rm, d=rd)
def execute(self, processor):
if processor.condition_passed():
try:
processor.null_check_if_thumbee(self.n)
except EndOfInstruction:
pass
else:
address = processor.registers.get(self.n)
t = processor.registers.get(self.t)
t2 = processor.registers.get(self.t2)
value = chain(t, t2, 32) if processor.big_endian() else chain(
t2, t, 32)
if processor.exclusive_monitors_pass(address, 4):
processor.mem_a_set(address, 8, value)
processor.registers.set(
self.d, 0b00000000000000000000000000000000)
else:
processor.registers.set(
self.d, 0b00000000000000000000000000000001)
def from_bitarray(instr, processor):
msb = substring(instr, 4, 0)
imm2 = substring(instr, 7, 6)
rd = substring(instr, 11, 8)
imm3 = substring(instr, 14, 12)
lsbit = chain(imm3, imm2, 2)
if rd in (13, 15):
print('unpredictable')
else:
return BfcT1(instr, lsbit=lsbit, msbit=msb, d=rd)
def from_bitarray(instr, processor):
register_list = substring(instr, 12, 0)
p_m = substring(instr, 15, 14)
registers = chain(p_m, register_list, 14)
unaligned_allowed = False
if bit_count(registers, 1, 16) < 2 or (p_m == 0b11) or (
bit_at(registers, 15) and processor.in_it_block() and not processor.last_in_it_block()):
print('unpredictable')
else:
return PopThumbT2(instr, registers=registers, unaligned_allowed=unaligned_allowed)
def execute(self, processor):
if processor.condition_passed():
n = processor.registers.get(self.n)
result1, sat1 = unsigned_sat_q(to_signed(substring(n, 15, 0), 16),
self.saturate_to)
result2, sat2 = unsigned_sat_q(to_signed(substring(n, 31, 16), 16),
self.saturate_to)
processor.registers.set(self.d, chain(result2, result1, 16))
if sat1 or sat2:
processor.registers.cpsr.q = 1
def decode_instruction(instr):
instr_op = substring(instr, 24, 20)
instr_rn = substring(instr, 19, 16)
instr_14_12_7_6 = chain(substring(instr, 14, 12), substring(instr, 7, 6),
2)
if instr_op == 0b00000 and instr_rn != 0b1111:
# Add Wide (12-bit)
if instr_rn == 0b1101:
return AddSpPlusImmediateT4
else:
return AddImmediateThumbT4
elif instr_op == 0b00000 and instr_rn == 0b1111:
# Form PC-relative Address
return AdrT3
elif instr_op == 0b00100:
# Move Wide (16-bit)
return MovImmediateT3
elif instr_op == 0b01010 and instr_rn != 0b1111:
# Subtract Wide (12-bit)
if instr_rn == 0b1101:
return SubSpMinusImmediateT3
else:
return SubImmediateThumbT4
elif instr_op == 0b01010 and instr_rn == 0b1111:
# Form PC-relative Address
return AdrT2
elif instr_op == 0b01100:
# Move Top (16-bit)
return MovtT1
elif instr_op == 0b10000 or (instr_op == 0b10010
and not (instr_14_12_7_6 == 0b00000)):
# Signed Saturate
return SsatT1
elif instr_op == 0b10010 and (instr_14_12_7_6 == 0b00000):
# Signed Saturate, two 16-bit
return Ssat16T1
elif instr_op == 0b10100:
# Signed Bit Field Extract
return SbfxT1
elif instr_op == 0b10110 and instr_rn != 0b1111:
# Bit Field Insert
return BfiT1
elif instr_op == 0b10110 and instr_rn == 0b1111:
# Bit Field Clear
return BfcT1
elif instr_op == 0b11000 or (instr_op == 0b11010
and not (instr_14_12_7_6 == 0b00000)):
# Unsigned Saturate
return UsatT1
elif instr_op == 0b11010 and (instr_14_12_7_6 == 0b00000):
# Unsigned Saturate, two 16-bit
return Usat16T1
elif instr_op == 0b11100:
# Unsigned Bit Field Extract
return UbfxT1
def from_bitarray(instr, processor):
rm = substring(instr, 3, 0)
type_o = substring(instr, 5, 4)
imm2 = substring(instr, 7, 6)
imm3 = substring(instr, 14, 12)
rn = substring(instr, 19, 16)
shift_t, shift_n = decode_imm_shift(type_o, chain(imm3, imm2, 2))
if rn in (13, 15) or rm in (13, 15):
print('unpredictable')
else:
return TstRegisterT2(instr, m=rm, n=rn, shift_t=shift_t, shift_n=shift_n)
def from_bitarray(instr, processor):
register_list = substring(instr, 12, 0)
m = bit_at(instr, 14)
wback = bit_at(instr, 21)
rn = substring(instr, 19, 16)
registers = chain(m, register_list, 14)
if rn == 15 or bit_count(registers, 1, 16) < 2 or (wback and bit_at(
registers, rn)):
print('unpredictable')
else:
return StmT2(instr, wback=wback, registers=registers, n=rn)
