def from_bitarray(instr, processor):
rm = substring(instr, 3, 0)
imm5 = substring(instr, 11, 7)
rd = substring(instr, 15, 12)
s = bit_at(instr, 20)
shift_t, shift_n = decode_imm_shift(0b00, imm5)
return LslImmediateA1(instr, setflags=s, m=rm, d=rd, shift_n=shift_n)
def from_bitarray(instr, processor):
imm5 = substring(instr, 10, 6)
rd = substring(instr, 2, 0)
rm = substring(instr, 5, 3)
set_flags = not processor.in_it_block()
shift_n = decode_imm_shift(0b01, imm5)[1]
return LsrImmediateT1(instr,
setflags=set_flags,
m=rm,
d=rd,
shift_n=shift_n)
def from_bitarray(instr, processor):
rm = substring(instr, 3, 0)
imm2 = substring(instr, 7, 6)
rd = substring(instr, 11, 8)
imm3 = substring(instr, 14, 12)
setflags = bit_at(instr, 20)
shift_t, shift_n = decode_imm_shift(0b11, chain(imm3, imm2, 2))
if rd in (13, 15) or rm in (13, 15):
print('unpredictable')
else:
return RorImmediateT1(instr, setflags=setflags, m=rm, d=rd, shift_n=shift_n)
def from_bitarray(instr, processor):
rm = substring(instr, 3, 0)
type_o = substring(instr, 6, 5)
imm5 = substring(instr, 11, 7)
rn = substring(instr, 19, 16)
shift_t, shift_n = decode_imm_shift(type_o, imm5)
return CmpRegisterA1(instr,
m=rm,
n=rn,
shift_t=shift_t,
shift_n=shift_n)
def from_bitarray(instr, processor):
rm = substring(instr, 3, 0)
type_o = substring(instr, 5, 4)
imm2 = substring(instr, 7, 6)
imm3 = substring(instr, 14, 12)
rn = substring(instr, 19, 16)
shift_t, shift_n = decode_imm_shift(type_o, chain(imm3, imm2, 2))
if rn in (13, 15) or rm in (13, 15):
print('unpredictable')
else:
return TstRegisterT2(instr, m=rm, n=rn, shift_t=shift_t, shift_n=shift_n)
def from_bitarray(instr, processor):
rm = substring(instr, 3, 0)
type_o = substring(instr, 5, 4)
imm2 = substring(instr, 7, 6)
rd = substring(instr, 11, 8)
imm3 = substring(instr, 14, 12)
setflags = bit_at(instr, 20)
shift_t, shift_n = decode_imm_shift(type_o, chain(imm3, imm2, 2))
if rd in (13, 15) or rm in (13, 15):
print('unpredictable')
else:
return MvnRegisterT2(instr, setflags=setflags, m=rm, d=rd, shift_t=shift_t, shift_n=shift_n)
def from_bitarray(instr, processor):
saturate_to = substring(instr, 4, 0)
imm2 = substring(instr, 7, 6)
rd = substring(instr, 11, 8)
imm3 = substring(instr, 14, 12)
rn = substring(instr, 19, 16)
sh = bit_at(instr, 21)
shift_t, shift_n = decode_imm_shift(sh << 2, chain(imm3, imm2, 2))
if rd in (13, 15) or rn in (13, 15):
print('unpredictable')
else:
return UsatT1(instr, saturate_to=saturate_to, d=rd, n=rn, shift_t=shift_t, shift_n=shift_n)
def from_bitarray(instr, processor):
rm = substring(instr, 3, 0)
type_o = substring(instr, 6, 5)
imm5 = substring(instr, 11, 7)
rd = substring(instr, 15, 12)
s = bit_at(instr, 20)
shift_t, shift_n = decode_imm_shift(type_o, imm5)
return SubSpMinusRegisterA1(instr,
setflags=s,
m=rm,
d=rd,
shift_t=shift_t,
shift_n=shift_n)
def from_bitarray(instr, processor):
rm = substring(instr, 3, 0)
type_o = substring(instr, 6, 5)
imm5 = substring(instr, 11, 7)
rt = substring(instr, 15, 12)
rn = substring(instr, 19, 16)
add = bit_at(instr, 23)
shift_t, shift_n = decode_imm_shift(type_o, imm5)
post_index = True
if rt == 15 or rn == 15 or rn == rt or rm or (arch_version() < 6 and rm == rn):
print('unpredictable')
else:
return StrbtA2(instr, register_form=True, add=add, post_index=post_index, t=rt, n=rn, m=rm, shift_t=shift_t,
shift_n=shift_n)
def from_bitarray(instr, processor):
rm = substring(instr, 3, 0)
type_o = substring(instr, 6, 5)
imm5 = substring(instr, 11, 7)
rn = substring(instr, 19, 16)
opcode = substring(instr, 24, 21)
shift_t, shift_n = decode_imm_shift(type_o, imm5)
return SubsPcLrArmA2(instr,
register_form=True,
n=rn,
opcode=opcode,
m=rm,
shift_t=shift_t,
shift_n=shift_n)
def from_bitarray(instr, processor):
rn = substring(instr, 3, 0)
sh = bit_at(instr, 6)
imm5 = substring(instr, 11, 7)
rd = substring(instr, 15, 12)
saturate_to = substring(instr, 20, 16)
shift_t, shift_n = decode_imm_shift(sh << 1, imm5)
if rd == 15 or rn == 15:
print('unpredictable')
else:
return UsatA1(instr,
saturate_to=saturate_to,
d=rd,
n=rn,
shift_t=shift_t,
shift_n=shift_n)
def from_bitarray(instr, processor):
rm = substring(instr, 3, 0)
type_o = substring(instr, 6, 5)
imm5 = substring(instr, 11, 7)
rt = substring(instr, 15, 12)
rn = substring(instr, 19, 16)
index = bit_at(instr, 24)
add = bit_at(instr, 23)
w = bit_at(instr, 21)
wback = (not index) or w
shift_t, shift_n = decode_imm_shift(type_o, imm5)
if rm == 15 or (wback and (rn == 15 or rn == rt)) or (arch_version() < 6 and wback and rm == rn):
print('unpredictable')
else:
return StrRegisterA1(instr, add=add, wback=wback, index=index, m=rm, t=rt, n=rn, shift_t=shift_t,
shift_n=shift_n)
def from_bitarray(instr, processor):
rm = substring(instr, 3, 0)
tb_form = bit_at(instr, 6)
imm5 = substring(instr, 11, 7)
rd = substring(instr, 15, 12)
rn = substring(instr, 19, 16)
shift_t, shift_n = decode_imm_shift(tb_form << 1, imm5)
if rd == 15 or rm == 15 or rn == 15:
print('unpredictable')
else:
return PkhA1(instr,
tb_form=tb_form,
m=rm,
d=rd,
n=rn,
shift_t=shift_t,
shift_n=shift_n)
def from_bitarray(instr, processor):
rm = substring(instr, 3, 0)
type_o = substring(instr, 6, 5)
imm5 = substring(instr, 11, 7)
rn = substring(instr, 19, 16)
is_pldw = bit_at(instr, 22) == 0
add = bit_at(instr, 23)
shift_t, shift_n = decode_imm_shift(type_o, imm5)
if rm == 15 or (rn == 15 and is_pldw):
print('unpredictable')
else:
return PldRegisterA1(instr,
add=add,
is_pldw=is_pldw,
m=rm,
n=rn,
shift_t=shift_t,
shift_n=shift_n)
def from_bitarray(instr, processor):
rm = substring(instr, 3, 0)
type_ = substring(instr, 5, 4)
imm2 = substring(instr, 7, 6)
rd = substring(instr, 11, 8)
imm3 = substring(instr, 14, 12)
setflags = bit_at(instr, 20)
shift_t, shift_n = decode_imm_shift(type_, chain(imm3, imm2, 2))
if rd == 13 and (shift_t != SRType.LSL or shift_n > 3) or (
rd == 15 and not setflags) or rm in (13, 15):
print('unpredictable')
else:
return AddSpPlusRegisterThumbT3(instr,
setflags=setflags,
m=rm,
d=rd,
shift_t=shift_t,
shift_n=shift_n)
def from_bitarray(instr, processor):
rm = substring(instr, 3, 0)
type_o = substring(instr, 5, 4)
imm2 = substring(instr, 7, 6)
rd = substring(instr, 11, 8)
imm3 = substring(instr, 14, 12)
rn = substring(instr, 19, 16)
setflags = bit_at(instr, 20)
shift_t, shift_n = decode_imm_shift(type_o, chain(imm3, imm2, 2))
if rd == 13 or (rd == 15
and not setflags) or rn == 15 or rm in (13, 15):
print('unpredictable')
else:
return AddRegisterThumbT3(instr,
setflags=setflags,
m=rm,
d=rd,
n=rn,
shift_t=shift_t,
shift_n=shift_n)
def from_bitarray(instr, processor):
rm = substring(instr, 3, 0)
tbform = bit_at(instr, 5)
t = bit_at(instr, 4)
imm2 = substring(instr, 7, 6)
rd = substring(instr, 11, 8)
imm3 = substring(instr, 14, 12)
rn = substring(instr, 19, 16)
s = bit_at(instr, 20)
shift_t, shift_n = decode_imm_shift(tbform << 1, chain(imm3, imm2, 2))
if s or t:
raise UndefinedInstructionException()
elif rn in (13, 15) or rm in (13, 15) or rd in (13, 15):
print('unpredictable')
else:
return PkhT1(instr,
tb_form=tbform,
m=rm,
d=rd,
n=rn,
shift_t=shift_t,
shift_n=shift_n)
