def main(): parser = argparse.ArgumentParser( description="ARTIQ device binary builder for Kasli systems") builder_args(parser) soc_kasli_args(parser) parser.set_defaults(output_dir="artiq_kasli") parser.add_argument("-V", "--variant", default="opticlock", help="variant: opticlock/sysu/master/satellite " "(default: %(default)s)") args = parser.parse_args() variant = args.variant.lower() if variant == "opticlock": cls = Opticlock elif variant == "sysu": cls = SYSU elif variant == "master": cls = Master elif variant == "satellite": cls = Satellite else: raise SystemExit("Invalid variant (-V/--variant)") soc = cls(**soc_kasli_argdict(args)) build_artiq_soc(soc, builder_argdict(args))
def main(): parser = argparse.ArgumentParser( description="KC705 gateware and firmware builder") builder_args(parser) soc_kc705_args(parser) parser.set_defaults(output_dir="artiq_kc705") parser.add_argument("-V", "--variant", default="nist_clock", help="variant: " "nist_clock/nist_qc2/sma_spi " "(default: %(default)s)") args = parser.parse_args() variant = args.variant.lower() if variant == "nist_clock": cls = NIST_CLOCK elif variant == "nist_qc2": cls = NIST_QC2 elif variant == "sma_spi": cls = SMA_SPI else: raise SystemExit("Invalid variant (-V/--variant)") soc = cls(**soc_kc705_argdict(args)) build_artiq_soc(soc, builder_argdict(args))
def main(): parser = argparse.ArgumentParser( description="ARTIQ device binary builder for AFCK 1v1 systems") builder_args(parser) soc_afck1v1_args(parser) parser.set_defaults(output_dir="artiq_afck1v1") args = parser.parse_args() soc = StandaloneBase(**soc_afck1v1_argdict(args)) build_artiq_soc(soc, builder_argdict(args))
def main(): parser = argparse.ArgumentParser( description="Sayma AMC gateware and firmware builder") builder_args(parser) soc_sdram_args(parser) parser.set_defaults(output_dir="artiq_sayma") parser.add_argument("-V", "--variant", default="standalone", help="variant: " "standalone/masterdac/master/satellite " "(default: %(default)s)") parser.add_argument( "--rtm-csr-csv", default=os.path.join("artiq_sayma", "rtm_gateware", "rtm_csr.csv"), help="CSV file listing remote CSRs on RTM (default: %(default)s)") parser.add_argument( "--without-sawg", default=False, action="store_true", help="Remove SAWG RTIO channels feeding the JESD links (speeds up " "compilation time). Replaces them with fixed pattern generators.") args = parser.parse_args() variant = args.variant.lower() if variant == "standalone": cls = Standalone elif variant == "masterdac": cls = MasterDAC elif variant == "master": cls = Master elif variant == "satellite": cls = Satellite else: raise SystemExit("Invalid variant (-V/--variant)") soc = cls(with_sawg=not args.without_sawg, **soc_sdram_argdict(args)) if variant != "master": remote_csr_regions = remote_csr.get_remote_csr_regions( soc.mem_map["serwb"] | soc.shadow_base, args.rtm_csr_csv) for name, origin, busword, csrs in remote_csr_regions: soc.add_csr_region(name, origin, busword, csrs) # Configuration for RTM peripherals. Keep in sync with sayma_rtm.py! soc.config["HAS_HMC830_7043"] = None soc.config["CONVERTER_SPI_HMC830_CS"] = 0 soc.config["CONVERTER_SPI_HMC7043_CS"] = 1 soc.config["CONVERTER_SPI_FIRST_AD9154_CS"] = 2 build_artiq_soc(soc, builder_argdict(args))
def main(): parser = argparse.ArgumentParser( description="Sayma AMC gateware and firmware builder") builder_args(parser) soc_sdram_args(parser) parser.set_defaults(output_dir="artiq_sayma") parser.add_argument("-V", "--variant", default="standalone", help="variant: " "standalone/master/satellite " "(default: %(default)s)") parser.add_argument("--rtm-csr-csv", default=os.path.join("artiq_sayma", "rtm_gateware", "rtm_csr.csv"), help="CSV file listing remote CSRs on RTM (default: %(default)s)") parser.add_argument("--without-sawg", default=False, action="store_true", help="Remove SAWG RTIO channels feeding the JESD links (speeds up " "compilation time). Replaces them with fixed sawtooth generators.") args = parser.parse_args() variant = args.variant.lower() if variant == "standalone": cls = Standalone elif variant == "master": cls = Master elif variant == "satellite": cls = Satellite else: raise SystemExit("Invalid variant (-V/--variant)") soc = cls(with_sawg=not args.without_sawg, **soc_sdram_argdict(args)) # DRTIO variants do not use the RTM yet. if variant not in {"master", "satellite"}: remote_csr_regions = remote_csr.get_remote_csr_regions( soc.mem_map["serwb"] | soc.shadow_base, args.rtm_csr_csv) for name, origin, busword, csrs in remote_csr_regions: soc.add_csr_region(name, origin, busword, csrs) # Configuration for RTM peripherals. Keep in sync with sayma_rtm.py! soc.config["HAS_HMC830_7043"] = None soc.config["CONVERTER_SPI_HMC830_CS"] = 0 soc.config["CONVERTER_SPI_HMC7043_CS"] = 1 soc.config["CONVERTER_SPI_FIRST_AD9154_CS"] = 2 build_artiq_soc(soc, builder_argdict(args))
def main(): parser = argparse.ArgumentParser( description="MCORD DAQ firmware builder for platform AFCK v1.1") builder_args(parser) soc_afck1v1_args(parser) xilinx_ila_args(parser) parser.add_argument("--with-fmc1", action="store_true", help="Add FMC TDC to FMC1") parser.add_argument("--with-fmc2", action="store_true", help="Add FMC TDC to FMC2") parser.set_defaults(output_dir="build") args = parser.parse_args() os.makedirs(args.output_dir, exist_ok=True) soc = AfckTdc(**mcord_argdict(args), output_dir=args.output_dir) build_artiq_soc(soc, builder_argdict(args))
def software_main(soc_cls): args = { "cpu_type": None, "csr_csv": None, "hw_rev": None, "integrated_rom_size": None, "no_compile_gateware": True, "no_compile_software": False, "output_dir": 'build/artiq_kasli' } args = FakeArgs(args) print(args) kasli_argdict = soc_kasli_argdict(args) print("kasli args", kasli_argdict) soc = soc_cls(**kasli_argdict) build_argdict = builder_argdict(args) print("builder args", build_argdict) build_artiq_soc(soc, build_argdict)