class WhitenessControlCsr(Csr):
_fields = { 0: CsrField(width=1, name="enable", brief="en", doc="If asserted then whiteness monitor is enabled"),
1: CsrField(width=1, name="continuous", brief="cont", doc="If asserted then run whiteness continuously"),
2: CsrFieldResvd(width=2),
4: CsrField(width=1, name="source", brief="src", doc="If asserted then monitor entropy in; else monitor PRNG"),
16: CsrField(width=16, name="control", brief="ctl", doc="Control register value, including type and data for whiteness monitor type"),
}
class ConfigCsr(Csr):
_fields = {
0: CsrField(width=1, name="rx_reset", brief="rxrst", doc=""),
1: CsrField(width=1, name="rx_init", brief="rxrst", doc=""),
2: CsrField(width=1, name="tx_reset", brief="txrst", doc=""),
3: CsrField(width=1, name="tx_init", brief="txinit", doc=""),
4: CsrFieldZero(width=28),
}
class RxPtrCsr(Csr):
_fields = {
0:
CsrField(width=16,
name="buffer_addr",
brief="bufadr",
doc="Address for receive data accesses through rx data CSRs"),
16:
CsrField(width=16,
name="axi_addr",
brief="axiadr",
doc="Address of SRAM being used by AXI receiver; read-only"),
}
class TxPtrCsr(Csr):
_fields = {
0:
CsrField(
width=16,
name="buffer_addr",
brief="bufadr",
doc="Address for transmit data accesses through tx data CSRs"),
16:
CsrField(
width=16,
name="axi_addr",
brief="axiadr",
doc="Address of SRAM being used by AXI transmitter; read-only"),
}
class TimerComparatorCsr(Csr):
_fields = {
0:
CsrField(width=31,
name="comparator",
brief="cmp",
doc="31-bit timer comparator value"),
31:
CsrField(
name="equalled",
brief="eq",
doc=
"Asserted if the timer counter value has equalled the 31-bit comparator value"
),
}
class DataCsr(Csr):
_fields = {
0:
CsrField(width=32,
name="value",
brief="value",
doc="SRAM memory contents"),
}
class TimerCsr(Csr):
_fields = {
0:
CsrField(width=31,
name="value",
brief="value",
doc="31-bit timer value"),
31:
CsrFieldZero(width=1),
}
class ControlCsr(Csr):
_fields = {
0:
CsrField(
width=32,
name="value",
brief="value",
doc=
"32-bit application-specific control register; this is used by the system that this register is connected to"
),
}
class AddressCsr(Csr):
_fields = {
0:
CsrField(
width=32,
name="value",
brief="value",
doc=
"SRAM address to access; this is a 32 bit field, but the SRAM will have fewer address lines, and the top bits will be ignored"
),
}
class ConfigBufferCsr(Csr):
_fields = {
0: CsrField(width=16, name="buffer_end", brief="bufend", doc=""),
16: CsrFieldResvd(width=16),
}
class DataCsr(Csr):
_fields = {
0: CsrField(width=32, name="data", brief="data", doc=""),
}
class PrngConfigCsr(Csr):
_fields = { 0: CsrField(width=1, name="enable", brief="en", doc="If asserted then PRNG is enabled; must be set for random data"),
1: CsrFieldResvd(width=3),
4: CsrField(width=3, name="min_valid", brief="mv", doc="Minimum number of bits valid out of 4 LFSRs for valid data"),
7: CsrFieldResvd(width=25),
}
class WhitenessRunLengthCsr(Csr):
_fields = { 0: CsrField(width=32, name="length", brief="len", doc="Number of cycles/valid bits to run monitor for"),
}
class WhitenessDataCsr(Csr):
_fields = { 0: CsrField(width=32, name="data", brief="len", doc="Data from whiteness monitor"),
}
class DataCsr(Csr):
_fields = { 0: CsrField(width=32, name="data", brief="data", doc="Random data; if not valid, then zero is returned"),
}