def __init__(self, helper=None):
if helper is None:
self.helper = OsHelper()
else:
self.helper = helper
self.vid = 0xFFFF
self.did = 0xFFFF
self.code = CHIPSET_CODE_UNKNOWN
self.longname = "Unrecognized Platform"
self.id = CHIPSET_ID_UNKNOWN
self.pch_vid = 0xFFFF
self.pch_did = 0xFFFF
self.pch_code = CHIPSET_CODE_UNKNOWN
self.pch_longname = 'Unrecognized PCH'
self.pch_id = CHIPSET_ID_UNKNOWN
self.Cfg = Cfg()
#
# Initializing 'basic primitive' HAL components
# (HAL components directly using native OS helper functionality)
#
self.pci = pci.Pci(self)
self.mem = physmem.Memory(self)
self.msr = msr.Msr(self)
self.ucode = ucode.Ucode(self)
self.io = io.PortIO(self)
self.cpu = cpu.CPU(self)
self.msgbus = msgbus.MsgBus(self)
self.mmio = mmio.MMIO(self)
self.iobar = iobar.IOBAR(self)
self.igd = igd.IGD(self)
def __init__(self, cs):
super(SMBus, self).__init__(cs)
self.iobar = iobar.IOBAR(self.cs)
self.smb_reg_status = 'SMBUS_HST_STS'
self.smb_reg_command = 'SMBUS_HST_CMD'
self.smb_reg_address = 'SMBUS_HST_SLVA'
self.smb_reg_control = 'SMBUS_HST_CNT'
self.smb_reg_data0 = 'SMBUS_HST_D0'
self.smb_reg_data1 = 'SMBUS_HST_D1'
def run(self):
if len(self.argv) < 3:
print PortIOCommand.__doc__
return
try:
_iobar = iobar.IOBAR( self.cs )
except iobar.IOBARRuntimeError, msg:
print msg
return
def run(self):
if len(self.argv) < 3:
print(PortIOCommand.__doc__)
return
try:
_iobar = iobar.IOBAR(self.cs)
except iobar.IOBARRuntimeError as msg:
print(msg)
return
op = self.argv[2]
if ('list' == op):
_iobar.list_IO_BARs()
return
t = time.time()
if len(self.argv) < 3:
print(PortIOCommand.__doc__)
return
io_port = int(self.argv[2], 16)
width = 0x1
if len(self.argv) > 3:
width = chipsec_util.get_option_width(
self.argv[3]) if chipsec_util.is_option_valid_width(
self.argv[3]) else int(self.argv[3], 16)
if 5 == len(self.argv):
value = int(self.argv[4], 16)
self.logger.log(
"[CHIPSEC] OUT 0x{:04X} <- 0x{:08X} (size = 0x{:02X})".format(
io_port, value, width))
if 0x1 == width: self.cs.io.write_port_byte(io_port, value)
elif 0x2 == width: self.cs.io.write_port_word(io_port, value)
elif 0x4 == width: self.cs.io.write_port_dword(io_port, value)
else:
self.logger.log(
"Invalid write size requested. 1,2,4 supported")
return
else:
if 0x1 == width: value = self.cs.io.read_port_byte(io_port)
elif 0x2 == width: value = self.cs.io.read_port_word(io_port)
elif 0x4 == width: value = self.cs.io.read_port_dword(io_port)
else:
self.logger.log("Invalid read size requested. 1,2,4 supported")
return
self.logger.log(
"[CHIPSEC] IN 0x{:04X} -> 0x{:08X} (size = 0x{:02X})".format(
io_port, value, width))
self.logger.log(
"[CHIPSEC] (io) time elapsed {:.3f}".format(time.time() - t))
def run(self):
try:
self._iobar = iobar.IOBAR( self.cs)
except IOBARRuntimeError as msg:
self.logger.log(msg)
return
t = time.time()
self.func()
self.logger.log( "[CHIPSEC] (io) time elapsed {:.3f}".format(time.time() - t))
def __init__(self):
BaseModule.__init__(self)
self.iobar = iobar.IOBAR(self.cs)
