예제 #1
0
파일: cli.py 프로젝트: hoangt/chiptools
 def do_plugins(self, command):
     simulators = self.project.get_available_simulators()
     synthesisers = self.project.get_available_synthesisers()
     for i, plugin_registry in enumerate([simulators, synthesisers]):
         print(term.yellow(['Simulator Plugins:', 'Synthesis Plugins:'][i]))
         for name, inst in plugin_registry.items():
             plugin_path = sys.modules[inst.__module__].__file__
             plugin_file = os.path.basename(plugin_path)
             print(
                 SEP * 1 + term.darkgray(plugin_file) + '\n' +
                 SEP * 2 + '{:<15}: {:<35}'.format(
                     'Plugin Path',
                     term.green(plugin_path)
                 ) + '\n' +
                 SEP * 2 + '{:<15}: {:<35}'.format(
                     'Name',
                     term.green(str(name))
                 ) + '\n' +
                 SEP * 2 + '{:<15}: {:<35}'.format(
                     'Tool Path',
                     [
                         term.red('(not found) ' + str(inst.path)),
                         term.green(str(inst.path))
                     ][inst.installed]
                 )
             )
예제 #2
0
 def do_plugins(self, command):
     simulators = self.project.get_available_simulators()
     synthesisers = self.project.get_available_synthesisers()
     for i, plugin_registry in enumerate([simulators, synthesisers]):
         print(term.yellow(['Simulator Plugins:', 'Synthesis Plugins:'][i]))
         for name, inst in plugin_registry.items():
             plugin_path = sys.modules[inst.__module__].__file__
             plugin_file = os.path.basename(plugin_path)
             print(
                 SEP * 1 + term.darkgray(plugin_file) + '\n' +
                 SEP * 2 + '{:<15}: {:<35}'.format(
                     'Plugin Path',
                     term.green(plugin_path)
                 ) + '\n' +
                 SEP * 2 + '{:<15}: {:<35}'.format(
                     'Name',
                     term.green(str(name))
                 ) + '\n' +
                 SEP * 2 + '{:<15}: {:<35}'.format(
                     'Tool Path',
                     [
                         term.red('(not found) ' + str(inst.path)),
                         term.green(str(inst.path))
                     ][inst.installed]
                 )
             )
예제 #3
0
파일: cli.py 프로젝트: hoangt/chiptools
    def do_show_tests(self, command):
        """
        Show the tests available in the current project.
        """
        tests = self.project.get_tests()

        if len(tests) == 0:
            log.info('There are no tests available.')
            return

        testUniqueId = 0
        for file_object in tests:
            file_name = os.path.basename(file_object.path)
            print(term.yellow(file_name))
            for test_group in file_object.testsuite:
                for testId, test in enumerate(test_group):
                    if testId == 0:
                        print(
                            SEP + term.green(str(test.__class__.__name__))
                        )
                    doc = test.shortDescription()
                    if doc is None:
                        doc = term.darkred('No description')
                    if testUniqueId in self.test_set:
                        msg = SEP * 2 + '[' + term.blue('ID ' + str(
                            testUniqueId) + ' ' + test.id().split('.')[-1]
                        ) + ']'
                    else:
                        msg = SEP * 2 + term.lightgray('ID ' + str(
                            testUniqueId) + ' ' + test.id().split('.')[-1]
                        )
                    print(msg)
                    print(term.darkgray(textwrap.fill(
                        doc,
                        width=80,
                        initial_indent=SEP * 2,
                        subsequent_indent=SEP * 2,
                    )))
                    testUniqueId += 1
예제 #4
0
    def do_show_tests(self, command):
        """
        Show the tests available in the current project.
        """
        tests = self.project.get_tests()

        if len(tests) == 0:
            log.info('There are no tests available.')
            return

        testUniqueId = 0
        for file_object in tests:
            file_name = os.path.basename(file_object.path)
            print(term.yellow(file_name))
            for test_group in file_object.testsuite:
                for testId, test in enumerate(utils.iterate_tests(test_group)):
                    if testId == 0:
                        print(
                            SEP + term.green(str(test.__class__.__name__))
                        )
                    doc = test.shortDescription()
                    if doc is None:
                        doc = term.darkred('No description')
                    if testUniqueId in self.test_set:
                        msg = SEP * 2 + '[' + term.blue('ID ' + str(
                            testUniqueId) + ' ' + test.id().split('.')[-1]
                        ) + ']'
                    else:
                        msg = SEP * 2 + term.lightgray('ID ' + str(
                            testUniqueId) + ' ' + test.id().split('.')[-1]
                        )
                    print(msg)
                    print(term.darkgray(textwrap.fill(
                        doc,
                        width=80,
                        initial_indent=SEP * 2,
                        subsequent_indent=SEP * 2,
                    )))
                    testUniqueId += 1
예제 #5
0
파일: cli.py 프로젝트: hoangt/chiptools
    def do_show_config(self, command):
        """Print out the project settings"""
        available_simulator_string = ''
        for name, inst in self.project.get_available_simulators().items():
            available_simulator_string += (
                SEP * 2 + '{:<15}: ' +
                [
                    '(not found) ' + term.red('{:<35}'),
                    term.green('{:<35}')
                ][inst.installed] +
                '\n'
            ).format(name, inst.path)

        available_synthesiser_string = ''
        for name, inst in self.project.get_available_synthesisers().items():
            available_synthesiser_string += (
                SEP * 2 + '{:<15}: ' +
                [
                    '(not found) ' + term.red('{:<35}'),
                    term.green('{:<35}')
                ][inst.installed] +
                '\n'
            ).format(name, inst.path)

        msg = (
            '\n' +
            term.yellow(term.bold('System Configuration: ')) +
            term.green('%(options)s') + '\n' +
            term.darkgray(SEP + 'Working directory:\n') +
            SEP * 2 + term.green('%(working_directory)s') + '\n' +
            term.darkgray(SEP + 'Available simulators:\n') +
            available_simulator_string +
            term.darkgray(SEP + 'Available synthesisers:\n') +
            available_synthesiser_string +
            term.darkgray(SEP + 'Simulation libraries:\n') +
            ''.join(
                (SEP * 2 + '{:<15}: ' + term.green('{:<35}') + '\n').format(
                    k,
                    v
                ) for k, v in (
                    self.project.get_simulator_library_dependencies().items()
                )
            ) +
            '\n' +
            term.yellow(term.bold('Project Configuration: ')) +
            term.green('%(project)s') + '\n' +
            term.darkgray(SEP + 'Simulation directory set to:\n') +
            SEP * 2 + term.green('%(simulation_directory)s') + '\n' +
            term.darkgray(SEP + 'Using the simulation tool:\n') +
            SEP * 2 + term.green('%(simulation_tool_name)s') + '\n' +
            term.darkgray(SEP + 'Synthesis directory set to:\n') +
            SEP * 2 + term.green('%(synthesis_directory)s') + '\n' +
            term.darkgray(SEP + 'Using the synthesis tool:\n') +
            SEP * 2 + term.green('%(synthesis_tool_name)s') + '\n' +
            term.darkgray(SEP + 'Targeting FPGA part:\n') +
            SEP * 2 + term.green('%(fpga_part)s') + '\n' +
            term.darkgray(SEP + 'Using synthesis generic binding:\n') +
            SEP * 2 + term.green('%(synthesis_generics)s') + '\n' +
            term.darkgray(SEP + 'Modelsim Specific Arguments:\n') +
            SEP * 2 + 'vsim: ' + term.green('%(modelsim_vsim_args)s') + '\n'
        )

        print(msg % dict(
            working_directory=os.getcwd(),
            options=self.project.get_system_config_path(),
            simulation_directory=self.project.get_simulation_directory(),
            simulation_tool_name=self.project.get_simulation_tool_name(),
            synthesis_directory=self.project.get_synthesis_directory(),
            synthesis_tool_name=self.project.get_synthesis_tool_name(),
            fpga_part=self.project.get_fpga_part(),
            modelsim_vsim_args=self.project.get_tool_arguments(
                'modelsim',
                'simulate'
            ),
            project='',
            synthesis_generics=''.join(
                str(k) + ':' + str(v) + ', ' for k, v in
                self.project.get_generics().items()
            ))
        )
예제 #6
0
파일: cli.py 프로젝트: hoangt/chiptools
    def do_show_config(self, command):
        """Print out the project settings"""
        available_simulator_string = ''
        for name, inst in self.project.get_available_simulators().items():
            available_simulator_string += (
                SEP * 2 + '{:<15}: ' +
                ['(not found) ' + term.red('{:<35}'),
                 term.green('{:<35}')][inst.installed] + '\n').format(
                     name, inst.path)

        available_synthesiser_string = ''
        for name, inst in self.project.get_available_synthesisers().items():
            available_synthesiser_string += (
                SEP * 2 + '{:<15}: ' +
                ['(not found) ' + term.red('{:<35}'),
                 term.green('{:<35}')][inst.installed] + '\n').format(
                     name, inst.path)

        msg = (
            '\n' + term.yellow(term.bold('System Configuration: ')) +
            term.green('%(options)s') + '\n' +
            term.darkgray(SEP + 'Working directory:\n') + SEP * 2 +
            term.green('%(working_directory)s') + '\n' +
            term.darkgray(SEP + 'Available simulators:\n') +
            available_simulator_string +
            term.darkgray(SEP + 'Available synthesisers:\n') +
            available_synthesiser_string +
            term.darkgray(SEP + 'Simulation libraries:\n') + ''.join(
                (SEP * 2 + '{:<15}: ' + term.green('{:<35}') +
                 '\n').format(k, v) for k, v in
                (self.project.get_simulator_library_dependencies().items())) +
            '\n' + term.yellow(term.bold('Project Configuration: ')) +
            term.green('%(project)s') + '\n' +
            term.darkgray(SEP + 'Simulation directory set to:\n') + SEP * 2 +
            term.green('%(simulation_directory)s') + '\n' +
            term.darkgray(SEP + 'Using the simulation tool:\n') + SEP * 2 +
            term.green('%(simulation_tool_name)s') + '\n' +
            term.darkgray(SEP + 'Synthesis directory set to:\n') + SEP * 2 +
            term.green('%(synthesis_directory)s') + '\n' +
            term.darkgray(SEP + 'Using the synthesis tool:\n') + SEP * 2 +
            term.green('%(synthesis_tool_name)s') + '\n' +
            term.darkgray(SEP + 'Targeting FPGA part:\n') + SEP * 2 +
            term.green('%(fpga_part)s') + '\n' +
            term.darkgray(SEP + 'Using synthesis generic binding:\n') +
            SEP * 2 + term.green('%(synthesis_generics)s') + '\n' +
            term.darkgray(SEP + 'Modelsim Specific Arguments:\n') + SEP * 2 +
            'vsim: ' + term.green('%(modelsim_vsim_args)s') + '\n')

        print(
            msg %
            dict(working_directory=os.getcwd(),
                 options=self.project.get_system_config_path(),
                 simulation_directory=self.project.get_simulation_directory(),
                 simulation_tool_name=self.project.get_simulation_tool_name(),
                 synthesis_directory=self.project.get_synthesis_directory(),
                 synthesis_tool_name=self.project.get_synthesis_tool_name(),
                 fpga_part=self.project.get_fpga_part(),
                 modelsim_vsim_args=self.project.get_tool_arguments(
                     'modelsim', 'simulate'),
                 project='',
                 synthesis_generics=''.join(
                     str(k) + ':' + str(v) + ', '
                     for k, v in self.project.get_generics().items())))