def writeDP(self, addr, data): if addr == DP_REG['SELECT']: if data == self.dp_select: return self.dp_select = data dapTransfer(self.interface, 1, [WRITE | DP_ACC | (addr & 0x0c)], [data]) return True
def writeMem(self, addr, data, transfer_size=32): self.writeAP(AP_REG["CSW"], CSW_VALUE | TRANSFER_SIZE[transfer_size]) if transfer_size == 8: data = data << ((addr & 0x03) << 3) elif transfer_size == 16: data = data << ((addr & 0x02) << 3) dapTransfer(self.interface, 2, [WRITE | AP_ACC | AP_REG["TAR"], WRITE | AP_ACC | AP_REG["DRW"]], [addr, data])
def writeMem(self, addr, data, transfer_size = 32): self.writeAP(AP_REG['CSW'], CSW_VALUE | TRANSFER_SIZE[transfer_size]) if transfer_size == 8: data = data << ((addr & 0x03) << 3) elif transfer_size == 16: data = data << ((addr & 0x02) << 3) dapTransfer(self.interface, 2, [WRITE | AP_ACC | AP_REG['TAR'], WRITE | AP_ACC | AP_REG['DRW']], [addr, data])
def writeAP(self, addr, data): if addr == AP_REG["CSW"]: if data == self.csw: return self.csw = data ap_sel = addr & 0xFF000000 bank_sel = addr & APBANKSEL self.writeDP(DP_REG["SELECT"], ap_sel | bank_sel) dapTransfer(self.interface, 1, [WRITE | AP_ACC | (addr & 0x0C)], [data]) return True
def writeAP(self, addr, data): ap_sel = addr & 0xff000000 bank_sel = addr & APBANKSEL self.writeDP(DP_REG['SELECT'], ap_sel | bank_sel) if addr == AP_REG['CSW']: if data == self.csw: return self.csw = data dapTransfer(self.interface, 1, [WRITE | AP_ACC | (addr & 0x0c)], [data]) return True
def writeAP(self, addr, data): if addr == AP_REG['CSW']: if data == self.csw: return self.csw = data ap_sel = addr & 0xff000000 bank_sel = addr & APBANKSEL self.writeDP(DP_REG['SELECT'], ap_sel | bank_sel) dapTransfer(self.interface, 1, [WRITE | AP_ACC | (addr & 0x0c)], [data]) return True
def writeMem(self, addr, data, transfer_size = 32): self.writeAP(AP_REG['CSW'], CSW_VALUE | TRANSFER_SIZE[transfer_size]) if transfer_size == 8: data = data << ((addr & 0x03) << 3) elif transfer_size == 16: data = data << ((addr & 0x02) << 3) try: dapTransfer(self.interface, 2, [WRITE | AP_ACC | AP_REG['TAR'], WRITE | AP_ACC | AP_REG['DRW']], [addr, data]) except TransferError: self.clearStickyErr() raise
def writeMem(self, addr, data, transfer_size=32): self.writeAP(AP_REG['CSW'], CSW_VALUE | TRANSFER_SIZE[transfer_size]) if transfer_size == 8: data = data << ((addr & 0x03) << 3) elif transfer_size == 16: data = data << ((addr & 0x02) << 3) try: dapTransfer(self.interface, 2, [ WRITE | AP_ACC | AP_REG['TAR'], WRITE | AP_ACC | AP_REG['DRW'] ], [addr, data]) except TransferError: # Clear STICKYERR flag self.writeDP(0x0, (1 << 2)) raise
def readAP(self, addr): ap_sel = addr & 0xFF000000 bank_sel = addr & APBANKSEL self.writeDP(DP_REG["SELECT"], ap_sel | bank_sel) resp = dapTransfer(self.interface, 1, [READ | AP_ACC | (addr & 0x0C)]) return (resp[0] << 0) | (resp[1] << 8) | (resp[2] << 16) | (resp[3] << 24)
def readAP(self, addr): ap_sel = addr & 0xff000000 bank_sel = addr & APBANKSEL self.writeDP(DP_REG['SELECT'], ap_sel | bank_sel) resp = dapTransfer(self.interface, 1, [READ | AP_ACC | (addr & 0x0c)]) return (resp[0] << 0) | \ (resp[1] << 8) | \ (resp[2] << 16) | \ (resp[3] << 24)
def readMem(self, addr, transfer_size=32): self.writeAP(AP_REG["CSW"], CSW_VALUE | TRANSFER_SIZE[transfer_size]) resp = dapTransfer(self.interface, 2, [WRITE | AP_ACC | AP_REG["TAR"], READ | AP_ACC | AP_REG["DRW"]], [addr]) res = (resp[0] << 0) | (resp[1] << 8) | (resp[2] << 16) | (resp[3] << 24) if transfer_size == 8: res = res >> ((addr & 0x03) << 3) & 0xFF elif transfer_size == 16: res = res >> ((addr & 0x02) << 3) & 0xFFFF return res
def readMem(self, addr, transfer_size = 32): self.writeAP(AP_REG['CSW'], CSW_VALUE | TRANSFER_SIZE[transfer_size]) resp = dapTransfer(self.interface, 2, [WRITE | AP_ACC | AP_REG['TAR'], READ | AP_ACC | AP_REG['DRW']], [addr]) res = (resp[0] << 0) | \ (resp[1] << 8) | \ (resp[2] << 16) | \ (resp[3] << 24) if transfer_size == 8: res = (res >> ((addr & 0x03) << 3) & 0xff) elif transfer_size == 16: res = (res >> ((addr & 0x02) << 3) & 0xffff) return res
def readMem(self, addr, transfer_size = 32): self.writeAP(AP_REG['CSW'], CSW_VALUE | TRANSFER_SIZE[transfer_size]) try: resp = dapTransfer(self.interface, 2, [WRITE | AP_ACC | AP_REG['TAR'], READ | AP_ACC | AP_REG['DRW']], [addr]) except TransferError: self.clearStickyErr() raise res = (resp[0] << 0) | \ (resp[1] << 8) | \ (resp[2] << 16) | \ (resp[3] << 24) if transfer_size == 8: res = (res >> ((addr & 0x03) << 3) & 0xff) elif transfer_size == 16: res = (res >> ((addr & 0x02) << 3) & 0xffff) return res
def readMem(self, addr, transfer_size=32): self.writeAP(AP_REG['CSW'], CSW_VALUE | TRANSFER_SIZE[transfer_size]) try: resp = dapTransfer(self.interface, 2, [ WRITE | AP_ACC | AP_REG['TAR'], READ | AP_ACC | AP_REG['DRW'] ], [addr]) except TransferError: # Clear STICKYERR flag self.writeDP(0x0, (1 << 2)) raise res = (resp[0] << 0) | \ (resp[1] << 8) | \ (resp[2] << 16) | \ (resp[3] << 24) if transfer_size == 8: res = (res >> ((addr & 0x03) << 3) & 0xff) elif transfer_size == 16: res = (res >> ((addr & 0x02) << 3) & 0xffff) return res
def readDP(self, addr): resp = dapTransfer(self.interface, 1, [READ | DP_ACC | (addr & 0x0c)]) return (resp[0] << 0) | \ (resp[1] << 8) | \ (resp[2] << 16) | \ (resp[3] << 24)