def inverterLoopTanh(numInverters, numSolutions="all", a=-5.0): epsilon = 1e-14 start = time.time() vs = [] for i in range(numInverters): vs.append(Variable("v" + str(i))) allConstraints = [] # Store rambus oscillator constraints for i in range(numInverters): allConstraints.append(vs[i] >= -1) allConstraints.append(vs[i] <= 1) inputInd = i outputInd = (i + 1) % numInverters allConstraints.append(tanh(a * vs[inputInd]) - vs[outputInd] == 0.0) allSolutions = [] while True: if numSolutions != "all" and len(allSolutions) == numSolutions: break # Store constraints pruning search space so that # old hyperrectangles are not considered excludingConstraints = [] for solution in allSolutions: singleExcludingConstraints = [] for i in range(numInverters): singleExcludingConstraints.append(vs[i] < solution[i][0]) singleExcludingConstraints.append(vs[i] > solution[i][1]) excludingConstraints.append(singleExcludingConstraints) # Add all the rambus oscillator constraints f_sat = logical_and(*allConstraints) # Add constraints so that old hyperrectangles are not considered if len(excludingConstraints) > 0: for constraints in excludingConstraints: f_sat = logical_and(f_sat, logical_or(*constraints)) #print ("f_sat") #print (f_sat) result = CheckSatisfiability(f_sat, epsilon) #print (result) if result is None: break hyper = np.zeros((numInverters, 2)) for i in range(numInverters): hyper[i, :] = [ result[vs[i]].lb() - 2 * epsilon, result[vs[i]].ub() + 2 * epsilon ] #print ("hyper", hyper) allSolutions.append(hyper) print("num solutions found", len(allSolutions)) end = time.time() print("time taken", end - start) return allSolutions
def inverterScMosfet(inputVoltage, numSolutions="all"): epsilon = 1e-14 start = time.time() Vdd = 1.0 sn = 3 sp = 2 * sn outputVolt = Variable("outputVolt") iP = Variable("iP") iN = Variable("iN") allConstraints = [] allConstraints.append(outputVolt >= 0.0) allConstraints.append(outputVolt <= Vdd) allConstraints.append(-iP - iN == 0) allConstraints += mvs_id("n", 0.0, inputVoltage, outputVolt, iN, sn) allConstraints += mvs_id("p", Vdd, inputVoltage, outputVolt, iP, sp) allSolutions = [] while True: if numSolutions != "all" and len(allSolutions) == numSolutions: break # Store constraints pruning search space so that # old hyperrectangles are not considered excludingConstraints = [] for solution in allSolutions: singleExcludingConstraints = [] singleExcludingConstraints.append(outputVolt < solution[0][0]) singleExcludingConstraints.append(outputVolt > solution[0][1]) excludingConstraints.append(singleExcludingConstraints) #print ("allConstraints") #print (allConstraints) f_sat = logical_and(*allConstraints) if len(excludingConstraints) > 0: for constraints in excludingConstraints: f_sat = logical_and(f_sat, logical_or(*constraints)) #print ("f_sat") #print (f_sat) result = CheckSatisfiability(f_sat, epsilon) #print (result) if result is None: break hyper = np.zeros((1, 2)) hyper[0, :] = [ result[outputVolt].lb() - 2 * epsilon, result[outputVolt].ub() + 2 * epsilon ] #print ("hyper", hyper) allSolutions.append(hyper) print("num solutions found", len(allSolutions)) end = time.time() print("time taken", end - start) return allSolutions
def exampleFun(numSolutions="all"): start = time.time() epsilon = 1e-14 lenV = 1 x = Variable('x') allSolutions = [] while True: if numSolutions != "all" and len(allSolutions) == numSolutions: break allConstraints = [] allConstraints.append(2 * x * asin(cos(0.797) * sin(math.pi / x)) - 0.0331 * x >= 2 * math.pi - 2.097) allConstraints.append(x >= 3) allConstraints.append(x <= 64) excludingConstraints = [] for solution in allSolutions: singleExcludingConstraints = [] singleExcludingConstraints.append(x <= solution[0][0]) singleExcludingConstraints.append(x >= solution[0][1]) excludingConstraints.append(singleExcludingConstraints) #print ("allConstraints") #print (allConstraints) #print ("numConstraints", len(allConstraints)) f_sat = logical_and(*allConstraints) if len(excludingConstraints) > 0: for constraints in excludingConstraints: f_sat = logical_and(f_sat, logical_or(*constraints)) #print ("f_sat") #print (f_sat) result = CheckSatisfiability(f_sat, epsilon) #print (result) if result is None: break hyper = np.zeros((1, 2)) hyper[0, :] = [ result[x].lb() - 2 * epsilon, result[x].ub() + 2 * epsilon ] print("hyper", hyper) allSolutions.append(hyper) print("num solutions found", len(allSolutions)) '''constraints = [] x = Variable('x') #constraints.append(x >= 0.0) #constraints.append(x <= 64.0) constraints.append(2*math.pi - 2*x*asin(cos(0.797)*sin(math.pi/x)) == 2.097 - 0.0331*x) f_sat = logical_and(*constraints) result = CheckSatisfiability(f_sat, epsilon) print (result)''' end = time.time() print("time taken", end - start)
def inverterTanh(inputVoltage, a=-5.0, numSolutions="all"): epsilon = 1e-14 start = time.time() outputVolt = Variable("outputVolt") allConstraints = [] allConstraints.append(outputVolt >= -1.0) allConstraints.append(outputVolt <= 1.0) allConstraints.append(tanh(a * inputVoltage) - outputVolt == 0) allSolutions = [] while True: if numSolutions != "all" and len(allSolutions) == numSolutions: break # Store constraints pruning search space so that # old hyperrectangles are not considered excludingConstraints = [] for solution in allSolutions: singleExcludingConstraints = [] singleExcludingConstraints.append(outputVolt < solution[0][0]) singleExcludingConstraints.append(outputVolt > solution[0][1]) excludingConstraints.append(singleExcludingConstraints) #print ("allConstraints") #print (allConstraints) f_sat = logical_and(*allConstraints) if len(excludingConstraints) > 0: for constraints in excludingConstraints: f_sat = logical_and(f_sat, logical_or(*constraints)) #print ("f_sat") #print (f_sat) result = CheckSatisfiability(f_sat, epsilon) #print (result) if result is None: break hyper = np.zeros((1, 2)) hyper[0, :] = [ result[outputVolt].lb() - 2 * epsilon, result[outputVolt].ub() + 2 * epsilon ] #print ("hyper", hyper) allSolutions.append(hyper) print("num solutions found", len(allSolutions)) end = time.time() print("time taken", end - start) return allSolutions
def test_logical(self): f1 = (x == 0) f2 = (y == 0) self.assertEqual(str(logical_not(f1)), "!((x = 0))") self.assertEqual(str(logical_imply(f1, f2)), str(logical_or(logical_not(f1), f2))) self.assertEqual( str(logical_iff(f1, f2)), str(logical_and(logical_imply(f1, f2), logical_imply(f2, f1)))) # Test single-operand logical statements self.assertEqual(str(logical_and(x >= 1)), "(x >= 1)") self.assertEqual(str(logical_or(x >= 1)), "(x >= 1)") # Test binary operand logical statements self.assertEqual(str(logical_and(x >= 1, x <= 2)), "((x >= 1) and (x <= 2))") self.assertEqual(str(logical_or(x <= 1, x >= 2)), "((x >= 2) or (x <= 1))") # Test multiple operand logical statements self.assertEqual(str(logical_and(x >= 1, x <= 2, y == 2)), "((y = 2) and (x >= 1) and (x <= 2))") self.assertEqual(str(logical_or(x >= 1, x <= 2, y == 2)), "((y = 2) or (x >= 1) or (x <= 2))")
def pFet(Vtp, Vdd, Kp, Sp, src, gate, drain, tI): constraints = [] if type(src) == Variable or type(gate) == Variable: constraints.append(logical_or(logical_and(src < drain, gate - drain >= Vtp, tI == 0.0), logical_and(src < drain, gate - drain <= Vtp, src - drain <= gate - drain - Vtp, tI == -0.5*Sp*Kp*(gate - drain - Vtp)*(gate - drain - Vtp)), logical_and(src < drain, gate - drain <= Vtp, src - drain >= gate - drain - Vtp, tI == -Sp*Kp*(gate - drain - Vtp - (src - drain)/2.0)*(src - drain)), logical_and(src >= drain, gate - src >= Vtp, tI == 0.0), logical_and(src >= drain, gate - src <= Vtp, drain - src <= gate - src - Vtp, tI == 0.5*Sp*Kp*(gate - src - Vtp)*(gate - src - Vtp)), logical_and(src >= drain, gate - src <= Vtp, drain - src >= gate - src - Vtp, tI == Sp*Kp*(gate - src - Vtp - (drain - src)/2.0)*(drain - src)))) else: if gate - src >= Vtp: constraints.append(logical_or(logical_and(src < drain, gate - drain >= Vtp, tI == 0.0), logical_and(src < drain, gate - drain <= Vtp, src - drain <= gate - drain - Vtp, tI == -0.5*Sp*Kp*(gate - drain - Vtp)*(gate - drain - Vtp)), logical_and(src < drain, gate - drain <= Vtp, src - drain >= gate - drain - Vtp, tI == -Sp*Kp*(gate - drain - Vtp - (src - drain)/2.0)*(src - drain)), logical_and(src >= drain, tI == 0.0))) else: constraints.append(logical_or(logical_and(src < drain, gate - drain >= Vtp, tI == 0.0), logical_and(src < drain, gate - drain <= Vtp, src - drain <= gate - drain - Vtp, tI == -0.5*Sp*Kp*(gate - drain - Vtp)*(gate - drain - Vtp)), logical_and(src < drain, gate - drain <= Vtp, src - drain >= gate - drain - Vtp, tI == -Sp*Kp*(gate - drain - Vtp - (src - drain)/2.0)*(src - drain)), logical_and(src >= drain, drain - src <= gate - src - Vtp, tI == 0.5*Sp*Kp*(gate - src - Vtp)*(gate - src - Vtp)), logical_and(src >= drain, drain - src >= gate - src - Vtp, tI == Sp*Kp*(gate - src - Vtp - (drain - src)/2.0)*(drain - src)))) return constraints
def nFet(Vtn, Vdd, Kn, Sn, src, gate, drain, tI): constraints = [] if type(src) == Variable or type(gate) == Variable: constraints.append(logical_or(logical_and(src > drain, gate - drain <= Vtn, tI == 0.0), logical_and(src > drain, gate - drain >= Vtn, src - drain >= gate - drain - Vtn, tI == -0.5*Sn*Kn*(gate - drain - Vtn)*(gate - drain - Vtn)), logical_and(src > drain, gate - drain >= Vtn, src - drain <= gate - drain - Vtn, tI == -Sn*Kn*(gate - drain - Vtn - (src - drain)/2.0)*(src - drain)), logical_and(src <= drain, gate - src <= Vtn, tI == 0.0), logical_and(src <= drain, gate - src >= Vtn, drain - src >= gate - src - Vtn, tI == 0.5*Sn*Kn*(gate - src - Vtn)*(gate - src - Vtn)), logical_and(src <= drain, gate - src >= Vtn, drain - src <= gate - src - Vtn, tI == Sn*Kn*(gate - src - Vtn - (drain - src)/2.0)*(drain - src)))) else: if gate - src <= Vtn: constraints.append(logical_or(logical_and(src > drain, gate - drain <= Vtn, tI == 0.0), logical_and(src > drain, gate - drain >= Vtn, src - drain >= gate - drain - Vtn, tI == -0.5*Sn*Kn*(gate - drain - Vtn)*(gate - drain - Vtn)), logical_and(src > drain, gate - drain >= Vtn, src - drain <= gate - drain - Vtn, tI == -Sn*Kn*(gate - drain - Vtn - (src - drain)/2.0)*(src - drain)), logical_and(src <= drain, tI == 0.0))) else: constraints.append(logical_or(logical_and(src > drain, gate - drain <= Vtn, tI == 0.0), logical_and(src > drain, gate - drain >= Vtn, src - drain >= gate - drain - Vtn, tI == -0.5*Sn*Kn*(gate - drain - Vtn)*(gate - drain - Vtn)), logical_and(src > drain, gate - drain >= Vtn, src - drain <= gate - drain - Vtn, tI == -Sn*Kn*(gate - drain - Vtn - (src - drain)/2.0)*(src - drain)), logical_and(src <= drain, drain - src >= gate - src - Vtn, tI == 0.5*Sn*Kn*(gate - src - Vtn)*(gate - src - Vtn)), logical_and(src <= drain, drain - src <= gate - src - Vtn, tI == Sn*Kn*(gate - src - Vtn - (drain - src)/2.0)*(drain - src)))) return constraints
def rambusOscillatorTanh(numStages, g_cc=0.5, numSolutions="all", a=-5.0): epsilon = 1e-14 start = time.time() g_fwd = 1.0 lenV = numStages * 2 vs = [] vfwds = [] vccs = [] for i in range(lenV): vs.append(Variable("v" + str(i))) vfwds.append(Variable("vfwd" + str(i))) vccs.append(Variable("vcc" + str(i))) allConstraints = [] # Store rambus oscillator constraints for i in range(lenV): allConstraints.append(vs[i] >= -1) allConstraints.append(vs[i] <= 1) fwdInd = (i - 1) % lenV ccInd = (i + lenV // 2) % lenV allConstraints.append(vfwds[i] == tanh(a * vs[fwdInd])) allConstraints.append(vccs[i] == tanh(a * vs[ccInd])) allConstraints.append(g_fwd * vfwds[i] + (-g_fwd - g_cc) * vs[i] + g_cc * vccs[i] == 0) allSolutions = [] while True: if numSolutions != "all" and len(allSolutions) == numSolutions: break # Store constraints pruning search space so that # old hyperrectangles are not considered excludingConstraints = [] for solution in allSolutions: singleExcludingConstraints = [] for i in range(lenV): singleExcludingConstraints.append(vs[i] < solution[i][0]) singleExcludingConstraints.append(vs[i] > solution[i][1]) excludingConstraints.append(singleExcludingConstraints) # Add all the rambus oscillator constraints f_sat = logical_and(*allConstraints) # Add constraints so that old hyperrectangles are not considered if len(excludingConstraints) > 0: for constraints in excludingConstraints: f_sat = logical_and(f_sat, logical_or(*constraints)) #print ("f_sat") #print (f_sat) result = CheckSatisfiability(f_sat, epsilon) #print (result) if result is None: break hyper = np.zeros((lenV, 2)) for i in range(lenV): hyper[i, :] = [ result[vs[i]].lb() - 2 * epsilon, result[vs[i]].ub() + 2 * epsilon ] #print ("hyper", hyper) allSolutions.append(hyper) print("num solutions found", len(allSolutions)) end = time.time() print("time taken", end - start) return allSolutions
def run_or(self, ident, val) -> None: a = val.exp_a['dreal_exp'] b = val.exp_b['dreal_exp'] ident['dreal_exp'] = dreal.logical_or(a, b)
def inverterLoopLcMosfet(numInverters, numSolutions = "all", Vtp = -0.4, Vtn = 0.4, Vdd = 1.8, Kn = 270*1e-6, Kp = -90*1e-6, Sn = 3.0): epsilon = 1e-14 start = time.time() #print ("Vtp", Vtp, "Vtn", Vtn, "Vdd", Vdd, "Kn", Kn, "Kp", Kp, "Sn", Sn) Sp = 2*Sn vs = [] iNs = [] iPs = [] for i in range(numInverters): vs.append(Variable("v" + str(i))) iNs.append(Variable("iN" + str(i))) iPs.append(Variable("iP" + str(i))) allConstraints = [] for i in range(numInverters): allConstraints.append(vs[i] >= 0.0) allConstraints.append(vs[i] <= Vdd) allConstraints.append(-iNs[i]-iPs[i] == 0) inputInd = i outputInd = (i+1)%numInverters allConstraints += nFet(Vtn, Vdd, Kn, Sn, 0.0, vs[inputInd], vs[outputInd], iNs[i]) allConstraints += pFet(Vtp, Vdd, Kp, Sp, Vdd, vs[inputInd], vs[outputInd], iPs[i]) allSolutions = [] while True: if numSolutions != "all" and len(allSolutions) == numSolutions: break # Store constraints pruning search space so that # old hyperrectangles are not considered excludingConstraints = [] for solution in allSolutions: singleExcludingConstraints = [] for i in range(numInverters): singleExcludingConstraints.append(vs[i] < solution[i][0]) singleExcludingConstraints.append(vs[i] > solution[i][1]) excludingConstraints.append(singleExcludingConstraints) #print ("allConstraints") #print (allConstraints) f_sat = logical_and(*allConstraints) if len(excludingConstraints) > 0: for constraints in excludingConstraints: f_sat = logical_and(f_sat, logical_or(*constraints)) #print ("f_sat") #print (f_sat) result = CheckSatisfiability(f_sat, epsilon) #print (result) if result is None: break hyper = np.zeros((numInverters,2)) for i in range(numInverters): hyper[i,:] = [result[vs[i]].lb() - 1000*epsilon, result[vs[i]].ub() + 1000*epsilon] #print ("hyper", hyper) allSolutions.append(hyper) print ("num solutions found", len(allSolutions)) end = time.time() print ("time taken", end - start) return allSolutions
def schmittTriggerLcMosfet(inputVoltage, Vtp = -0.4, Vtn = 0.4, Vdd = 1.8, Kn = 270*1e-6, Kp = -90*1e-6, Sn = 3.0, numSolutions = "all"): epsilon = 1e-14 start = time.time() #print ("Vtp", Vtp, "Vtn", Vtn, "Vdd", Vdd, "Kn", Kn, "Kp", Kp, "Sn", Sn) Sp = Sn *2.0 lenV = 3 vs = [] tIs = [] nIs = [] for i in range(lenV): vs.append(Variable("v" + str(i))) nIs.append(Variable("nI" + str(i))) for i in range(lenV*2): tIs.append(Variable("tI" + str(i))) allConstraints = [] for i in range(lenV): allConstraints.append(vs[i] >= 0.0) allConstraints.append(vs[i] <= 1.8) allConstraints += nFetLeak(Vtn, Vdd, Kn, Sn, 0.0, inputVoltage, vs[1], tIs[0]) allConstraints += nFetLeak(Vtn, Vdd, Kn, Sn, vs[1], inputVoltage, vs[0], tIs[1]) allConstraints += nFetLeak(Vtn, Vdd, Kn, Sn, vs[1], vs[0], Vdd, tIs[2]) allConstraints += pFetLeak(Vtp, Vdd, Kp, Sp, Vdd, inputVoltage, vs[2], tIs[3]) allConstraints += pFetLeak(Vtp, Vdd, Kp, Sp, vs[2], inputVoltage, vs[0], tIs[4]) allConstraints += pFetLeak(Vtp, Vdd, Kp, Sp, vs[2], vs[0], 0.0, tIs[5]) allConstraints.append(nIs[0] == -tIs[4] - tIs[1]) allConstraints.append(nIs[1] == -tIs[0] + tIs[1] + tIs[2]) allConstraints.append(nIs[2] == -tIs[3] + tIs[5] + tIs[4]) for i in range(lenV): allConstraints.append(nIs[i] == 0.0) allSolutions = [] while True: if numSolutions != "all" and len(allSolutions) == numSolutions: break # Store constraints pruning search space so that # old hyperrectangles are not considered excludingConstraints = [] for solution in allSolutions: singleExcludingConstraints = [] for i in range(lenV): singleExcludingConstraints.append(vs[i] < solution[i][0]) singleExcludingConstraints.append(vs[i] > solution[i][1]) excludingConstraints.append(singleExcludingConstraints) #print ("allConstraints") #print (allConstraints) #print ("numConstraints", len(allConstraints)) f_sat = logical_and(*allConstraints) if len(excludingConstraints) > 0: for constraints in excludingConstraints: f_sat = logical_and(f_sat, logical_or(*constraints)) #print ("f_sat") #print (f_sat) result = CheckSatisfiability(f_sat, epsilon) #print (result) if result is None: break hyper = np.zeros((lenV,2)) for i in range(lenV): hyper[i,:] = [result[vs[i]].lb() - 1000*epsilon, result[vs[i]].ub() + 1000*epsilon] #print ("hyper", hyper) allSolutions.append(hyper) print ("num solutions found", len(allSolutions)) end = time.time() print ("time taken", end - start) return allSolutions
def rambusOscillatorLcMosfet(numStages, numSolutions = "all", g_cc = 0.5, Vtp = -0.4, Vtn = 0.4, Vdd = 1.8, Kn = 270*1e-6, Kp = -90*1e-6, Sn = 3.0): epsilon = 1e-14 start = time.time() #print ("Vtp", Vtp, "Vtn", Vtn, "Vdd", Vdd, "Kn", Kn, "Kp", Kp, "Sn", Sn) g_fwd = 1.0 lenV = numStages*2 Sp = 2*Sn vs = [] ifwdNs = [] ifwdPs = [] iccNs = [] iccPs = [] for i in range(lenV): vs.append(Variable("v" + str(i))) ifwdNs.append(Variable("ifwdN" + str(i))) ifwdPs.append(Variable("ifwdP" + str(i))) iccNs.append(Variable("iccN" + str(i))) iccPs.append(Variable("iccP" + str(i))) allConstraints = [] for i in range(lenV): allConstraints.append(vs[i] >= 0.0) allConstraints.append(vs[i] <= Vdd) allConstraints.append(g_fwd*(-ifwdNs[i]-ifwdPs[i]) + g_cc*(-iccNs[i]-iccPs[i]) == 0) fwdInd = (i-1)%lenV ccInd = (i+lenV//2)%lenV fwdConstraints = nFet(Vtn, Vdd, Kn, Sn, 0.0, vs[fwdInd], vs[i], ifwdNs[i]) fwdConstraints += pFet(Vtp, Vdd, Kp, Sp, Vdd, vs[fwdInd], vs[i], ifwdPs[i]) ccConstraints = nFet(Vtn, Vdd, Kn, Sn, 0.0, vs[ccInd], vs[i], iccNs[i]) ccConstraints += pFet(Vtp, Vdd, Kp, Sp, Vdd, vs[ccInd], vs[i], iccPs[i]) allConstraints += fwdConstraints + ccConstraints allSolutions = [] while True: if numSolutions != "all" and len(allSolutions) == numSolutions: break # Store constraints pruning search space so that # old hyperrectangles are not considered excludingConstraints = [] for solution in allSolutions: singleExcludingConstraints = [] for i in range(lenV): singleExcludingConstraints.append(vs[i] < solution[i][0]) singleExcludingConstraints.append(vs[i] > solution[i][1]) excludingConstraints.append(singleExcludingConstraints) #print ("allConstraints") #print (allConstraints) f_sat = logical_and(*allConstraints) if len(excludingConstraints) > 0: for constraints in excludingConstraints: f_sat = logical_and(f_sat, logical_or(*constraints)) #print ("f_sat") #print (f_sat) result = CheckSatisfiability(f_sat, epsilon) #print (result) if result is None: break hyper = np.zeros((lenV,2)) for i in range(lenV): hyper[i,:] = [result[vs[i]].lb() - 1000*epsilon, result[vs[i]].ub() + 1000*epsilon] #print ("hyper", hyper) allSolutions.append(hyper) print ("num solutions found", len(allSolutions)) end = time.time() print ("time taken", end - start) return allSolutions
def schmittTriggerScMosfet(inputVoltage, numSolutions="all"): epsilon = 1e-14 start = time.time() lenV = 3 Vdd = 1.0 sn = 3 sp = 2 * sn vs = [] tIs = [] nIs = [] for i in range(lenV): vs.append(Variable("v" + str(i))) nIs.append(Variable("nI" + str(i))) for i in range(lenV * 2): tIs.append(Variable("tI" + str(i))) allConstraints = [] for i in range(lenV): allConstraints.append(vs[i] >= 0.0) allConstraints.append(vs[i] <= Vdd) allConstraints += mvs_id('n', 0.0, inputVoltage, vs[1], tIs[0], sn) allConstraints += mvs_id('n', vs[1], inputVoltage, vs[0], tIs[1], sn) allConstraints += mvs_id('n', vs[1], vs[0], Vdd, tIs[2], sn) allConstraints += mvs_id('p', Vdd, inputVoltage, vs[2], tIs[3], sp) allConstraints += mvs_id('p', vs[2], inputVoltage, vs[0], tIs[4], sp) allConstraints += mvs_id('p', vs[2], vs[0], 0.0, tIs[5], sp) allConstraints.append(nIs[0] == -tIs[4] - tIs[1]) allConstraints.append(nIs[1] == -tIs[0] + tIs[1] + tIs[2]) allConstraints.append(nIs[2] == -tIs[3] + tIs[5] + tIs[4]) for i in range(lenV): allConstraints.append(nIs[i] == 0.0) allSolutions = [] while True: if numSolutions != "all" and len(allSolutions) == numSolutions: break # Store constraints pruning search space so that # old hyperrectangles are not considered excludingConstraints = [] for solution in allSolutions: singleExcludingConstraints = [] for i in range(lenV): singleExcludingConstraints.append(vs[i] < solution[i][0]) singleExcludingConstraints.append(vs[i] > solution[i][1]) excludingConstraints.append(singleExcludingConstraints) #print ("allConstraints") #print (allConstraints) f_sat = logical_and(*allConstraints) if len(excludingConstraints) > 0: for constraints in excludingConstraints: f_sat = logical_and(f_sat, logical_or(*constraints)) #print ("f_sat") #print (f_sat) result = CheckSatisfiability(f_sat, epsilon) #print (result) if result is None: break hyper = np.zeros((lenV, 2)) for i in range(lenV): hyper[i, :] = [ result[vs[i]].lb() - 2 * epsilon, result[vs[i]].ub() + 2 * epsilon ] #print ("hyper", hyper) allSolutions.append(hyper) print("num solutions found", len(allSolutions)) end = time.time() print("time taken", end - start) return allSolutions
def mvs_id(fetType, Vs, Vg, Vd, I, shape): params = model_params(fetType) version = params['version'] mType = params['mType'] W = params['W'] Lgdr = params['Lgdr'] dLg = params['dLg'] Cg = params['Cg'] etov = params['etov'] delta = params['delta'] n0 = params['n0'] Rs0 = params['Rs0'] Rd0 = params['Rd0'] Cif = params['Cif'] Cof = params['Cof'] vxo = params['vxo'] * 1e7 mu = params['mu'] beta = params['beta'] Tjun = params['Tjun'] phib = params['phib'] gamma = params['gamma'] Vt0 = params['Vt0'] alpha = params['alpha'] mc = params['mc'] CTM_select = params['CTM_select'] CC = params['CC'] nd = params['nd'] zeta = params['zeta'] # SMALL_VALUE SMALL_VALUE = 1e-10 # LARGE_VALUE LARGE_VALUE = 40 if mType == 1.0: Vb = 0.0 Vdsi = Variable("Vdsin") Vgsi = Variable("Vgsin") Vbsi = Variable("Vbsin") n = Variable("nn") nphit = Variable("nphitn") phibVbs = Variable("phibVbsn") Vtpcorr = Variable("Vtpcorrn") eVgpre = Variable("eVgpren") FFpre = Variable("FFpren") ab = Variable("abn") Vcorr = Variable("Vcorrn") Vgscorr = Variable("Vgscorrn") Vbscorr = Variable("Vbscorrn") phibVbscorr = Variable("phibVbscorrn") Vt0bs = Variable("Vt0bsn") phibVbsi = Variable("phibVbsin") Vt0bs0 = Variable("Vt0bs0n") Vtp = Variable("Vtpn") Vtp0 = Variable("Vtp0n") eVg = Variable("eVgn") FF = Variable("FFn") eVg0 = Variable("eVg0n") FF0 = Variable("FF0n") Qref = Variable("Qrefn") eta = Variable("etan") Qinv_corr = Variable("Qinv_corrn") Vdsat = Variable("Vdsatn") VdsiVdsat = Variable("VdsiVdsatn") powVal = Variable("powValn") Fsat = Variable("Fsatn") else: Vb = 1.8 Vdsi = Variable("Vdsip") Vgsi = Variable("Vgsip") Vbsi = Variable("Vbsip") n = Variable("np") nphit = Variable("nphitp") phibVbs = Variable("phibVbsp") Vtpcorr = Variable("Vtpcorrp") eVgpre = Variable("eVgprep") FFpre = Variable("FFprep") ab = Variable("abp") Vcorr = Variable("Vcorrp") Vgscorr = Variable("Vgscorrp") Vbscorr = Variable("Vbscorrp") phibVbscorr = Variable("phibVbscorrp") Vt0bs = Variable("Vt0bsp") phibVbsi = Variable("phibVbsip") Vt0bs0 = Variable("Vt0bs0p") Vtp = Variable("Vtpp") Vtp0 = Variable("Vtp0p") eVg = Variable("eVgp") FF = Variable("FFp") eVg0 = Variable("eVg0p") FF0 = Variable("FF0p") Qref = Variable("Qrefp") eta = Variable("etap") Qinv_corr = Variable("Qinv_corrp") Vdsat = Variable("Vdsatp") VdsiVdsat = Variable("VdsiVdsatp") powVal = Variable("powValp") Fsat = Variable("Fsatp") constraints = [] if mType == 1: constraints.append( logical_or(logical_and(Vs <= Vd, Vdsi == mType * (Vd - Vs)), logical_and(Vs > Vd, Vdsi == mType * (Vs - Vd)))) constraints.append( logical_or(logical_and(Vs <= Vd, Vgsi == mType * (Vg - Vs)), logical_and(Vs > Vd, Vgsi == mType * (Vg - Vd)))) constraints.append( logical_or(logical_and(Vs <= Vd, Vbsi == mType * (Vb - Vs)), logical_and(Vs > Vd, Vbsi == mType * (Vb - Vd)))) else: constraints.append( logical_or(logical_and(Vd <= Vs, Vdsi == mType * (Vd - Vs)), logical_and(Vd > Vs, Vdsi == mType * (Vs - Vd)))) constraints.append( logical_or(logical_and(Vd <= Vs, Vgsi == mType * (Vg - Vs)), logical_and(Vd > Vs, Vgsi == mType * (Vg - Vd)))) constraints.append( logical_or(logical_and(Vd <= Vs, Vbsi == mType * (Vb - Vs)), logical_and(Vd > Vs, Vbsi == mType * (Vb - Vd)))) Cofs = 0 * (0.345e-12 / etov) * dLg / 2.0 + Cof # s-terminal outer fringing cap [F/cm] Cofd = 0 * (0.345e-12 / etov) * dLg / 2.0 + Cof # d-terminal outer fringing cap [F/cm] Leff = Lgdr - dLg # Effective channel length [cm]. After subtracting overlap lengths on s and d side kB = 8.617e-5 # Boltzmann constant [eV/K] phit = kB * Tjun # Thermal voltage, kT/q [V] me = (9.1e-31) * mc # Carrier mass [Kg] constraints.append(n == n0 + nd * Vdsi) constraints.append(nphit == n * phit) aphit = alpha * phit constraints.append(phibVbs == dabs(phib - Vbsi)) constraints.append(Vtpcorr == Vt0 + gamma * (sqrt(phibVbs) - sqrt(phib)) - Vdsi * delta) constraints.append(eVgpre == exp((Vgsi - Vtpcorr) / (aphit * 1.5))) constraints.append(FFpre == 1.0 / (1.0 + eVgpre)) constraints.append(ab == 2 * (1 - 0.99 * FFpre) * phit) constraints.append(Vcorr == (1.0 + 2.0 * delta) * (ab / 2.0) * (exp(-Vdsi / ab))) constraints.append(Vgscorr == Vgsi + Vcorr) constraints.append(Vbscorr == Vbsi + Vcorr) constraints.append(phibVbscorr == dabs(phib - Vbscorr)) constraints.append(Vt0bs == Vt0 + gamma * (sqrt(phibVbscorr) - sqrt(phib))) constraints.append(phibVbsi == dabs(phib - Vbsi)) constraints.append(Vt0bs0 == Vt0 + gamma * (sqrt(phibVbsi) - sqrt(phib))) constraints.append(Vtp == Vt0bs - Vdsi * delta - 0.5 * aphit) constraints.append(Vtp0 == Vt0bs0 - Vdsi * delta - 0.5 * aphit) constraints.append(eVg == exp((Vgscorr - Vtp) / (aphit))) constraints.append(FF == 1.0 / (1.0 + eVg)) constraints.append(eVg0 == exp((Vgsi - Vtp0) / (aphit))) constraints.append(Qref == Cg * nphit) constraints.append(eta == (Vgscorr - (Vt0bs - Vdsi * delta - FF * aphit)) / (nphit)) constraints.append(Qinv_corr == Qref * log(1.0 + exp(eta))) vx0 = vxo Vdsats = vx0 * Leff / mu constraints.append(Vdsat == Vdsats * (1.0 - FF) + phit * FF) constraints.append(VdsiVdsat == Vdsi / Vdsat) constraints.append(powVal == pow(VdsiVdsat, beta)) constraints.append(Fsat == VdsiVdsat / (pow((1 + powVal), (1.0 / beta)))) if mType == 1: constraints.append( logical_or( logical_and(Vs <= Vd, I == Qinv_corr * vx0 * Fsat * W * mType * shape), logical_and( Vs > Vd, I == Qinv_corr * vx0 * Fsat * W * mType * -1.0 * shape))) else: constraints.append( logical_or( logical_and(Vd <= Vs, I == Qinv_corr * vx0 * Fsat * W * mType * shape), logical_and( Vd > Vs, I == Qinv_corr * vx0 * Fsat * W * mType * -1.0 * shape))) return constraints