# Setup the motherboard. motherboard = X86Board( clk_freq="3GHz", processor=processor, memory=memory, cache_hierarchy=cache_hierarchy, ) kernal_args = motherboard.get_default_kernel_args() if args.boot_type == "init": kernal_args.append("init=/root/exit.sh") # Set the Full System workload. motherboard.set_kernel_disk_workload( kernel=Resource( "x86-linux-kernel-5.4.49", resource_directory=args.resource_directory, ), disk_image=Resource( "x86-ubuntu-18.04-img", resource_directory=args.resource_directory, ), kernel_args=kernal_args, ) # Begin running of the simulation. This will exit once the Linux system boot # is complete. print("Running with ISA: " + get_runtime_isa().name) print("Running with protocol: " + get_runtime_coherence_protocol().name) print()
if args.synthetic == "1": if args.size == "USA-road-d.NY.gr": print("fatal: cannot use a real graph with --synthetic 1", file=sys.stderr) exit(-1) command = "./{} -g {}\n".format(args.benchmark, args.size) else: command = "./{} -sf ../{}".format(args.benchmark, args.size) board.set_kernel_disk_workload( # The x86 linux kernel will be automatically downloaded to the # `~/.cache/gem5` directory if not already present. # gapbs benchamarks was tested with kernel version 4.19.83 kernel=Resource("x86-linux-kernel-4.19.83", ), # The x86-gapbs image will be automatically downloaded to the # `~/.cache/gem5` directory if not already present. disk_image=Resource("x86-gapbs", ), readfile_contents=command, ) root = Root(full_system=True, system=board) # sim_quantum must be set when KVM cores are used. root.sim_quantum = int(1e9) m5.instantiate() # We maintain the wall clock time.
# `m5_exit instruction encountered` is encountered. We start collecting # the number of committed instructions till ROI ends (marked by another # `m5_exit instruction encountered`). We then start copying the output logs, # present in the /home/gem5/spec2006/results directory to the `output_dir`. # The runscript.sh file places `m5 exit` before and after the following command # Therefore, we only pass this command without m5 exit. command = "{} {} {}".format(args.benchmark, args.size, output_dir) board.set_kernel_disk_workload( # The x86 linux kernel will be automatically downloaded to the # `~/.cache/gem5` directory if not already present. # SPEC CPU2006 benchamarks were tested with kernel version 4.19.83 and # 5.4.49 kernel=Resource("x86-linux-kernel-4.19.83", ), # The location of the x86 SPEC CPU 2017 image disk_image=CustomDiskImageResource( args.image, disk_root_partition=args.partition, ), readfile_contents=command, ) # We need this for long running processes. m5.disableAllListeners() root = Root(full_system=True, system=board) # sim_quantum must be set when KVM cores are used.
system.platform.attachPlic() parser = argparse.ArgumentParser() parser.add_argument('--cpu-clock-rate', type=str, help='CPU clock rate, e.g. 3GHz') parser.add_argument('--memory-size', type=str, help='Memory size, e.g. 4GiB') args = parser.parse_args() cpu_clock_rate = args.cpu_clock_rate memory_size = args.memory_size # Try downloading the Resource bbl_resource = Resource("riscv-boot-exit-nodisk") bbl_path = bbl_resource.get_local_path() system = System() system.clk_domain = SrcClockDomain(clock=cpu_clock_rate, voltage_domain=VoltageDomain()) system.mem_ranges = [AddrRange(start=0x80000000, size=memory_size)] system.cpu = [TimingSimpleCPU(cpu_id=i) for i in range(1)] system.mem_mode = 'timing' createHiFivePlatform(system) system.system_outgoing_bridge = OutgoingRequestBridge()
`configs/example/gem5_library/x86-ubuntu-run-with-kvm.py` can be referenced as an example of booting Ubuntu with a KVM CPU. Usage ----- ``` scons build/X86/gem5.opt ./build/X86/gem5.opt configs/example/gem5_library/x86-ubuntu-run.py ``` """ from gem5.prebuilt.demo.x86_demo_board import X86DemoBoard from gem5.resources.resource import Resource from gem5.simulate.simulator import Simulator # Here we setup the board. The prebuilt X86DemoBoard allows for Full-System X86 # simulation. board = X86DemoBoard() # We then set the workload. Here we use the 5.4.49 Linux kernel with an X86 # Ubuntu OS. If these cannot be found locally they will be automatically # downloaded. board.set_kernel_disk_workload( kernel=Resource("x86-linux-kernel-5.4.49"), disk_image=Resource("x86-ubuntu-18.04-img"), ) simulator = Simulator(board=board) simulator.run()
board = X86Board( clk_freq="3GHz", processor=processor, memory=memory, cache_hierarchy=cache_hierarchy, ) # The command to run. command = ("cd /home/gem5/parsec-benchmark\n" + "source env.sh\n" + "parsecmgmt -a run -p {} ".format(args.benchmark) + "-c gcc-hooks -i {} ".format(args.size) + "-n {}\n".format(str(args.num_cpus))) board.set_kernel_disk_workload( kernel=Resource( "x86-linux-kernel-5.4.49", resource_directory=args.resource_directory, ), disk_image=Resource( "x86-parsec", resource_directory=args.resource_directory, ), readfile_contents=command, ) print("Running with ISA: " + get_runtime_isa().name) print("Running with protocol: " + get_runtime_coherence_protocol().name) print() # Here we define some custom workbegin/workend exit event generators. Here we # want to switch to detailed CPUs at the beginning of the ROI, then continue to
if __name__ == "__m5_main__": args = parse_options() cpu = None if args.cpu_type == "atomic": cpu = CPUTypes.ATOMIC elif args.cpu_type == "timing": cpu = CPUTypes.TIMING elif args.cpu_type == "o3": cpu = CPUTypes.O3 else: assert (False, "The CPU type must be one of: {atomic, timing, o3}") bbl = CustomResource( args.bbl) if args.bbl else Resource('riscv-boot-exit-nodisk') # Run a check to ensure the right version of gem5 is being used. requires(isa_required=ISA.RISCV) from gem5.components.cachehierarchies.classic.private_l1_private_l2_cache_hierarchy \ import ( PrivateL1PrivateL2CacheHierarchy, ) # Setup the cache hierarchy. PrivateL1PrivateL2 and NoCache have been tested. cache_hierarchy = PrivateL1PrivateL2CacheHierarchy(l1d_size="32KiB", l1i_size="32KiB", l2_size="512KiB") # Setup the system memory.
) processor = SimpleProcessor(cpu_type=cpu_type, num_cores=args.num_cpus) # Setup the board. board = RiscvBoard( clk_freq="1GHz", processor=processor, memory=memory, cache_hierarchy=cache_hierarchy, ) # Set the Full System workload. board.set_kernel_disk_workload( kernel=Resource( "riscv-bootloader-vmlinux-5.10", resource_directory=args.resource_directory, ), disk_image=Resource( "riscv-ubuntu-20.04-img", resource_directory=args.resource_directory, ), ) simulator = Simulator(board=board) if args.tick_exit: simulator.run(max_ticks = args.tick_exit) else: simulator.run() print(
# Also, we sleep the system for some time so that the output is printed # properly. command = "cd /home/gem5/parsec-benchmark;".format(args.benchmark) \ + "source env.sh;" \ + "parsecmgmt -a run -p {} -c gcc-hooks -i {} \ -n {};" .format(args.benchmark, args.size, "2") \ + "sleep 5;" \ + "m5 exit;" \ board.set_kernel_disk_workload( # The x86 linux kernel will be automatically downloaded to the # `~/.cache/gem5` directory if not already present. # PARSEC benchamarks were tested with kernel version 4.19.83 kernel=Resource("x86-linux-kernel-4.19.83", ), # The x86-parsec image will be automatically downloaded to the # `~/.cache/gem5` directory if not already present. disk_image=Resource("x86-parsec", ), readfile_contents=command, ) # We need this for long running processes. m5.disableAllListeners() root = Root(full_system=True, system=board) # sim_quantum must be set if KVM cores are used. root.sim_quantum = int(1e9)
cache_hierarchy=cache_hierarchy, ) # Here we set the Full System workload. # The `set_kernel_disk_workload` function for the RiscvBoard accepts a # RISCV bootloader and a disk image. Once the system successfully boots, it # encounters an `m5_exit instruction encountered`. We stop the simulation then. # When the simulation has ended you may inspect `m5out/system.pc.com_1.device` # to see the stdout. board.set_kernel_disk_workload( # The RISCV bootloader will be automatically downloaded to the # `~/.cache/gem5` directory if not already present. # The riscv-ubuntu boot-test was tested with riscv-bootloader-5.10 kernel=Resource("riscv-bootloader-vmlinux-5.10", ), # The RISCV ubuntu image will be automatically downloaded to the # `~/.cache/gem5` directory if not already present. disk_image=Resource("riscv-ubuntu-20.04-img", ), ) root = Root(full_system=True, system=board) m5.instantiate() # We simulate the system till we encounter `m5_exit instruction encountered`. exit_event = m5.simulate() # We check whether the simulation ended with `m5_exit instruction encountered`
cache_hierarchy = PrivateL1PrivateL2CacheHierarchy(l1d_size="32KiB", l1i_size="32KiB", l2_size="512KiB") # Setup the system memory. memory = SingleChannelDDR3_1600() # Setup a single core Processor. processor = SimpleProcessor(cpu_type=CPUTypes.TIMING, num_cores=1) # Setup the board. board = RiscvBoard( clk_freq="1GHz", processor=processor, memory=memory, cache_hierarchy=cache_hierarchy, ) # Set the Full System workload. board.set_kernel_disk_workload( kernel=Resource("riscv-bootloader-vmlinux-5.10"), disk_image=Resource("riscv-disk-img"), ) simulator = Simulator(board=board) print("Beginning simulation!") # Note: This simulation will never stop. You can access the terminal upon boot # using m5term (`./util/term`): `./m5term localhost <port>`. Note the `<port>` # value is obtained from the gem5 terminal stdout. Look out for # "system.platform.terminal: Listening for connections on port <port>". simulator.run()
else: raise NotADirectoryError("Unknown CPU type '{}'.".format(input)) # Setup the system. cache_hierarchy = NoCache() memory = SingleChannelDDR3_1600() processor = SimpleProcessor(cpu_type=input_to_cputype(args.cpu), num_cores=1) motherboard = SimpleBoard( clk_freq="3GHz", processor=processor, memory=memory, cache_hierarchy=cache_hierarchy, ) # Set the workload binary = Resource(args.resource, resource_directory=args.resource_directory) motherboard.set_se_binary_workload(binary) # Run the simulation simulator = Simulator(board=motherboard, full_system=False) simulator.run() print( "Exiting @ tick {} because {}.".format( simulator.get_current_tick(), simulator.get_last_exit_event_cause(), ) )
# The gem5 library simble board which can be used to run simple SE-mode # simulations. board = SimpleBoard( clk_freq="3GHz", processor=processor, memory=memory, cache_hierarchy=cache_hierarchy, ) # Here we set the workload. In this case we want to run a simple "Hello World!" # program compiled to the ARM ISA. The `Resource` class will automatically # download the binary from the gem5 Resources cloud bucket if it's not already # present. board.set_se_binary_workload( # The `Resource` class reads the `resources.json` file from the gem5 # resources repository: # https://gem5.googlesource.com/public/gem5-resource. # Any resource specified in this file will be automatically retrieved. # At the time of writing, this file is a WIP and does not contain all # resources. Jira ticket: https://gem5.atlassian.net/browse/GEM5-1096 Resource("arm-hello64-static")) # Lastly we run the simulation. simulator = Simulator(board=board, full_system=False) simulator.run() print("Exiting @ tick {} because {}.".format( simulator.get_current_tick(), simulator.get_last_exit_event_cause(), ))
num_cores=args.num_cpus) elif args.cpu_type == "timing": processor = SimpleProcessor(cpu_type=CPUTypes.TIMING, num_cores=args.num_cpus) # Setup the board. board = LupvBoard( clk_freq="1GHz", processor=processor, memory=memory, cache_hierarchy=cache_hierarchy, ) # Set the Full System workload. board.set_kernel_disk_workload( kernel=Resource("riscv-lupio-linux-kernel"), disk_image=Resource("riscv-lupio-busybox-img"), ) # Begin running of the simulation. print("Running with ISA: " + get_runtime_isa().name) print() root = Root(full_system=True, system=board) m5.instantiate() print("Beginning simulation!") exit_event = m5.simulate(args.max_ticks) print("Exiting @ tick {} because {}.".format(m5.curTick(), exit_event.getCause()))