def process_module_list(module_list,
fname,
catalog_name=None,
catalog_description=None):
root = Element("codeintel", version="2.0")
if catalog_name:
root.set("name", catalog_name)
if catalog_description:
root.set("description", catalog_description)
cixfile = SubElement(root,
"file",
lang=lang,
mtime=str(0),
path=os.path.basename(fname))
print("Generating CIX Info: ")
for mod in module_list:
print(mod)
sys.stdout.flush()
try:
# Introspect the module.
gencix.docmodule(mod, cixfile, False)
# Cile it as well, then merge the cile and introspect data. This
# gives us additional information, including return type info,
# docs strings, line numbers...
mod_path = module_paths.get(mod)
if mod_path and os.path.splitext(mod_path)[1] == ".py":
# Need Python 2.6 to perform the cile.
tree = get_pythoncile_cix_tree_for_path(mod_path)
merge_module_scopes(
mod,
root,
tree,
use_init_fallback=(mod_path.endswith("__init__.py")),
log=False)
except Exception:
import traceback
print("\nEXCEPTION:", sys.exc_info()[1], "when processing", mod)
traceback.print_exc()
gencix.writeCixFileForElement(fname, root)
print("done writing generic bits: %r." % fname)
def process_module_list(module_list, fname, catalog_name=None,
catalog_description=None):
root = Element("codeintel", version="2.0")
if catalog_name:
root.set("name", catalog_name)
if catalog_description:
root.set("description", catalog_description)
cixfile = SubElement(root, "file",
lang=lang,
mtime=str(0),
path=os.path.basename(fname))
print("Generating CIX Info: ")
for mod in module_list:
print(mod)
sys.stdout.flush()
try:
# Introspect the module.
gencix.docmodule(mod, cixfile, False)
# Cile it as well, then merge the cile and introspect data. This
# gives us additional information, including return type info,
# docs strings, line numbers...
mod_path = module_paths.get(mod)
if mod_path and os.path.splitext(mod_path)[1] == ".py":
# Need Python 2.6 to perform the cile.
tree = get_pythoncile_cix_tree_for_path(mod_path)
merge_module_scopes(mod, root, tree, use_init_fallback=
(mod_path.endswith("__init__.py")),
log=False)
except Exception:
import traceback
print("\nEXCEPTION:", sys.exc_info()[1], "when processing", mod)
traceback.print_exc()
gencix.writeCixFileForElement(fname, root)
print("done writing generic bits: %r." % fname)
def fixup_platform_module(platform_elem):
# Remove the filename location strings that get set in these function
# signatures.
# http://bugs.activestate.com/show_bug.cgi?id=67610
platform_elem_names = create_names_dict(platform_elem)
el = platform_elem_names.get("architecture")
if el:
el.set("signature", "architecture(...)")
el = platform_elem_names.get("libc_ver")
if el:
el.set("signature", "libc_ver(...)")
# Fixup the CIX for specific modules.
file_elem_from_name = create_names_dict(file_elem)
if "cgi" in file_elem_from_name:
fixup_cgi_module(file_elem_from_name["cgi"])
if "platform" in file_elem_from_name:
fixup_platform_module(file_elem_from_name["platform"])
# Update the citdl information.
gencix.perform_smart_analysis(main_root)
# Merge any existing CIX data with what we have just generated.
print("Merging old cix file with the new one...")
merge_trees(orig_root, main_root)
gencix.writeCixFileForElement(fname, orig_root)
print("Please run 'ci2 test python stdlib'\n")
