def test_sc_tag(self):
constA = [-3.0 + 1j, -1.0 - 1j, 1.0 + 1j, 3 - 1j]
constB = [12.0 + 1j, -12.0 - 1j, 6.0 + 1j, -6 - 1j]
src_data = (0, 1, 2, 3, 3, 2, 1, 0)
expected_result = [
-3 + 1j, -1 - 1j, 1 + 1j, 3 - 1j, -6 - 1j, 6 + 1j, -12 - 1j,
12 + 1j
]
first_tag = gr.tag_t()
first_tag.key = pmt.intern("set_symbol_table")
first_tag.value = pmt.init_c32vector(len(constA), constA)
first_tag.offset = 0
second_tag = gr.tag_t()
second_tag.key = pmt.intern("set_symbol_table")
second_tag.value = pmt.init_c32vector(len(constB), constB)
second_tag.offset = 4
src = blocks.vector_source_s(src_data, False, 1,
[first_tag, second_tag])
op = digital.chunks_to_symbols_sc(constB)
dst = blocks.vector_sink_c()
self.tb.connect(src, op)
self.tb.connect(op, dst)
self.tb.run()
actual_result = dst.data()
self.assertEqual(expected_result, actual_result)
def test_sc_tag(self):
constA = [-3.0+1j, -1.0-1j, 1.0+1j, 3-1j]
constB = [12.0+1j, -12.0-1j, 6.0+1j, -6-1j]
src_data = (0, 1, 2, 3, 3, 2, 1, 0)
expected_result = (-3+1j, -1-1j, 1+1j, 3-1j,
-6-1j, 6+1j, -12-1j, 12+1j)
first_tag = gr.tag_t()
first_tag.key = pmt.intern("set_symbol_table")
first_tag.value = pmt.init_c32vector(len(constA), constA)
first_tag.offset = 0
second_tag = gr.tag_t()
second_tag.key = pmt.intern("set_symbol_table")
second_tag.value = pmt.init_c32vector(len(constB), constB)
second_tag.offset = 4
src = blocks.vector_source_s(src_data, False, 1, [first_tag, second_tag])
op = digital.chunks_to_symbols_sc(constB)
dst = blocks.vector_sink_c()
self.tb.connect(src, op)
self.tb.connect(op, dst)
self.tb.run()
actual_result = dst.data()
self.assertEqual(expected_result, actual_result)
def test_sc_callback(self):
constA = [-3.0+1j, -1.0-1j, 1.0+1j, 3-1j]
constB = [12.0+1j, -12.0-1j, 6.0+1j, -6-1j]
src_data = (0, 1, 2, 3, 3, 2, 1, 0)
expected_result=(12.0+1j, -12.0-1j, 6.0+1j, -6-1j, -6-1j, 6+1j, -12-1j, 12+1j)
src = blocks.vector_source_s(src_data, False, 1, "")
op = digital.chunks_to_symbols_sc(constA)
op.set_symbol_table(constB)
dst = blocks.vector_sink_c()
self.tb.connect(src, op)
self.tb.connect(op, dst)
self.tb.run()
actual_result = dst.data()
self.assertEqual(expected_result, actual_result)
def __init__(self, constellation, f, N0=0.25, seed=-666):
"""
constellation - a constellation object used for modulation.
f - a finite state machine specification used for coding.
N0 - noise level
seed - random seed
"""
super(trellis_tb, self).__init__()
# packet size in bits (make it multiple of 16 so it can be packed in a
# short)
packet_size = 1024 * 16
# bits per FSM input symbol
# bits per FSM input symbol
bitspersymbol = int(round(math.log(f.I()) / math.log(2)))
# packet size in trellis steps
K = packet_size // bitspersymbol
# TX
src = blocks.lfsr_32k_source_s()
# packet size in shorts
src_head = blocks.head(gr.sizeof_short, packet_size // 16)
# unpack shorts to symbols compatible with the FSM input cardinality
s2fsmi = blocks.packed_to_unpacked_ss(bitspersymbol, gr.GR_MSB_FIRST)
# initial FSM state = 0
enc = trellis.encoder_ss(f, 0)
mod = digital.chunks_to_symbols_sc(constellation.points(), 1)
# CHANNEL
add = blocks.add_cc()
noise = analog.noise_source_c(
analog.GR_GAUSSIAN, math.sqrt(
N0 / 2), seed)
# RX
# data preprocessing to generate metrics for Viterbi
metrics = trellis.constellation_metrics_cf(
constellation.base(), digital.TRELLIS_EUCLIDEAN)
# Put -1 if the Initial/Final states are not set.
va = trellis.viterbi_s(f, K, 0, -1)
# pack FSM input symbols to shorts
fsmi2s = blocks.unpacked_to_packed_ss(bitspersymbol, gr.GR_MSB_FIRST)
# check the output
self.dst = blocks.check_lfsr_32k_s()
self.connect(src, src_head, s2fsmi, enc, mod)
self.connect(mod, (add, 0))
self.connect(noise, (add, 1))
self.connect(add, metrics, va, fsmi2s, self.dst)
def test_sc_005(self):
const = [1 + 0j, 0 + 1j, -1 + 0j, 0 - 1j]
src_data = (0, 1, 2, 3, 3, 2, 1, 0)
expected_result = (1 + 0j, 0 + 1j, -1 + 0j, 0 - 1j, 0 - 1j, -1 + 0j,
0 + 1j, 1 + 0j)
src = blocks.vector_source_s(src_data)
op = digital.chunks_to_symbols_sc(const)
dst = blocks.vector_sink_c()
self.tb.connect(src, op)
self.tb.connect(op, dst)
self.tb.run()
actual_result = dst.data()
self.assertEqual(expected_result, actual_result)
def test_sc_callback(self):
constA = [-3.0 + 1j, -1.0 - 1j, 1.0 + 1j, 3 - 1j]
constB = [12.0 + 1j, -12.0 - 1j, 6.0 + 1j, -6 - 1j]
src_data = (0, 1, 2, 3, 3, 2, 1, 0)
expected_result = (12.0 + 1j, -12.0 - 1j, 6.0 + 1j, -6 - 1j, -6 - 1j,
6 + 1j, -12 - 1j, 12 + 1j)
src = blocks.vector_source_s(src_data, False, 1, "")
op = digital.chunks_to_symbols_sc(constA)
op.set_symbol_table(constB)
dst = blocks.vector_sink_c()
self.tb.connect(src, op)
self.tb.connect(op, dst)
self.tb.run()
actual_result = dst.data()
self.assertEqual(expected_result, actual_result)
def test_sc_005(self):
const = [ 1+0j, 0+1j,
-1+0j, 0-1j]
src_data = (0, 1, 2, 3, 3, 2, 1, 0)
expected_result = (1+0j, 0+1j, -1+0j, 0-1j,
0-1j, -1+0j, 0+1j, 1+0j)
src = blocks.vector_source_s(src_data)
op = digital.chunks_to_symbols_sc(const)
dst = blocks.vector_sink_c()
self.tb.connect(src, op)
self.tb.connect(op, dst)
self.tb.run()
actual_result = dst.data()
self.assertEqual(expected_result, actual_result)
def __init__(self, constellation, f, N0=0.25, seed=-666L):
"""
constellation - a constellation object used for modulation.
f - a finite state machine specification used for coding.
N0 - noise level
seed - random seed
"""
super(trellis_tb, self).__init__()
# packet size in bits (make it multiple of 16 so it can be packed in a short)
packet_size = 1024*16
# bits per FSM input symbol
bitspersymbol = int(round(math.log(f.I())/math.log(2))) # bits per FSM input symbol
# packet size in trellis steps
K = packet_size/bitspersymbol
# TX
src = blocks.lfsr_32k_source_s()
# packet size in shorts
src_head = blocks.head(gr.sizeof_short, packet_size/16)
# unpack shorts to symbols compatible with the FSM input cardinality
s2fsmi = blocks.packed_to_unpacked_ss(bitspersymbol, gr.GR_MSB_FIRST)
# initial FSM state = 0
enc = trellis.encoder_ss(f, 0)
mod = digital.chunks_to_symbols_sc(constellation.points(), 1)
# CHANNEL
add = blocks.add_cc()
noise = analog.noise_source_c(analog.GR_GAUSSIAN,math.sqrt(N0/2),seed)
# RX
# data preprocessing to generate metrics for Viterbi
metrics = trellis.constellation_metrics_cf(constellation.base(), digital.TRELLIS_EUCLIDEAN)
# Put -1 if the Initial/Final states are not set.
va = trellis.viterbi_s(f, K, 0, -1)
# pack FSM input symbols to shorts
fsmi2s = blocks.unpacked_to_packed_ss(bitspersymbol, gr.GR_MSB_FIRST)
# check the output
self.dst = blocks.check_lfsr_32k_s()
self.connect (src, src_head, s2fsmi, enc, mod)
self.connect (mod, (add, 0))
self.connect (noise, (add, 1))
self.connect (add, metrics, va, fsmi2s, self.dst)
def test_001_t(self):
# Trellislength
K = 3072 # Bit in one packet
n = 2 # Bit in codeword
k = 5 # Constraint length
start_state = 0
end_state = -1 # Endstate not defined
fsm = fsm_args["awgn1o2_16"]
## setup dummy data
os = numpy.array(fsm[4], dtype=int) # Encoder output matrix
data = numpy.random.randint(0, 2, K) # Create 0s and 1s
sym_table = digital.constellation_qpsk()
# Setup blocks
data_src = blocks.vector_source_s(map(int, data))
src_head = blocks.head(gr.sizeof_short * 1, K)
# TX Sim
encoder = trellis.encoder_ss(trellis.fsm(*fsm), 0)
modulator = digital.chunks_to_symbols_sc(sym_table.points(), 1)
# Decoder
viterbi_cel = celec.gen_viterbi_fi(n, k, K, start_state, end_state,
sym_table.points(), os)
# Sinks
rx_sink = blocks.vector_sink_b(1)
# Connections
self.tb.connect(data_src, src_head, encoder)
self.tb.connect(encoder, modulator)
self.tb.connect(modulator, viterbi_cel)
self.tb.connect(viterbi_cel, rx_sink)
self.tb.run()
# # Check data
rx_output = numpy.array(rx_sink.data())
for k in range(0, K):
self.assertEqual(int(rx_output[k]), int(data[k]))
def test_001_t (self):
# Trellislength
K = 3072 # Bit in one packet
n = 2 # Bit in codeword
k = 5 # Constraint length
start_state = 0
end_state = -1 # Endstate not defined
fsm = fsm_args["awgn1o2_16"]
## setup dummy data
os = numpy.array(fsm[4], dtype=int) # Encoder output matrix
data = numpy.random.randint(0,2,K) # Create 0s and 1s
sym_table = digital.constellation_qpsk()
# Setup blocks
data_src = blocks.vector_source_s(map(int, data))
src_head = blocks.head(gr.sizeof_short*1, K)
# TX Sim
encoder = trellis.encoder_ss(trellis.fsm(*fsm), 0)
modulator = digital.chunks_to_symbols_sc(sym_table.points(), 1)
# Decoder
viterbi_cel = celec.gen_viterbi_fi(n, k, K, start_state, end_state,
sym_table.points(), os)
# Sinks
rx_sink = blocks.vector_sink_b(1)
# Connections
self.tb.connect(data_src, src_head, encoder)
self.tb.connect(encoder, modulator)
self.tb.connect(modulator, viterbi_cel)
self.tb.connect(viterbi_cel, rx_sink)
self.tb.run ()
# # Check data
rx_output = numpy.array(rx_sink.data())
for k in range(0, K):
self.assertEqual(int(rx_output[k]), int(data[k]))
def __init__(self, principal_gui, options):
gr.hier_block2.__init__(self, "bpsk_mod",
gr.io_signature(1, 1, gr.sizeof_char), # Input signature
gr.io_signature(1, 1, gr.sizeof_gr_complex)) # Output signature
self._samples_per_symbol = options.sps
self.amplitude = options.amplitude
self.verbose = options.verbose
self._excess_bw = _def_excess_bw
self._gray_code = _def_gray_code
if not isinstance(self._samples_per_symbol, int) or self._samples_per_symbol < 2:
raise TypeError, ("sample per symbol must be an integer >= 2, is %d" % self._samples_per_symbol)
arity = pow(2,self.bits_per_symbol())
#arity = pow (2, 2)
# turn bytes into k-bit vectors
self.packed_to_unpacked_bb = \
blocks.packed_to_unpacked_bb(self.bits_per_symbol(), gr.GR_MSB_FIRST)
if self._gray_code:
map_param = psk.binary_to_gray[arity]
self.symbol_mapper = digital.map_bb(map_param)
else:
self.symbol_mapper = digital.map_bb(psk.binary_to_ungray[arity])
self.diff_encoder_bb = digital.diff_encoder_bb(arity)
#This bloc allow to decode the stream
#self.scrambler = gr.scrambler_bb(0x8A, 0x7F, 7)
#Transform symbols to chips
self.symbols_to_chips = ieee_868_915.symbols_to_chips_bs()
#self.chunks2symbols = gr.chunks_to_symbols_ic(psk.constellation[arity])
self.chunks2symbols = digital.chunks_to_symbols_sc([-1+0j, 1+0j])
self.chunks2symbols_b = digital.chunks_to_symbols_bc([-1+0j, 1+0j])
# transform chips to symbols
print "bits_per_symbol", self.bits_per_symbol()
self.packed_to_unpacked_ss = \
blocks.packed_to_unpacked_ss(self.bits_per_symbol(), gr.GR_MSB_FIRST)
ntaps = 11 * self._samples_per_symbol
# pulse shaping filter
self.rrc_taps = filter.firdes.root_raised_cosine(
self._samples_per_symbol, # gain (samples_per_symbol since we're
# interpolating by samples_per_symbol)
self._samples_per_symbol, # sampling rate
1.0, # symbol rate
self._excess_bw, # excess bandwidth (roll-off factor)
ntaps)
self.rrc_filter = filter.interp_fir_filter_ccf(self._samples_per_symbol,
self.rrc_taps)
# Connect
#self.connect(self, self.bytes2chunks, self.symbol_mapper,self.scrambler, self.chunks2symbols, self.rrc_filter, self)
#Modefied for IEEE 802.15.4
#self.connect(self, self.packed_to_unpacked_bb, self.symbol_mapper, self.diff_encoder_bb, self.symbols_to_chips, self.packed_to_unpacked_ss, self.chunks2symbols, self.rrc_filter, self)
#For IEEE 802.15.4 915 868 MHz standard
self.connect(self, self.packed_to_unpacked_bb, self.symbol_mapper, self.symbols_to_chips, self.packed_to_unpacked_ss, self.chunks2symbols, self.rrc_filter, self)
#self.connect(self, self.symbols_to_chips, self.packed_to_unpacked_ss, self.chunks2symbols, self.rrc_filter, self)
#self.connect(self, self.packed_to_unpacked_ss, self.chunks2symbols, self.rrc_filter, self)
#case when we use a stream of bits
#self.connect(self, self.chunks2symbols_b, self.rrc_filter, self)
if self.verbose:
self._print_verbage()
