def test_can_recover_defines_from_verilog(self): c = HdlConvertor() c.verilog_pp_str("`define TEST_SYMBOL\n", Language.SYSTEM_VERILOG) db = c.preproc_macro_db self.assertIn("TEST_SYMBOL", db)
def test_define_and_use_in_preproc(self): c = HdlConvertor() db = c.preproc_macro_db db["S0"] = "0" res = c.verilog_pp_str("`S0", Language.SYSTEM_VERILOG) self.assertEqual(res, "0")