def __init__(self): AlteraPlatform.__init__(self, "EP3C25E144C8", _io) self.add_platform_command( "set_global_assignment -name FAMILY \"Cyclone III\"") self.add_platform_command( "set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144") self.add_platform_command( "set_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE BALANCED" ) self.add_platform_command( "set_global_assignment -name USE_CONFIGURATION_DEVICE OFF") self.add_platform_command( "set_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME \"PASSIVE SERIAL\"" ) self.add_platform_command( "set_global_assignment -name RESERVE_ALL_UNUSED_PINS_WEAK_PULLUP \"AS INPUT TRI-STATED\"" ) self.add_platform_command( "set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION \"USE AS REGULAR IO\"" ) self.add_platform_command( "set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION \"USE AS REGULAR IO\"" ) self.add_platform_command( "set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION \"USE AS REGULAR IO\"" ) self.add_platform_command( "set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION \"USE AS REGULAR IO\"" ) self.add_platform_command( "set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION \"USE AS REGULAR IO\"" ) self.add_platform_command( "set_global_assignment -name STRATIX_DEVICE_IO_STANDARD \"3.3-V LVTTL\"" )
def __init__(self, with_daughterboard=False): device = "5CEFA2F23C8" io = _io connectors = _connectors if with_daughterboard: from litex_boards.platforms.qmtech_daughterboard import QMTechDaughterboard daughterboard = QMTechDaughterboard(IOStandard("3.3-V LVTTL")) io += daughterboard.io connectors += daughterboard.connectors else: io += self.core_resources AlteraPlatform.__init__(self, device, io, connectors) if with_daughterboard: # ethernet takes the config pin, so make it available self.add_platform_command( "set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION \"USE AS REGULAR IO\"" ) # Generate PLL clock in STA self.toolchain.additional_sdc_commands.append("derive_pll_clocks") # Calculates clock uncertainties self.toolchain.additional_sdc_commands.append( "derive_clock_uncertainty")
def __init__(self, revision="revd"): assert revision in _device_map.keys() self.revision = revision AlteraPlatform.__init__(self, _device_map[revision], _io, connectors=_connectors_hsmc_gpio_daughterboard)
def __init__(self): AlteraPlatform.__init__(self, "10CL025YU256C8G", _io) self.add_platform_command( "set_global_assignment -name FAMILY \"Cyclone 10 LP\"") # self.add_platform_command("set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF") self.add_platform_command( "set_global_assignment -name INTERNAL_FLASH_UPDATE_MODE \"SINGLE IMAGE WITH ERAM\"" )
def __init__(self): AlteraPlatform.__init__(self, "10M50DAF484C6GES", _io, _connectors) # disable config pin so bank8 can use 1.2V self.add_platform_command( "set_global_assignment -name AUTO_RESTART_CONFIGURATION ON") self.add_platform_command( "set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF") self.add_platform_command( "set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF")
def __init__(self, id = 0): _device, _io, rom_size, ram_size = _variants[id] AlteraPlatform.__init__(self, _device, _io) self.add_platform_command("set_global_assignment -name FAMILY \"MAX 10\"") self.add_platform_command("set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF") self.add_platform_command("set_global_assignment -name INTERNAL_FLASH_UPDATE_MODE \"SINGLE IMAGE WITH ERAM\"") self.add_platform_command("set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF")
def __init__(self): AlteraPlatform.__init__(self, "10M50DAF484C7G", _io) self.add_platform_command( "set_global_assignment -name FAMILY \"MAX 10\"") self.add_platform_command( "set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF") self.add_platform_command( "set_global_assignment -name INTERNAL_FLASH_UPDATE_MODE \"SINGLE IMAGE WITH ERAM\"" )
def __init__(self, toolchain="quartus"): AlteraPlatform.__init__(self, "10M08SAU169C8G", _io, toolchain=toolchain) self.add_platform_command( "set_global_assignment -name FAMILY \"MAX 10\"") self.add_platform_command( "set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF") self.add_platform_command( "set_global_assignment -name INTERNAL_FLASH_UPDATE_MODE \"SINGLE IMAGE WITH ERAM\"" )
def __init__(self): AlteraPlatform.__init__(self, "10M50DAF484C6GES", _io, _connectors) # Disable config pin so bank8 can use 1.2V. self.add_platform_command( "set_global_assignment -name AUTO_RESTART_CONFIGURATION ON") self.add_platform_command( "set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF") self.add_platform_command( "set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF") self.add_platform_command( "set_global_assignment -name INTERNAL_FLASH_UPDATE_MODE \"SINGLE IMAGE WITH ERAM\"" )
def __init__(self, with_daughterboard=False): device = "EP4CE15F23C8" io = _io connectors = _connectors if with_daughterboard: from litex_boards.platforms.qmtech_daughterboard import QMTechDaughterboard daughterboard = QMTechDaughterboard(IOStandard("3.3-V LVTTL")) io += daughterboard.io connectors += daughterboard.connectors else: io += self.core_resources AlteraPlatform.__init__(self, device, io, connectors) if with_daughterboard: # an ethernet pin takes K22, so make it available self.add_platform_command( "set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION \"USE AS REGULAR IO\"" )
def __init__(self): AlteraPlatform.__init__(self, "10CL025YU256C8G", _io) self.add_platform_command( "set_global_assignment -name FAMILY \"Cyclone 10 LP\"") # self.add_platform_command("set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF") self.add_platform_command( "set_global_assignment -name INTERNAL_FLASH_UPDATE_MODE \"SINGLE IMAGE WITH ERAM\"" ) self.add_platform_command( 'set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"' ) self.add_platform_command( 'set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"' ) self.add_platform_command( 'set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"' ) self.add_platform_command( 'set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"' ) self.add_platform_command( 'set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"' )
def __init__(self): AlteraPlatform.__init__(self, "EP4CE115F29C7", _io)
def __init__(self): AlteraPlatform.__init__(self, "10CL055YU484A7G", _io) self.add_platform_command("set_global_assignment -name FAMILY \"Cyclone 10 LP\"")
def __init__(self): AlteraPlatform.__init__(self, "EP4CGX75CF23I7", _io)
def __init__(self): AlteraPlatform.__init__(self, "5CSEMA5F31C6", _io, _connectors)
def __init__(self): AlteraPlatform.__init__(self, "EP4CE15F23C8", _io)
def __init__(self, id = 0): _device, _io = _variants[id] AlteraPlatform.__init__(self, _device, _io) self.add_platform_command("set_global_assignment -name FAMILY \"Cyclone 10 LP\"")
def __init__(self): AlteraPlatform.__init__(self, "5CSEMA4U23C6", _io)
def __init__(self, toolchain="quartus"): AlteraPlatform.__init__(self, "EP4CE22F17C6", _io, _connectors, toolchain=toolchain)
def __init__(self): AlteraPlatform.__init__(self, "5CSEMA5F31C6", _io)
def __init__(self): AlteraPlatform.__init__(self, "10CL055YU484A7G", _io)
def __init__(self, toolchain="quartus"): AlteraPlatform.__init__(self, "10CL025YU256C8G", _io, toolchain=toolchain)
def __init__(self): AlteraPlatform.__init__(self, "10M50DAF484C7G", _io)
def __init__(self): AlteraPlatform.__init__(self, "EP2C35F484C8", _io)
def __init__(self): AlteraPlatform.__init__(self, "10CL025YU256C8G", _io)
def __init__(self): AlteraPlatform.__init__(self, "EP4CE22F17C6", _io)
def __init__(self): AlteraPlatform.__init__(self, "5CSEBA6U23I7", _io) self.add_extension(_mister_sdram_module_io)
def __init__(self): AlteraPlatform.__init__(self, "5CSXFC6D6F31C8", _io)
def __init__(self): AlteraPlatform.__init__(self, "EP4CE22F17C6", _io, _connectors)
def __init__(self): AlteraPlatform.__init__(self, "EP4CE6E22C8", _io)