def __init__(self, speedgrade="-C6"):
self.logger = logging.getLogger("CycloneVPLL")
self.logger.info("Creating CycloneVPLL, {}.".format(colorer("speedgrade {}".format(speedgrade))))
IntelClocking.__init__(self)
self.clkin_freq_range = {
"-C6" : (5e6, 670e6),
"-C7" : (5e6, 622e6),
"-I7" : (5e6, 622e6),
"-C8" : (5e6, 622e6),
"-A7" : (5e6, 500e6),
}[speedgrade]
self.vco_freq_range = {
"-C6" : (600e6, 1600e6),
"-C7" : (600e6, 1600e6),
"-I7" : (600e6, 1600e6),
"-C8" : (600e6, 1300e6),
"-A7" : (600e6, 1300e6),
}[speedgrade]
self.clko_freq_range = {
"-C6" : (0e6, 550e6),
"-C7" : (0e6, 550e6),
"-I7" : (0e6, 550e6),
"-C8" : (0e6, 460e6),
"-A7" : (0e6, 460e6),
}[speedgrade]
def __init__(self, speedgrade="-6"):
self.logger = logging.getLogger("Max10PLL")
self.logger.info("Creating Max10PLL, {}.".format(colorer("speedgrade {}".format(speedgrade))))
IntelClocking.__init__(self)
self.clko_freq_range = {
"-6" : (0e6, 472.5e6),
"-7" : (0e6, 450e6),
"-8" : (0e6, 402.5e6),
}[speedgrade]
def __init__(self, speedgrade=-1):
self.logger = logging.getLogger("S7PLL")
self.logger.info("Creating S7PLL, {}.".format(colorer("speedgrade {}".format(speedgrade))))
XilinxClocking.__init__(self)
self.divclk_divide_range = (1, 56+1)
self.vco_freq_range = {
-1: (800e6, 1600e6),
-2: (800e6, 1866e6),
-3: (800e6, 2133e6),
}[speedgrade]
def __init__(self, speedgrade=-1):
self.logger = logging.getLogger("S6DCM")
self.logger.info("Creating S6DCM, {}.".format(colorer("speedgrade {}".format(speedgrade))))
XilinxClocking.__init__(self)
self.divclk_divide_range = (1, 2) # FIXME
self.clkin_freq_range = {
-1: (0.5e6, 200e6),
-2: (0.5e6, 333e6),
-3: (0.5e6, 375e6),
}[speedgrade]
self.vco_freq_range = {
-1: (5e6, 1e16),
-2: (5e6, 1e16),
-3: (5e6, 1e16),
}[speedgrade]
def __init__(self, speedgrade="-C6"):
self.logger = logging.getLogger("Cyclone10LPPLL")
self.logger.info("Creating Cyclone10LPPLL, {}.".format(colorer("speedgrade {}".format(speedgrade))))
IntelClocking.__init__(self)
self.clkin_freq_range = {
"-C6" : (5e6, 472.5e6),
"-C8" : (5e6, 472.5e6),
"-I7" : (5e6, 472.5e6),
"-A7" : (5e6, 472.5e6),
"-I8" : (5e6, 362e6),
}[speedgrade]
self.clko_freq_range = {
"-C6" : (0e6, 472.5e6),
"-C8" : (0e6, 402.5e6),
"-I7" : (0e6, 450e6),
"-A7" : (0e6, 450e6),
"-I8" : (0e6, 362e6),
}[speedgrade]
