self._base.write(base) self._length.write(length) self._start.write(1) print("Waiting...") while self._done.read() != 1: pass print("Done...") def upload(self, base, length): print("Upload of {} bytes to @0x{:08x}...".format(length, base)) datas = [] for i in range(length//4): datas.append(wb.read(base + 4*i)) return datas wb.write(wb.mems.main_ram.base, 0x11223344) test = wb.read(wb.mems.main_ram.base) print("----------" + str(test)) rx_recorder = DMARecorder("rx_dma_recorder") rx_recorder.capture(0x0000, 128) datas = rx_recorder.upload(wb.mems.main_ram.base, 128) for data in datas: print("{:08x}".format(data)) #tx_recorder = DMARecorder("tx_dma_recorder") #tx_recorder.capture(0x0000, 4 * 128) #datas = tx_recorder.upload(wb.mems.main_ram.base, 32) #for data in datas: # print("{:08x}".format(data))
# This file is Copyright (c) 2015-2018 Florent Kermarrec <*****@*****.**> # License: BSD from litex import RemoteClient wb = RemoteClient() wb.open() # # # identifier = "" for i in range(30): identifier += chr(wb.read(wb.bases.identifier_mem + 4 * (i + 1))) # TODO: why + 1? print(identifier) print("frequency : {}MHz".format(wb.constants.system_clock_frequency / 1000000)) SRAM_BASE = 0x02000000 wb.write(SRAM_BASE, [i for i in range(64)]) print(wb.read(SRAM_BASE, 64)) # # # wb.close()
#!/usr/bin/env python3 from litex import RemoteClient import time wb = RemoteClient() wb.open() # -------------------------------------------------------------------- wb.regs.writer_start.write(0) wb.regs.writer_reset.write(1) time.sleep(10000 / 1e6) wb.regs.writer_reset.write(0) wb.write(0x20000000, 0xffffffff) # patttern wb.write(0x21000000, 0xffffffff) # patttern wb.write(0x22000000, 0xffffffff) # patttern wb.write(0x23000000, 0xffffffff) # patttern wb.write(0x24000000, 0x00000000) # offset mem_range = 256 * 1024 * 1024 # bytes mem_mask = (mem_range // 4 // 4) - 1 mem_count = mem_mask wb.regs.writer_mem_mask.write(mem_mask) # memory range wb.regs.writer_data_mask.write(0x00000000) # just pattern from address 0x0 wb.regs.writer_count.write(mem_count) wb.regs.writer_start.write(1) while True: