def __init__(self, sys_clk_freq=int(27e6), with_led_chaser=True, **kwargs):
platform = tang_nano_4k.Platform()
# Disable CPU/UART for now.
kwargs["cpu_type"] = None
kwargs["with_uart"] = False
# SoCCore ----------------------------------------------------------------------------------
SoCCore.__init__(self,
platform,
sys_clk_freq,
ident="LiteX SoC on Tang Nano 4K",
ident_version=True,
**kwargs)
# CRG --------------------------------------------------------------------------------------
self.submodules.crg = _CRG(platform, sys_clk_freq)
# Leds -------------------------------------------------------------------------------------
if with_led_chaser:
self.submodules.leds = LedChaser(
pads=platform.request_all("user_led"),
sys_clk_freq=sys_clk_freq)
def __init__(self,
sys_clk_freq=int(27e6),
with_hyperram=False,
with_led_chaser=True,
with_video_terminal=True,
**kwargs):
platform = tang_nano_4k.Platform()
# Put BIOS in SPIFlash to save BlockRAMs.
kwargs["integrated_rom_size"] = 0
kwargs["cpu_reset_address"] = self.mem_map["spiflash"] + 0
# SoCCore ----------------------------------------------------------------------------------
SoCCore.__init__(self,
platform,
sys_clk_freq,
ident="LiteX SoC on Tang Nano 4K",
ident_version=True,
**kwargs)
# CRG --------------------------------------------------------------------------------------
self.submodules.crg = _CRG(platform,
sys_clk_freq,
with_video_pll=with_video_terminal)
# SPI Flash --------------------------------------------------------------------------------
from litespi.modules import W25Q32
from litespi.opcodes import SpiNorFlashOpCodes as Codes
self.add_spi_flash(mode="1x",
module=W25Q32(Codes.READ_1_1_1),
with_master=False)
# Add ROM linker region --------------------------------------------------------------------
self.bus.add_region(
"rom",
SoCRegion(origin=self.mem_map["spiflash"] + 0,
size=64 * kB,
linker=True))
# HyperRAM ---------------------------------------------------------------------------------
if with_hyperram:
class HyperRAMPads:
def __init__(self):
self.clk = Signal()
self.rst_n = platform.request("O_hpram_reset_n")
self.dq = platform.request("IO_hpram_dq")
self.cs_n = platform.request("O_hpram_cs_n")
self.rwds = platform.request("IO_hpram_rwds")
hyperram_pads = HyperRAMPads()
self.comb += platform.request("O_hpram_ck").eq(hyperram_pads.clk)
self.comb += platform.request("O_hpram_ck_n").eq(
~hyperram_pads.clk)
self.submodules.hyperram = HyperRAM(hyperram_pads)
self.bus.add_slave("main_ram",
slave=self.hyperram.bus,
region=SoCRegion(origin=0x40000000,
size=8 * 1024 * 1024))
# Video ------------------------------------------------------------------------------------
if with_video_terminal:
self.submodules.videophy = VideoHDMIPHY(platform.request("hdmi"),
clock_domain="hdmi")
self.add_video_colorbars(phy=self.videophy,
timings="640x480@75Hz",
clock_domain="hdmi")
#self.add_video_terminal(phy=self.videophy, timings="640x480@75Hz", clock_domain="hdmi") # FIXME: Free up BRAMs.
# Leds -------------------------------------------------------------------------------------
if with_led_chaser:
self.submodules.leds = LedChaser(
pads=platform.request_all("user_led"),
sys_clk_freq=sys_clk_freq)
def __init__(self,
sys_clk_freq=int(27e6),
with_hyperram=False,
with_led_chaser=True,
with_video_terminal=True,
**kwargs):
platform = tang_nano_4k.Platform()
if "cpu_type" in kwargs and kwargs["cpu_type"] == "gowin_emcu":
kwargs["with_uart"] = False # CPU has own UART
kwargs[
"integrated_sram_size"] = 0 # SRAM is directly attached to CPU
kwargs[
"integrated_rom_size"] = 0 # boot flash directly attached to CPU
else:
# Disable Integrated ROM
kwargs["integrated_rom_size"] = 0
# SoCCore ----------------------------------------------------------------------------------
SoCCore.__init__(self,
platform,
sys_clk_freq,
ident="LiteX SoC on Tang Nano 4K",
**kwargs)
if self.cpu_type == 'vexriscv':
assert self.cpu_variant == 'minimal', 'use --cpu-variant=minimal to fit into number of BSRAMs'
# CRG --------------------------------------------------------------------------------------
self.submodules.crg = _CRG(platform,
sys_clk_freq,
with_video_pll=with_video_terminal)
if self.cpu_type == "gowin_emcu":
self.cpu.connect_uart(platform.request("serial"))
self.bus.add_region(
"sram", SoCRegion(origin=self.cpu.mem_map["sram"],
size=16 * kB))
self.bus.add_region(
"rom",
SoCRegion(origin=self.cpu.mem_map["rom"],
size=32 * kB,
linker=True))
else:
# SPI Flash --------------------------------------------------------------------------------
from litespi.modules import W25Q32
from litespi.opcodes import SpiNorFlashOpCodes as Codes
self.add_spi_flash(mode="1x",
module=W25Q32(Codes.READ_1_1_1),
with_master=False)
# Add ROM linker region --------------------------------------------------------------------
self.bus.add_region(
"rom",
SoCRegion(origin=self.bus.regions["spiflash"].origin,
size=32 * kB,
linker=True))
self.cpu.set_reset_address(self.bus.regions["rom"].origin)
# HyperRAM ---------------------------------------------------------------------------------
if with_hyperram:
class HyperRAMPads:
def __init__(self):
self.clk = Signal()
self.rst_n = platform.request("O_hpram_reset_n")
self.dq = platform.request("IO_hpram_dq")
self.cs_n = platform.request("O_hpram_cs_n")
self.rwds = platform.request("IO_hpram_rwds")
hyperram_pads = HyperRAMPads()
self.comb += platform.request("O_hpram_ck").eq(hyperram_pads.clk)
self.comb += platform.request("O_hpram_ck_n").eq(
~hyperram_pads.clk)
self.submodules.hyperram = HyperRAM(hyperram_pads)
self.bus.add_slave("main_ram",
slave=self.hyperram.bus,
region=SoCRegion(origin=0x40000000,
size=8 * mB))
# Video ------------------------------------------------------------------------------------
if with_video_terminal:
self.submodules.videophy = VideoHDMIPHY(platform.request("hdmi"),
clock_domain="hdmi")
self.add_video_colorbars(phy=self.videophy,
timings="640x480@75Hz",
clock_domain="hdmi")
#self.add_video_terminal(phy=self.videophy, timings="640x480@75Hz", clock_domain="hdmi") # FIXME: Free up BRAMs.
# Leds -------------------------------------------------------------------------------------
if with_led_chaser:
self.submodules.leds = LedChaser(
pads=platform.request_all("user_led"),
sys_clk_freq=sys_clk_freq)