def create_xml(frequency): from m5 import options import os global stat_strings stat_strings = [] _m5.stats.processDumpQueue() sim_root = Root.getInstance() if sim_root: sim_root.preDumpStats() #predumping does nothing unless overriden prepare( ) #prepare for scalar stats does nothing: statistic.h - class statstor.prepare() for output in outputList: if output.valid(): stat_strings.append(output.begin()) _dump_to_visitor(output, None) stat_strings.append(output.end()) m5_stats_file = os.path.join(options.outdir, options.stats_file) m5_config_file = os.path.join(options.outdir, options.dump_config) mcpat_output_path = os.path.join(options.mcpat_out, options.mcpat_testname) if not os.path.isdir(mcpat_output_path): os.mkdir(mcpat_output_path) #TODO jimmy change these stats from hardcoded to params fr = [4E9 / 1E6] i_f = os.path.join(mcpat_output_path, "serial_mp.xml") generate_xml(m5_stats_file, m5_config_file, i_f, stat_strings, \ True, voltage=1.4, frequency=fr, temperature=380.0, \ device_type=options.mcpat_device_type)
def _dump_to_visitor(visitor, root=None): global stat_strings # Legacy stats if root is None: for stat in stats_list: stat_strings.append(stat.visit(visitor)) # New stats def dump_group(group): global stat_strings for stat in group.getStats(): stat_strings.append(stat.visit(visitor)) for n, g in group.getStatGroups().items(): visitor.beginGroup(n) #visitor is type output dump_group(g) visitor.endGroup() if root is not None: for p in root.path_list(): visitor.beginGroup(p) dump_group(root if root is not None else Root.getInstance()) if root is not None: for p in reversed(root.path_list()): visitor.endGroup()
def _dump_to_visitor(visitor, roots=None): # New stats def dump_group(group): for stat in group.getStats(): stat.visit(visitor) for n, g in group.getStatGroups().items(): visitor.beginGroup(n) dump_group(g) visitor.endGroup() if roots: # New stats from selected subroots. for root in roots: for p in root.path_list(): visitor.beginGroup(p) dump_group(root) for p in reversed(root.path_list()): visitor.endGroup() else: # Legacy stats for stat in stats_list: stat.visit(visitor) # New stats starting from root. dump_group(Root.getInstance())
def dump(stats_desc="", root=None): '''Dump all statistics data to the registered outputs''' now = m5.curTick() global lastDump assert lastDump <= now new_dump = lastDump != now lastDump = now # Don't allow multiple global stat dumps in the same tick. It's # still possible to dump a multiple sub-trees. if not new_dump and root is None: return # Only prepare stats the first time we dump them in the same tick. if new_dump: _m5.stats.processDumpQueue() # Notify new-style stats group that we are about to dump stats. sim_root = Root.getInstance() if sim_root: sim_root.preDumpStats() prepare() for output in outputList: if output.valid(): output.begin(stats_desc) _dump_to_visitor(output, root=root) output.end()
def dump(roots=None): '''Dump all statistics data to the registered outputs''' all_roots = [] if roots is not None: all_roots.extend(roots) global global_dump_roots all_roots.extend(global_dump_roots) now = m5.curTick() global lastDump assert lastDump <= now new_dump = lastDump != now lastDump = now # Don't allow multiple global stat dumps in the same tick. It's # still possible to dump a multiple sub-trees. if not new_dump and not all_roots: return # Only prepare stats the first time we dump them in the same tick. if new_dump: _m5.stats.processDumpQueue() # Notify new-style stats group that we are about to dump stats. sim_root = Root.getInstance() if sim_root: sim_root.preDumpStats() prepare() for output in outputList: if isinstance(output, JsonOutputVistor): if not all_roots: output.dump(Root.getInstance()) else: output.dump(all_roots) else: if output.valid(): output.begin() _dump_to_visitor(output, roots=all_roots) output.end()
def reset(): '''Reset all statistics to the base state''' # call reset stats on all SimObjects root = Root.getInstance() if root: for obj in root.descendants(): obj.resetStats() # call any other registered stats reset callbacks for stat in stats_list: stat.reset() internal.stats.processResetQueue()
def reset(): '''Reset all statistics to the base state''' # call reset stats on all SimObjects root = Root.getInstance() if root: root.resetStats() # call any other registered legacy stats reset callbacks for stat in stats_list: stat.reset() _m5.stats.processResetQueue()
def _instantiate(self) -> None: """ This method will instantiate the board and carry out necessary boilerplate code before the instantiation such as setting up root and setting the sim_quantum (if running in KVM mode). """ if not self._instantiated: root = Root(full_system=self._full_system, board=self._board) # We take a copy of the Root in case it's required elsewhere # (for example, in `get_stats()`). self._root = root if CPUTypes.KVM in [ core.get_type() for core in self._board.get_processor().get_cores() ]: m5.ticks.fixGlobalFrequency() root.sim_quantum = m5.ticks.fromSeconds(0.001) m5.instantiate() self._instantiated = True
def dump(root=None, exit=False): '''Dump all statistics data to the registered outputs''' from m5 import options now = m5.curTick() global lastDump global numDump assert lastDump <= now global stat_strings stat_strings = [] new_dump = lastDump != now lastDump = now # Don't allow multiple global stat dumps in the same tick. It's # still possible to dump a multiple sub-trees. if not new_dump and root is None: return numDump += 1 if new_dump: _m5.stats.processDumpQueue() sim_root = Root.getInstance() if sim_root: sim_root.preDumpStats() prepare() for output in outputList: if output.valid(): output.begin() _dump_to_visitor(output, root=root) output.end() # max_instr = options.power_profile_instrs max_dump = options.power_profile_duration print("Num Dumps: ", numDump) if (numDump == max_dump or exit): print("Ending after " + str(numDump) + " datapoints") sys.exit()
def _dump_to_visitor(visitor, root=None): # Legacy stats if root is None: for stat in stats_list: stat.visit(visitor) # New stats def dump_group(group): for stat in group.getStats(): stat.visit(visitor) for n, g in group.getStatGroups().items(): visitor.beginGroup(n) dump_group(g) visitor.endGroup() if root is not None: for p in root.path_list(): visitor.beginGroup(p) dump_group(root if root is not None else Root.getInstance()) if root is not None: for p in reversed(root.path_list()): visitor.endGroup()
parser = argparse.ArgumentParser() parser.add_argument('cpu', choices=valid_cpus.keys()) parser.add_argument('memory_model', choices=valid_memories.keys()) parser.add_argument('binary', type=str, help="Path to binary to run") #parser.add_argument('binary_input', type = str, help = "Inputs to the binary") args = parser.parse_args() class MySystem(BaseTestSystem): _CPUModel = valid_cpus[args.cpu] _MemoryModel = valid_memories[args.memory_model] system = MySystem() system.setTestBinary(args.binary) root = Root(full_system=False, system=system) m5.instantiate() exit_event = m5.simulate() if exit_event.getCause() != 'exiting with last active thread context': print("Benchmark failed with bad exit cause.") print(exit_event.getCause()) exit(1) if exit_event.getCode() != 0: print("Benchmark failed with bad exit code.") print("Exit code {}".format(exit_event.getCode())) exit(1) print("{} ms".format(m5.curTick()))
# Authors: Gabe Black from __future__ import print_function import argparse import m5 import os import re import sys from m5.objects import SystemC_Kernel, Root # pylint:disable=unused-variable kernel = SystemC_Kernel() root = Root(full_system=True, systemc_kernel=kernel) parser = argparse.ArgumentParser() parser.add_argument('--working-dir') args = parser.parse_args() if args.working_dir: os.chdir(args.working_dir) kernel.sc_main() m5.instantiate(None) cause = m5.simulate(m5.MaxTick).getCause() result = kernel.sc_main_result()
def _visit_groups(visitor, root=None): if root is None: root = Root.getInstance() for group in root.getStatGroups().values(): visitor(group) _visit_groups(visitor, root=group)
# `~/.cache/gem5` directory if not already present. # SPEC CPU2006 benchamarks were tested with kernel version 4.19.83 and # 5.4.49 kernel=Resource("x86-linux-kernel-4.19.83", ), # The location of the x86 SPEC CPU 2017 image disk_image=CustomDiskImageResource( args.image, disk_root_partition=args.partition, ), readfile_contents=command, ) # We need this for long running processes. m5.disableAllListeners() root = Root(full_system=True, system=board) # sim_quantum must be set when KVM cores are used. root.sim_quantum = int(1e9) m5.instantiate() # We maintain the wall clock time. globalStart = time.time() print("Running the simulation") print("Using KVM cpu") start_tick = m5.curTick()
processor = SimpleProcessor(cpu_type=CPUTypes.ATOMIC, num_cores=1) motherboard = SimpleBoard( clk_freq="3GHz", processor=processor, memory=memory, cache_hierarchy=cache_hierarchy, ) motherboard.connect_things() # Set the workload thispath = os.path.dirname(os.path.realpath(__file__)) binary = os.path.join(thispath, "../../../tests/test-progs/hello/bin/x86/linux/hello") motherboard.set_workload(binary) # Run the simulation. print("Running with ISA: {}.".format(get_runtime_isa().name)) print("Running with protocol: {}.".format( get_runtime_coherence_protocol().name)) print() root = Root(full_system=False, system=motherboard) m5.instantiate() exit_event = m5.simulate() print("Exiting @ tick {} because {}.".format(m5.curTick(), exit_event.getCause()))
def isRoot(obj): from m5.objects import Root return obj and obj is Root.getInstance()
def dump_verilog(root=None, exit=False): print("******************DUMP_VERILOG******************") '''Dump all statistics data to the registered outputs''' from m5 import options now = m5.curTick() global lastDump global numDump global init_ncsim global lastVoltage global lastCurrent global runtime_begin_profile global committedInstrs global profiling global lv assert lastDump <= now global stat_strings stat_strings = [] new_dump = lastDump != now lastDump = now # Don't allow multiple global stat dumps in the same tick. It's # still possible to dump a multiple sub-trees. # if not new_dump and root is None: # return 0 if (options.mcpat_enable): if ((options.power_profile_start != -1 and now >= options.power_profile_start) or runtime_begin_profile): mcpat.set_flags(options.mcpat_use_fg_pg, \ options.mcpat_scale_factor) # profiling = True # numDump += 1 new_dump = True if new_dump: _m5.stats.processDumpQueue() sim_root = Root.getInstance() if sim_root: sim_root.preDumpStats() #predumping does nothing unless overriden prepare( ) #prepare for scalar stats does nothing: statistic.h - class statstor.prepare() for output in outputList: if output.valid(): stat_strings.append(output.begin()) _dump_to_visitor(output, root=root) stat_strings.append(output.end()) #print("".join(stat_strings)) #sys.exit(1) # Initialilze the Verilog Sim: power = 0 resistance = 0 voltage = 0 current = 0 mp_v = vpi_shm.mp_get_voltage_set() mp_f = [] for i in range(vpi_shm.mp_get_ncores()): mp_f.append(vpi_shm.mp_get_freq(i)) if (options.ncverilog_enable): if init_ncsim: # Run an Initial McPAT stats run with 1.0v mcpat.m5_to_mcpat(stat_strings,\ options.stats_read_from_file, mp_v, mp_f, \ 380.0, options.mcpat_device_type) resistance = mcpat.get_last_r(mp_v, \ options.mcpat_use_fg_pg, \ options.mcpat_scale_factor) current = mcpat.get_last_i(mp_v, \ options.mcpat_use_fg_pg, \ options.mcpat_scale_factor) power = mcpat.get_last_p(mp_v, \ options.mcpat_use_fg_pg, \ options.mcpat_scale_factor) # Run Init and warmup PowerSupply vpi_shm.initialize(options.mcpat_testname) for i in range(int(options.ncverilog_warmup)): vpi_shm.set_driver_signals(current, 0) lv = vpi_shm.get_voltage() lastVoltage = lv lastCurrent = vpi_shm.get_current() vpi_shm.ack_supply() init_ncsim = False else: if options.ncverilog_feedback: mcpat.m5_to_mcpat(stat_strings,\ options.stats_read_from_file, lv, mp_f, \ 380.0, options.mcpat_device_type) resistance = mcpat.get_last_r(lv, \ options.mcpat_use_fg_pg, \ options.mcpat_scale_factor) current = mcpat.get_last_i(lv, \ options.mcpat_use_fg_pg, \ options.mcpat_scale_factor) power = mcpat.get_last_p(lv, \ options.mcpat_use_fg_pg, \ options.mcpat_scale_factor) else: mcpat.m5_to_mcpat(stat_strings,\ options.stats_read_from_file, mp_v, mp_f, \ 380.0, options.mcpat_device_type) resistance = mcpat.get_last_r(mp_v, \ options.mcpat_use_fg_pg, \ options.mcpat_scale_factor) current = mcpat.get_last_i(mp_v, \ options.mcpat_use_fg_pg, \ options.mcpat_scale_factor) power = mcpat.get_last_p(mp_v, \ options.mcpat_use_fg_pg, \ options.mcpat_scale_factor) vpi_shm.set_driver_signals(current, 0) lv = vpi_shm.get_voltage() lastVoltage = lv lastCurrent = vpi_shm.get_current() vpi_shm.ack_supply() else: mcpat.m5_to_mcpat(stat_strings,\ options.stats_read_from_file, 1.4, [4000], \ 380.0, options.mcpat_device_type) # max_dump = options.power_profile_duration # max_instr = options.power_profile_instrs # if(numDump == max_dump or exit or committedInstrs >= max_instr): # mcpat.dump() # runtime_begin_profile = False # print("Ending after "+str(numDump)+ # " stat dumps") # # Clean up simulation: # if(options.ncverilog_enable): # current = mcpat.get_last_i(mp_v) # vpi_shm.set_driver_signals(current, 1) # lastVoltage=vpi_shm.get_voltage() # lastCurrent=vpi_shm.get_current() # vpi_shm.ack_supply() # sys.exit() else: if new_dump: _m5.stats.processDumpQueue() sim_root = Root.getInstance() if sim_root: sim_root.preDumpStats() prepare() for output in outputList: if output.valid(): output.begin() _dump_to_visitor(output, root=root) output.end() power_ret = mcpat.get_last_p(voltage=1.4, power_gating=True, scale_factor=1.0) if power_ret is None: return 0 return power_ret
# Setup a single core Processor. processor = SimpleProcessor(cpu_type=cpu, num_cores=1) # Setup the board. board = RiscvBoard(clk_freq="1GHz", processor=processor, memory=memory, cache_hierarchy=cache_hierarchy, use_disk_image=False) board.connect_things() # Set the Full System workload. board.set_workload(disk_image=None, bootloader=bbl, kernel_boot_params="console=ttyS0") root = Root(full_system=True, system=board) m5.instantiate() print("Beginning simulation!") # Note: You can access the terminal upon boot using # m5term (`./util/term`): `./m5term localhost <port>`. Note the `<port>` # value is obtained from the gem5 terminal stdout. Look out for # "system.platform.terminal: Listening for connections on port <port>". exit_event = m5.simulate() print("Exiting @ tick {} because {}.".format(m5.curTick(), exit_event.getCause()))
boot_img_url = ( "http://dist.gem5.org/dist/v21-0/images/x86/ubuntu-18-04/boot-exit.img.gz") boot_img_path_gz = os.path.join(thispath, "boot-exit.img.gz") boot_img_path = os.path.join(thispath, "boot-exit.img") if not os.path.exists(boot_img_path): subprocess.run(["wget", "-P", thispath, boot_img_url]) with gzip.open(boot_img_path_gz, "rb") as f: with open(boot_img_path, "wb") as o: shutil.copyfileobj(f, o) # Set the Full System workload. motherboard.set_workload(kernel=kernel_path, disk_image=boot_img_path, command="m5 exit \n") # Begin running of the simulation. This will exit once the Linux system boot # is complete. print("Running with ISA: " + get_runtime_isa().name) print("Running with protocol: " + get_runtime_coherence_protocol().name) print() root = Root(full_system=True, system=motherboard) m5.instantiate() print("Beginning simulation!") exit_event = m5.simulate() print("Exiting @ tick {} because {}.".format(m5.curTick(), exit_event.getCause()))