def __getattr__(self, name):
if name == "comb":
return _ModuleComb(self)
elif name == "sync":
return _ModuleSync(self)
elif name == "specials":
return _ModuleSpecials(self)
elif name == "submodules":
return _ModuleSubmodules(self)
elif name == "clock_domains":
return _ModuleClockDomains(self)
# hack to have initialized regular attributes without using __init__
# (which would require derived classes to call it)
elif name == "finalized":
self.finalized = False
return self.finalized
elif name == "_fragment":
self._fragment = _Fragment()
return self._fragment
elif name == "_submodules":
self._submodules = []
return self._submodules
elif name == "_clock_domains":
self._clock_domains = []
return self._clock_domains
elif name == "get_fragment_called":
self.get_fragment_called = False
return self.get_fragment_called
else:
raise AttributeError("'" + self.__class__.__name__ +
"' object has no attribute '" + name + "'")
def __getattr__(self, name):
if name == "comb":
return _ModuleComb(self)
elif name == "sync":
return _ModuleSync(self)
elif name == "specials":
return _ModuleSpecials(self)
elif name == "submodules":
return _ModuleSubmodules(self)
elif name == "clock_domains":
return _ModuleClockDomains(self)
# hack to have initialized regular attributes without using __init__
# (which would require derived classes to call it)
elif name == "finalized":
self.finalized = False
return self.finalized
elif name == "_fragment":
self._fragment = _Fragment()
return self._fragment
elif name == "_submodules":
self._submodules = []
return self._submodules
elif name == "_clock_domains":
self._clock_domains = []
return self._clock_domains
elif name == "get_fragment_called":
self.get_fragment_called = False
return self.get_fragment_called
else:
raise AttributeError("'"+self.__class__.__name__+"' object has no attribute '"+name+"'")
def __init__(self, fragment, top_level=None, sim_runner=None, sockaddr="simsocket", **vopts): if not isinstance(fragment, _Fragment): fragment = fragment.get_fragment() if top_level is None: top_level = TopLevel() if sim_runner is None: sim_runner = icarus.Runner() self.top_level = top_level self.ipc = Initiator(sockaddr) self.sim_runner = sim_runner c_top = self.top_level.get(sockaddr) fragment = fragment + _Fragment(clock_domains=top_level.clock_domains) c_fragment, self.namespace = verilog.convert(fragment, ios=self.top_level.ios, name=self.top_level.dut_type, return_ns=True, **vopts) self.cycle_counter = -1 self.sim_runner = sim_runner self.sim_runner.start(c_top, c_fragment) self.ipc.accept() reply = self.ipc.recv() assert(isinstance(reply, MessageTick)) self.sim_functions = fragment.sim self.active_sim_functions = set(f for f in fragment.sim if not hasattr(f, "passive") or not f.passive)
def __init__(self, fragment, top_level=None, sim_runner=None, sockaddr="simsocket", **vopts): if not isinstance(fragment, _Fragment): fragment = fragment.get_fragment() if top_level is None: top_level = TopLevel() if sim_runner is None: sim_runner = icarus.Runner() self.top_level = top_level self.ipc = Initiator(sockaddr) self.sim_runner = sim_runner c_top = self.top_level.get(sockaddr) fragment = fragment + _Fragment(clock_domains=top_level.clock_domains) c_fragment, self.namespace = verilog.convert(fragment, ios=self.top_level.ios, name=self.top_level.dut_type, return_ns=True, **vopts) self.cycle_counter = -1 self.sim_runner = sim_runner self.sim_runner.start(c_top, c_fragment) self.ipc.accept() reply = self.ipc.recv() assert(isinstance(reply, MessageTick)) self.sim_functions = fragment.sim self.active_sim_functions = set(f for f in fragment.sim if not hasattr(f, "passive") or not f.passive)
def _lower_specials_step(overrides, specials):
f = _Fragment()
lowered_specials = set()
for special in sorted(specials, key=lambda x: x.huid):
impl = _call_special_classmethod(overrides, special, "lower")
if impl is not None:
f += impl.get_fragment()
lowered_specials.add(special)
return f, lowered_specials
def _lower_specials_step(overrides, specials):
f = _Fragment()
lowered_specials = set()
for special in sorted(specials, key=lambda x: x.huid):
impl = _call_special_classmethod(overrides, special, "lower")
if impl is not None:
f += impl.get_fragment()
lowered_specials.add(special)
return f, lowered_specials
def convert(fi,
ios=None,
name="top",
special_overrides=dict(),
attr_translate=DummyAttrTranslate(),
create_clock_domains=True,
display_run=False):
r = ConvOutput()
f = _Fragment()
if not isinstance(fi, _Fragment):
fi = fi.get_fragment()
f += fi
if ios is None:
ios = set()
for cd_name in sorted(list_clock_domains(f)):
try:
f.clock_domains[cd_name]
except KeyError:
if create_clock_domains:
cd = ClockDomain(cd_name)
f.clock_domains.append(cd)
ios |= {cd.clk, cd.rst}
else:
msg = "Available clock domains:\n"
for name in sorted(list_clock_domains(f)):
msg += "- " + name + "\n"
logging.error(msg)
raise KeyError("Unresolved clock domain: \"" + cd_name + "\"")
f = lower_complex_slices(f)
insert_resets(f)
f = lower_basics(f)
f, lowered_specials = lower_specials(special_overrides, f)
f = lower_basics(f)
for io in sorted(ios, key=lambda x: x.duid):
if io.name_override is None:
io_name = io.backtrace[-1][0]
if io_name:
io.name_override = io_name
ns = build_namespace(list_signals(f) \
| list_special_ios(f, True, True, True) \
| ios, _reserved_keywords)
ns.clock_domains = f.clock_domains
r.ns = ns
src = "/* Machine-generated using Migen */\n"
src += _printheader(f, ios, name, ns, attr_translate)
src += _printcomb(f, ns, display_run=display_run)
src += _printsync(f, ns)
src += _printspecials(special_overrides, f.specials - lowered_specials, ns,
r.add_data_file, attr_translate)
src += "endmodule\n"
r.set_main_source(src)
return r
def convert(fi, ios=None, name="top",
special_overrides=dict(),
attr_translate=DummyAttrTranslate(),
create_clock_domains=True,
display_run=False):
r = ConvOutput()
f = _Fragment()
if not isinstance(fi, _Fragment):
fi = fi.get_fragment()
f += fi
if ios is None:
ios = set()
for cd_name in sorted(list_clock_domains(f)):
try:
f.clock_domains[cd_name]
except KeyError:
if create_clock_domains:
cd = ClockDomain(cd_name)
f.clock_domains.append(cd)
ios |= {cd.clk, cd.rst}
else:
msg = "Available clock domains:\n{}".format(
"\n".join("- {}".format(name)
for name in sorted(list_clock_domains(f))))
logging.error(msg)
raise KeyError("Unresolved clock domain: '{}'".format(cd_name))
f = lower_complex_slices(f)
insert_resets(f)
f = lower_basics(f)
fs, lowered_specials = lower_specials(special_overrides, f.specials)
f += lower_basics(fs)
for io in sorted(ios, key=hash):
if io.name_override is None:
io_name = io.backtrace[-1][0]
if io_name:
io.name_override = io_name
ns = build_namespace(
list_signals(f) | list_special_ios(f, True, True, True) | ios,
_reserved_keywords)
ns.clock_domains = f.clock_domains
r.ns = ns
src = "/* Machine-generated using Migen */\n"
src += _printheader(f, ios, name, ns, attr_translate)
src += _printcomb(f, ns, display_run=display_run)
src += _printsync(f, ns)
src += _printspecials(special_overrides, f.specials - lowered_specials,
ns, r.add_data_file, attr_translate)
src += "endmodule\n"
r.set_main_source(src)
return r
def __getattr__(self, name):
if name == "comb":
return _ModuleComb(self)
elif name == "sync":
return _ModuleSync(self)
elif name == "specials":
return _ModuleSpecials(self)
elif name == "submodules":
return _ModuleSubmodules(self)
elif name == "clock_domains":
return _ModuleClockDomains(self)
# hack to have initialized regular attributes without using __init__
# (which would require derived classes to call it)
elif name == "finalized":
self.finalized = False
return self.finalized
elif name == "_fragment":
simf = None
try:
simf = self.do_simulation
except AttributeError:
try:
simg = self.gen_simulation
except AttributeError:
pass
else:
simf = gen_sim(simg)
if simf is not None:
simf = proxy_sim(self, simf)
sim = [] if simf is None else [simf]
self._fragment = _Fragment(sim=sim)
return self._fragment
elif name == "_submodules":
self._submodules = []
return self._submodules
elif name == "_clock_domains":
self._clock_domains = []
return self._clock_domains
elif name == "_get_fragment_called":
self._get_fragment_called = False
return self._get_fragment_called
else:
raise AttributeError("'" + self.__class__.__name__ +
"' object has no attribute '" + name + "'")
def __getattr__(self, name):
if name == "comb":
return _ModuleComb(self)
elif name == "sync":
return _ModuleSync(self)
elif name == "specials":
return _ModuleSpecials(self)
elif name == "submodules":
return _ModuleSubmodules(self)
elif name == "clock_domains":
return _ModuleClockDomains(self)
# hack to have initialized regular attributes without using __init__
# (which would require derived classes to call it)
elif name == "finalized":
self.finalized = False
return self.finalized
elif name == "_fragment":
simf = None
try:
simf = self.do_simulation
except AttributeError:
try:
simg = self.gen_simulation
except AttributeError:
pass
else:
simf = gen_sim(simg)
if simf is not None:
simf = proxy_sim(self, simf)
sim = [] if simf is None else [simf]
self._fragment = _Fragment(sim=sim)
return self._fragment
elif name == "_submodules":
self._submodules = []
return self._submodules
elif name == "_clock_domains":
self._clock_domains = []
return self._clock_domains
elif name == "_get_fragment_called":
self._get_fragment_called = False
return self._get_fragment_called
else:
raise AttributeError("'"+self.__class__.__name__+"' object has no attribute '"+name+"'")
((Constant(1), _printexpr_ctx([
None, NameSpace(), None, None, None, _THint.logic, 32])),
"(0 => '1', others => '0')")])
def test_printexpr_should_handle_constant(args, expected):
assert _printexpr(*args) == expected
foo = Signal(32)
bar = Signal((32, True))
bar_ = Signal(32)
@pytest.mark.parametrize(
"args, expected", [
((foo, _printexpr_ctx([
_Fragment(), NameSpace(), None, None, None, None, None])), "foo"),
((foo, _printexpr_ctx([
_Fragment(), NameSpace(), None, None, None, _THint.logic, None])),
"foo"),
((foo, _printexpr_ctx([
_Fragment(), NameSpace(), None, None, None, _THint.un_signed,
None])), "unsigned(foo)"),
((bar, _printexpr_ctx([
_Fragment(), NameSpace(), None, None, None, _THint.un_signed,
None])), "signed(bar)"),
((bar, _printexpr_ctx([
_Fragment(), NameSpace(), None, None, None, _THint.integer, None])),
"to_integer(signed(bar))")
])
def test_printexpr_should_handle_signal(args, expected):
assert _printexpr(*args) == expected
