def _ag_addCluster(self, clusterId, peName, peAmount, pes, scope=None):
if self._ag_hasChips(scope):
raise ValueError("mpsym: mixing cannot mix chips/clusters")
ag = self._ag(scope)
if "clusters" not in ag:
ag["clusters"] = {
"processors": {},
"groups": {},
"graph": mpsym.ArchGraph(),
}
pes = [p.name for p, _ in pes]
# graph
peMax = ag["clusters"]["graph"].add_processors(peAmount, peName)
# cluster
ag["clusters"]["groups"][clusterId] = set(pes)
# processors
peOffs = peMax - peAmount + 1
for i, pe in enumerate(pes, start=peOffs):
ag["clusters"]["processors"][pe] = i
def test_symmetric_graphs(self):
ag = mp.ArchGraph()
ag.add_processors(10, 'p')
ag.fully_connect('c')
self.assertEqual(ag.num_automorphisms(), factorial(10))
representatives = [((0, 1, 2, 3), (0, 1, 2, 3)),
((1, 2, 3, 0), (0, 1, 2, 3)),
((2, 3, 0, 1), (0, 1, 2, 3)),
((3, 0, 1, 2), (0, 1, 2, 3)),
((1, 1, 2, 2), (0, 0, 1, 1)),
((2, 1, 2, 1), (0, 1, 0, 1)),
((1, 2, 3, 3), (0, 1, 2, 2)),
((3, 3, 3, 3), (0, 0, 0, 0)),
((1, 1, 10, 10), (0, 0, 10, 10)),
((10, 1, 10, 1), (10, 0, 10, 0)),
((1, 2, 10, 10), (0, 1, 10, 10)),
((10, 10, 10, 10), (10, 10, 10, 10))]
for mapping, representative in representatives:
self.assertEqual(ag.representative(mapping), representative)
ag = mp.ArchGraph()
ag.add_processors(3, 'p1')
ag.add_processor('p2')
ag.add_processors(3, 'p1')
ag.add_processor('p3')
ag.add_processors(4, 'p1')
ag.fully_connect('p1', 'c')
self.assertEqual(ag.num_automorphisms(), factorial(10))
representatives = [((0, 1, 2, 3), (0, 1, 2, 3)),
((1, 2, 3, 0), (0, 1, 3, 2)),
((2, 3, 0, 1), (0, 3, 1, 2)),
((3, 0, 1, 2), (3, 0, 1, 2)),
((1, 1, 2, 2), (0, 0, 1, 1)),
((2, 1, 2, 1), (0, 1, 0, 1)),
((1, 2, 3, 3), (0, 1, 3, 3)),
((1, 1, 3, 7), (0, 0, 3, 7)),
((3, 1, 7, 1), (3, 0, 7, 0)),
((1, 2, 3, 7), (0, 1, 3, 7)),
((3, 7, 3, 7), (3, 7, 3, 7))]
for mapping, representative in representatives:
self.assertEqual(ag.representative(mapping), representative)
def make_ag(directed, processors):
assert processors % 2 == 0
ag = mp.ArchGraph(directed)
for _ in range(processors):
ag.add_processor('p')
ag.fully_connect('RAM')
return ag
def test_super_graph_architectures(self):
# trivial proto or super graph
ag1 = mp.ArchGraph(directed=False)
ag1.add_processor('p1')
ag1.add_processor('p2')
ag2 = mp.ArchGraph(directed=False)
ag2.add_processors(2, 'p1')
ag2.fully_connect('c')
ag3 = mp.ArchGraph(directed=False)
ag3.add_processors(2, 'p1')
ag3.add_processor('p2')
ag3.fully_connect('c')
self._test_super_graph(ag1, ag1, ['()'])
self._test_super_graph(ag1, ag2, ['(0,1)(2,3)'])
self._test_super_graph(ag1, ag3, ['(0,1)(3,4)'])
self._test_super_graph(ag2, ag1, ['(0,2)(1,3)'])
self._test_super_graph(ag2, ag2, ['(0,2)(1,3)', '(0,1)'])
self._test_super_graph(ag2, ag3, ['(0,3)(1,4)(2,5)', '(3,4)'])
self._test_super_graph(ag3, ag1, ['(0,2)(1,3)'])
self._test_super_graph(ag3, ag2, ['(0,2)(1,3)', '(0,1)', '(4,5)'])
self._test_super_graph(ag3, ag3, ['(0,3)(1,4)(2,5)', '(0,1)', '(6,7)'])
def make_ag_():
ag = mp.ArchGraph(directed)
if mult == 'single':
ag.add_processors(processors, 'p')
elif mult == 'double_identical':
ag.add_processors(processors, 'p')
ag.add_processors(processors, 'p')
elif mult == 'double_distinct':
ag.add_processors(processors, 'p1')
ag.add_processors(processors, 'p2')
else:
raise ValueError
return ag
def _ag_createSuperGraph(self, scope=None):
ag = self._ag(scope)
protoChipName, protoChip = ag["chips"][0]
proto = protoChip["system"]
superGraph = mpsym.ArchGraph()
superGraphProcessors = {}
for i, (chipName, chip) in enumerate(ag["chips"]):
superGraphProcessors[chipName] = superGraph.add_processor(
protoChipName
)
ag["proto"] = proto
ag["super_graph"] = superGraph
ag["super_graph_processors"] = superGraphProcessors
def make_ag(processors, directed):
assert processors % 2 == 0
ag = mp.ArchGraph(directed)
ag.add_processors(processors, 'p')
for pe in sample(range(ag.num_processors()),
ag.num_processors() // 2):
for _ in range(2):
ag.add_channel(pe, pe, 'L1')
ag.add_channel(pe, pe, 'L2')
for pe in sample(range(ag.num_processors() - 1),
ag.num_processors() // 2):
for _ in range(2):
ag.add_channel(pe, pe + 1, 'c')
ag.add_channel(pe + 1, pe, 'c')
return ag