def calibrate_clock(out, tolerance=0.002, dcor=False):
"""\
currently for F2xx only:
recalculate the clock calibration values and write them to the flash.
"""
device = get_msp430_type() >> 8
variables = {}
if device == 0xf2:
# first read the segment form the device, so that only the calibration values
# are updated. any other data in SegmentA is not changed.
segment_a = memory.Memory()
segment_a.append(
memory.Segment(0x10c0, jtag._parjtag.memread(0x10c0, 64)))
# get the settings for all the frequencies
for frequency in calibvalues_memory_map:
measured_frequency, dco, bcs1 = clock.setDCO(
frequency * (1 - tolerance),
frequency * (1 + tolerance),
maxrsel=15,
dcor=dcor)
variables['f%dMHz_dcoctl' % (frequency / 1e6)] = TYPE_8BIT, dco
variables['f%dMHz_bcsctl1' % (frequency / 1e6)] = TYPE_8BIT, bcs1
out.write('BCS settings for %s: DCOCTL=0x%02x BCSCTL1=0x%02x\n' %
(nice_frequency(measured_frequency), dco, bcs1))
segment_a.setMem(calibvalues_memory_map[frequency]['DCO'],
chr(dco))
segment_a.setMem(calibvalues_memory_map[frequency]['BCS1'],
chr(bcs1))
# erase segment and write new values
jtag._parjtag.memerase(jtag.ERASE_SEGMENT, segment_a[0].startaddress)
jtag._parjtag.memwrite(segment_a[0].startaddress, segment_a[0].data)
else:
raise NotImplementedError("--calibrate is not supported on %Xxx" %
device)
return variables
def calibrate_clock(out, tolerance=0.002, dcor=False):
"""\
currently for F2xx only:
recalculate the clock calibration values and write them to the flash.
"""
device = get_msp430_type() >> 8
variables = {}
if device == 0xf2:
# first read the segment form the device, so that only the calibration values
# are updated. any other data in SegmentA is not changed.
segment_a = memory.Memory()
segment_a.append(memory.Segment(0x10c0, jtag._parjtag.memread(0x10c0, 64)))
# get the settings for all the frequencies
for frequency in calibvalues_memory_map:
measured_frequency, dco, bcs1 = clock.setDCO(
frequency*(1-tolerance),
frequency*(1+tolerance),
maxrsel=15,
dcor=dcor
)
variables['f%dMHz_dcoctl' % (frequency/1e6)] = TYPE_8BIT, dco
variables['f%dMHz_bcsctl1' % (frequency/1e6)] = TYPE_8BIT, bcs1
out.write('BCS settings for %s: DCOCTL=0x%02x BCSCTL1=0x%02x\n' % (
nice_frequency(measured_frequency), dco, bcs1)
)
segment_a.setMem(calibvalues_memory_map[frequency]['DCO'], chr(dco))
segment_a.setMem(calibvalues_memory_map[frequency]['BCS1'], chr(bcs1))
# erase segment and write new values
jtag._parjtag.memerase(jtag.ERASE_SEGMENT, segment_a[0].startaddress)
jtag._parjtag.memwrite(segment_a[0].startaddress, segment_a[0].data)
else:
raise NotImplementedError("--calibrate is not supported on %Xxx" % device)
return variables
def adjust_clock(out, frequency, tolerance=0.02, dcor=False, define=False):
"""\
detect MSP430 type and try to set the clock to the given frequency.
when successful, print the clock control register settings.
this function assumes that the JTAG connection to the device has already
been initialized and that the device is under JTAG control and stopped.
"""
if tolerance < 0.005 or tolerance > 50:
raise ValueError('tolerance out of range %f' % (tolerance, ))
device = get_msp430_type() >> 8
variables = {}
if device == 0xf1:
measured_frequency, dco, bcs1 = clock.setDCO(
frequency * (1 - tolerance),
frequency * (1 + tolerance),
maxrsel=7,
dcor=dcor)
variables['freq'] = TYPE_16BIT, measured_frequency / 1e3
variables['dcoctl'] = TYPE_8BIT, dco
variables['bcsctl1'] = TYPE_8BIT, bcs1
variables['bcsctl2'] = TYPE_8BIT, dcor and 1 or 0
out.write('// BCS settings for %s\n' %
(nice_frequency(measured_frequency), ))
if define:
suffix = '_%s' % nice_frequency(frequency).replace('.', '_')
out.write('#define DCOCTL%s 0x%02x\n' % (
suffix,
dco,
))
out.write('#define BCSCTL1%s 0x%02x\n' % (
suffix,
bcs1,
))
if dcor:
out.write('#define BCSCTL2%s 0x01 // select external ROSC\n' %
(suffix, ))
else:
out.write('#define BCSCTL2%s 0x00 // select internal ROSC\n' %
(suffix, ))
else:
out.write('DCOCTL = 0x%02x;\n' % (dco, ))
out.write('BCSCTL1 = 0x%02x;\n' % (bcs1, ))
if dcor:
out.write('BCSCTL2 = 0x01; // select external ROSC\n')
else:
out.write('BCSCTL2 = 0x00; // select internal ROSC\n')
elif device == 0xf2:
measured_frequency, dco, bcs1 = clock.setDCO(
frequency * (1 - tolerance),
frequency * (1 + tolerance),
maxrsel=15,
dcor=dcor)
variables['freq'] = TYPE_16BIT, measured_frequency / 1e3
variables['dcoctl'] = TYPE_8BIT, dco
variables['bcsctl1'] = TYPE_8BIT, bcs1
variables['bcsctl2'] = TYPE_8BIT, dcor and 1 or 0
out.write('// BCS+ settings for %s\n' %
(nice_frequency(measured_frequency), ))
if define:
suffix = '_%s' % nice_frequency(frequency).replace('.', '_')
out.write('#define DCOCTL%s 0x%02x\n' % (
suffix,
dco,
))
out.write('#define BCSCTL1%s 0x%02x\n' % (
suffix,
bcs1,
))
if dcor:
out.write('#define BCSCTL2%s 0x01 // select external ROSC\n' %
(suffix, ))
else:
out.write('#define BCSCTL2%s 0x00 // select internal ROSC\n' %
(suffix, ))
out.write('#define BCSCTL3%s 0x00\n' % (suffix, ))
else:
out.write('DCOCTL = 0x%02x;\n' % (dco, ))
out.write('BCSCTL1 = 0x%02x;\n' % (bcs1, ))
if dcor:
out.write('BCSCTL2 = 0x01; // select external ROSC\n')
else:
out.write('BCSCTL2 = 0x00; // select internal ROSC\n')
out.write('BCSCTL3 = 0x00;\n')
elif device == 0xf4:
measured_frequency, scfi0, scfi1, scfqctl, fll_ctl0, fll_ctl1 = clock.setDCOPlus(
frequency * (1 - tolerance), frequency * (1 + tolerance))
variables['freq'] = TYPE_16BIT, measured_frequency / 1e3
variables['scfi0'] = TYPE_8BIT, scfi0
variables['scfi1'] = TYPE_8BIT, scfi1
variables['scfqctl'] = TYPE_8BIT, scfqctl
variables['fll_ctl0'] = TYPE_8BIT, fll_ctl0
variables['fll_ctl1'] = TYPE_8BIT, fll_ctl1
out.write('// FLL+ settings for %s\n' %
(nice_frequency(measured_frequency), ))
if define:
suffix = '_%s' % nice_frequency(frequency).replace('.', '_')
out.write('#define SCFI0%(suffix)s 0x%(scfi0)02x\n'
'#define SCFI1%(suffix)s 0x%(scfi1)02x\n'
'#define SCFQCTL%(suffix)s 0x%(scfqctl)02x\n'
'#define FLL_CTL0%(suffix)s 0x%(fll_ctl0)02x\n'
'#define FLL_CTL1%(suffix)s 0x%(fll_ctl1)02x\n' % vars())
else:
out.write(
'SCFI0 = 0x%02x;\nSCFI1 = 0x%02x;\nSCFQCTL = 0x%02x;\nFLL_CTL0 = 0x%02x;\nFLL_CTL1 = 0x%02x;\n'
% (scfi0, scfi1, scfqctl, fll_ctl0, fll_ctl1))
else:
raise IOError("unknown MSP430 type %02x" % device)
return variables
def adjust_clock(out, frequency, tolerance=0.02, dcor=False, define=False):
"""\
detect MSP430 type and try to set the clock to the given frequency.
when successful, print the clock control register settings.
this function assumes that the JTAG connection to the device has already
been initialized and that the device is under JTAG control and stopped.
"""
if tolerance < 0.005 or tolerance > 50:
raise ValueError('tolerance out of range %f' % (tolerance,))
device = get_msp430_type() >> 8
variables = {}
if device == 0xf1:
measured_frequency, dco, bcs1 = clock.setDCO(
frequency*(1-tolerance),
frequency*(1+tolerance),
maxrsel=7,
dcor=dcor
)
variables['freq'] = TYPE_16BIT, measured_frequency/1e3
variables['dcoctl'] = TYPE_8BIT, dco
variables['bcsctl1'] = TYPE_8BIT, bcs1
variables['bcsctl2'] = TYPE_8BIT, dcor and 1 or 0
out.write('// BCS settings for %s\n' % (nice_frequency(measured_frequency), ))
if define:
suffix = '_%s' % nice_frequency(frequency).replace('.','_')
out.write('#define DCOCTL%s 0x%02x\n' % (suffix, dco,))
out.write('#define BCSCTL1%s 0x%02x\n' % (suffix, bcs1,))
if dcor:
out.write('#define BCSCTL2%s 0x01 // select external ROSC\n' % (suffix,))
else:
out.write('#define BCSCTL2%s 0x00 // select internal ROSC\n' % (suffix,))
else:
out.write('DCOCTL = 0x%02x;\n' % (dco,))
out.write('BCSCTL1 = 0x%02x;\n' % (bcs1,))
if dcor:
out.write('BCSCTL2 = 0x01; // select external ROSC\n')
else:
out.write('BCSCTL2 = 0x00; // select internal ROSC\n')
elif device == 0xf2:
measured_frequency, dco, bcs1 = clock.setDCO(
frequency*(1-tolerance),
frequency*(1+tolerance),
maxrsel=15,
dcor=dcor
)
variables['freq'] = TYPE_16BIT, measured_frequency/1e3
variables['dcoctl'] = TYPE_8BIT, dco
variables['bcsctl1'] = TYPE_8BIT, bcs1
variables['bcsctl2'] = TYPE_8BIT, dcor and 1 or 0
out.write('// BCS+ settings for %s\n' % (nice_frequency(measured_frequency), ))
if define:
suffix = '_%s' % nice_frequency(frequency).replace('.','_')
out.write('#define DCOCTL%s 0x%02x\n' % (suffix, dco,))
out.write('#define BCSCTL1%s 0x%02x\n' % (suffix, bcs1,))
if dcor:
out.write('#define BCSCTL2%s 0x01 // select external ROSC\n' % (suffix,))
else:
out.write('#define BCSCTL2%s 0x00 // select internal ROSC\n' % (suffix,))
out.write('#define BCSCTL3%s 0x00\n' % (suffix,))
else:
out.write('DCOCTL = 0x%02x;\n' % (dco,))
out.write('BCSCTL1 = 0x%02x;\n' % (bcs1,))
if dcor:
out.write('BCSCTL2 = 0x01; // select external ROSC\n')
else:
out.write('BCSCTL2 = 0x00; // select internal ROSC\n')
out.write('BCSCTL3 = 0x00;\n')
elif device == 0xf4:
measured_frequency, scfi0, scfi1, scfqctl, fll_ctl0, fll_ctl1 = clock.setDCOPlus(
frequency*(1-tolerance),
frequency*(1+tolerance)
)
variables['freq'] = TYPE_16BIT, measured_frequency/1e3
variables['scfi0'] = TYPE_8BIT, scfi0
variables['scfi1'] = TYPE_8BIT, scfi1
variables['scfqctl'] = TYPE_8BIT, scfqctl
variables['fll_ctl0'] = TYPE_8BIT, fll_ctl0
variables['fll_ctl1'] = TYPE_8BIT, fll_ctl1
out.write('// FLL+ settings for %s\n' % (nice_frequency(measured_frequency), ))
if define:
suffix = '_%s' % nice_frequency(frequency).replace('.','_')
out.write('#define SCFI0%(suffix)s 0x%(scfi0)02x\n'
'#define SCFI1%(suffix)s 0x%(scfi1)02x\n'
'#define SCFQCTL%(suffix)s 0x%(scfqctl)02x\n'
'#define FLL_CTL0%(suffix)s 0x%(fll_ctl0)02x\n'
'#define FLL_CTL1%(suffix)s 0x%(fll_ctl1)02x\n' % vars()
)
else:
out.write('SCFI0 = 0x%02x;\nSCFI1 = 0x%02x;\nSCFQCTL = 0x%02x;\nFLL_CTL0 = 0x%02x;\nFLL_CTL1 = 0x%02x;\n' % (
scfi0, scfi1, scfqctl, fll_ctl0, fll_ctl1
))
else:
raise IOError("unknown MSP430 type %02x" % device)
return variables
