def test_dest_idx_dest_type(self):
p = Pattern('/[aaa,bbb][0:3]', '/[xxx,yyy][0:3]')
p['/aaa[0]', '/yyy[0]'] = 1
p['/aaa[0]', '/yyy[1]'] = 1
p['/aaa[0]', '/yyy[2]'] = 1
p['/xxx[0]', '/bbb[0]'] = 1
p['/xxx[1]', '/bbb[1]'] = 1
p['/xxx[2]', '/bbb[2]'] = 1
p.interface['/aaa[0:3]', 'type'] = 'spike'
p.interface['/yyy[0:3]', 'type'] = 'spike'
self.assertItemsEqual(p.dest_idx(0, 1, dest_type='spike'),
[('yyy', 0),
('yyy', 1),
('yyy', 2)])
self.assertItemsEqual(p.dest_idx(0, 1, dest_type='gpot'), [])
q = Pattern('/[aaa,bbb,ccc]', '/[www,xxx,yyy,zzz]')
q['/aaa','/www'] = 1
q['/aaa','/xxx'] = 1
q['/yyy','/bbb'] = 1
q['/zzz','/ccc'] = 1
q.interface['/aaa'] = [0, 'in', 'spike']
q.interface['/[www,xxx]'] = [1, 'out', 'spike']
self.assertItemsEqual(q.dest_idx(0, 1, dest_type='spike'),
[('www',),
('xxx',)])
self.assertItemsEqual(q.dest_idx(0, 1, dest_type='gpot'), [])
def test_clear(self):
p = Pattern('/aaa[0:3]', '/bbb[0:3]')
p['/aaa[0]', '/bbb[0]'] = 1
p['/aaa[1]', '/bbb[1]'] = 1
p['/aaa[2]', '/bbb[2]'] = 1
p.clear()
assert len(p) == 0
assert len(p.interface) == 0
def create_pattern(lpu1, lpu2):
lpu1_sel = ','.join(['/'+'/'.join([str(i) for i in sel]) for sel in lpu1.interface.index.tolist()])
lpu2_sel = ','.join(['/'+'/'.join([str(i) for i in sel]) for sel in lpu2.interface.index.tolist()])
pat = Pattern(lpu1_sel, lpu2_sel)
lpu1_sel_in_gpot = str(','.join( lpu1.interface.in_ports().gpot_ports().to_selectors() ))
lpu1_sel_out_gpot = str(','.join( lpu1.interface.out_ports().gpot_ports().to_selectors() ))
lpu2_sel_in_gpot = str(','.join( lpu2.interface.in_ports().gpot_ports().to_selectors() ))
lpu2_sel_out_gpot = str(','.join( lpu2.interface.out_ports().gpot_ports().to_selectors() ))
lpu1_sel_in_spike = str(','.join( lpu1.interface.in_ports().spike_ports().to_selectors() ))
lpu1_sel_out_spike = str(','.join( lpu1.interface.out_ports().spike_ports().to_selectors() ))
lpu2_sel_in_spike = str(','.join( lpu2.interface.in_ports().spike_ports().to_selectors() ))
lpu2_sel_out_spike = str(','.join( lpu2.interface.out_ports().spike_ports().to_selectors() ))
pat.interface[lpu1_sel_in_gpot, 'io', 'type'] = ['in', 'gpot']
pat.interface[lpu1_sel_out_gpot, 'io', 'type'] = ['out', 'gpot']
pat.interface[lpu2_sel_in_gpot, 'io', 'type'] = ['in', 'gpot']
pat.interface[lpu2_sel_out_gpot, 'io', 'type'] = ['out', 'gpot']
pat.interface[lpu1_sel_in_spike, 'io', 'type'] = ['in', 'spike']
pat.interface[lpu1_sel_out_spike, 'io', 'type'] = ['out', 'spike']
pat.interface[lpu2_sel_in_spike, 'io', 'type'] = ['in', 'spike']
pat.interface[lpu2_sel_out_spike, 'io', 'type'] = ['out', 'spike']
Neuron_list_12 = ['L1', 'L2', 'L3', 'L4', 'L5', 'T1']
Neuron_list_21 = ['C2', 'C3']
for i in range(768):
for neuron in Neuron_list_12:
pat['/lamina/cart'+str(i)+'/'+neuron, '/medulla/cart'+str(i)+'/'+neuron] = 1
for neuron in Neuron_list_21:
pat['/medulla/cart'+str(i)+'/'+neuron, '/lamina/cart'+str(i)+'/'+neuron] = 1
with open('lam_med_pattern', 'wb') as pat_file:
pickle.dump(pat, pat_file)
return pat
def test_connected_port_pairs(self):
p = Pattern('/aaa[0:3]', '/bbb[0:3]')
p['/aaa[0]', '/bbb[2]'] = 1
p['/aaa[1]', '/bbb[0]'] = 1
p['/aaa[2]', '/bbb[1]'] = 1
self.assertSequenceEqual(p.connected_port_pairs(),
[(('aaa', 0), ('bbb', 2)),
(('aaa', 1), ('bbb', 0)),
(('aaa', 2), ('bbb', 1))])
self.assertSequenceEqual(p.connected_port_pairs(True),
[('/aaa/0', '/bbb/2'),
('/aaa/1', '/bbb/0'),
('/aaa/2', '/bbb/1')])
def test_from_concat(self):
# Need to specify selectors for both interfaces in pattern:
self.assertRaises(ValueError, Pattern.from_concat, '', '/[baz,qux]',
from_sel='', to_sel='/[baz,qux]', data=1)
# Patterns with interfaces using selectors with 1 level:
p = Pattern.from_concat('/[foo,bar]', '/[baz,qux]',
from_sel='/[foo,bar]', to_sel='/[baz,qux]',
data=1)
df = pd.DataFrame(data=[1, 1],
index=pd.MultiIndex(levels=[['bar', 'foo'], ['baz', 'qux']],
labels=[[1, 0], [0, 1]],
names=['from_0', 'to_0'], dtype=object),
columns=['conn'], dtype=object)
assert_frame_equal(p.data, df)
# Patterns with interfaces using selectors with more than 1 level:
p = Pattern.from_concat('/foo[0:2]', '/bar[0:2]',
from_sel='/foo[0:2]', to_sel='/bar[0:2]',
data=1)
df = pd.DataFrame(data=[1, 1],
index=pd.MultiIndex(levels=[['foo'], [0, 1], ['bar'], [0, 1]],
labels=[[0, 0], [0, 1], [0, 0], [0, 1]],
names=['from_0', 'from_1', 'to_0', 'to_1'],
dtype=object),
columns=['conn'], dtype=object)
assert_frame_equal(p.data, df)
# Patterns where port types are specified:
p = Pattern.from_concat('/foo[0:2]', '/bar[0:2]',
from_sel='/foo[0:2]', to_sel='/bar[0:2]',
gpot_sel='/foo[0],/bar[0]',
spike_sel='/foo[1:2],/bar/[1:2]',
data=1)
df_int = pd.DataFrame({'interface': [0, 0, 1, 1],
'io': ['in', 'in', 'out', 'out'],
'type': ['gpot', 'spike', 'gpot', 'spike']},
index=pd.MultiIndex(levels=[['bar', 'foo'], [0, 1]],
labels=[[1, 1, 0, 0], [0, 1, 0, 1]],
names=[u'0', u'1'],
dtype=object),
dtype=object)
df = pd.DataFrame(data=[1, 1],
index=pd.MultiIndex(levels=[['foo'], [0, 1], ['bar'], [0, 1]],
labels=[[0, 0], [0, 1], [0, 0], [0, 1]],
names=['from_0', 'from_1', 'to_0', 'to_1'],
dtype=object),
columns=['conn'],
dtype=object)
assert_frame_equal(p.data, df)
assert_frame_equal(p.interface.data, df_int)
def test_create(self):
p = Pattern('/foo[0:5]', '/bar[0:5]')
p['/foo[0]', '/bar[0]'] = 1
p['/foo[1]', '/bar[1]'] = 1
p['/foo[1]', '/bar[2]'] = 1
p['/bar[3]', '/foo[2]'] = 1
p['/bar[3]', '/foo[3]'] = 1
p['/bar[4]', '/foo[4]'] = 1
assert_frame_equal(p.data, self.df_p)
p.interface['/foo[0:2]', 'type'] = 'spike'
p.interface['/bar[0:2]', 'type'] = 'spike'
p.interface['/foo[2:5]', 'type'] = 'gpot'
p.interface['/bar[3:5]', 'type'] = 'gpot'
assert_frame_equal(p.interface.data, self.df_i)
def test_connected_ports(self):
p = Pattern('/foo[0:3]', '/bar[0:3]')
p['/foo[0]', '/bar[0]'] = 1
p['/foo[1]', '/bar[1]'] = 1
self.assertItemsEqual(p.connected_ports(tuples=True),
[('bar', 0),
('bar', 1),
('foo', 0),
('foo', 1)])
self.assertItemsEqual(p.connected_ports(0, True),
[('foo', 0),
('foo', 1)])
self.assertItemsEqual(p.connected_ports(1, True),
[('bar', 0),
('bar', 1)])
def test_from_graph(self):
p = Pattern('/foo[0:4]', '/bar[0:4]')
p['/foo[0]', '/bar[0]'] = 1
p['/foo[0]', '/bar[1]'] = 1
p['/foo[1]', '/bar[2]'] = 1
p['/bar[3]', '/foo[2]'] = 1
p['/bar[3]', '/foo[3]'] = 1
g = nx.DiGraph()
g.add_node('/bar[0]', interface=1, io='out')
g.add_node('/bar[1]', interface=1, io='out')
g.add_node('/bar[2]', interface=1, io='out')
g.add_node('/bar[3]', interface=1, io='in')
g.add_node('/foo[0]', interface=0, io='in')
g.add_node('/foo[1]', interface=0, io='in')
g.add_node('/foo[2]', interface=0, io='out')
g.add_node('/foo[3]', interface=0, io='out')
g.add_edge('/foo[0]', '/bar[0]')
g.add_edge('/foo[0]', '/bar[1]')
g.add_edge('/foo[1]', '/bar[2]')
g.add_edge('/bar[3]', '/foo[2]')
g.add_edge('/bar[3]', '/foo[3]')
pg = Pattern.from_graph(g)
assert_frame_equal(pg.data.sort(), p.data.sort())
assert_frame_equal(pg.interface.data.sort(), p.interface.data.sort())
def update_pattern_master_worker(self, j, worker_num):
indexes = self.get_worker_nodes(j, worker_num)
master_selectors = self.get_master_selectors()
worker_selectors = self.get_worker_selectors(j, worker_num)
from_list = []
to_list = []
for i, ind in enumerate(indexes):
col_m = ind // 6
ind_m = 1 + (ind % 6)
src = '/master/{}/buf{}'.format(col_m, ind_m)
dest = '/ret/{}/in{}'.format(col_m, ind_m)
from_list.append(src)
to_list.append(dest)
src = '/ret/{}/R{}'.format(col_m, ind_m)
dest = '/master/{}/R{}'.format(col_m, ind_m)
from_list.append(src)
to_list.append(dest)
pattern = Pattern.from_concat(','.join(master_selectors),
','.join(worker_selectors),
from_sel = ','.join(from_list),
to_sel = ','.join(to_list),
gpot_sel = ','.join(from_list+to_list))
return pattern
def test_from_concat(self):
self.assertRaises(ValueError, Pattern.from_concat, '', '/[baz,qux]',
from_sel='', to_sel='/[baz,qux]', data=1)
p = Pattern.from_concat('/[foo,bar]', '/[baz,qux]',
from_sel='/[foo,bar]', to_sel='/[baz,qux]',
data=1)
df = pd.DataFrame(data=[1, 1],
index=pd.MultiIndex(levels=[['bar', 'foo'], ['baz', 'qux']],
labels=[[1, 0], [0, 1]],
names=['from_0', 'to_0'], dtype=object),
columns=['conn'], dtype=object)
assert_frame_equal(p.data, df)
p = Pattern.from_concat('/foo[0:2]', '/bar[0:2]',
from_sel='/foo[0:2]', to_sel='/bar[0:2]',
data=1)
df = pd.DataFrame(data=[1, 1],
index=pd.MultiIndex(levels=[['foo'], [0, 1], ['bar'], [0, 1]],
labels=[[0, 0], [0, 1], [0, 0], [0, 1]],
names=['from_0', 'from_1', 'to_0', 'to_1'],
dtype=object),
columns=['conn'], dtype=object)
assert_frame_equal(p.data, df)
p = Pattern.from_concat('/foo[0:2]', '/bar[0:2]',
from_sel='/foo[0:2]', to_sel='/bar[0:2]',
gpot_sel='/foo[0],/bar[0]',
spike_sel='/foo[1:2],/bar/[1:2]',
data=1)
df_int = pd.DataFrame({'interface': [0, 0, 1, 1],
'io': ['in', 'in', 'out', 'out'],
'type': ['gpot', 'spike', 'gpot', 'spike']},
index=pd.MultiIndex(levels=[['bar', 'foo'], [0, 1]],
labels=[[1, 1, 0, 0], [0, 1, 0, 1]],
names=[u'0', u'1'],
dtype=object),
dtype=object)
df = pd.DataFrame(data=[1, 1],
index=pd.MultiIndex(levels=[['foo'], [0, 1], ['bar'], [0, 1]],
labels=[[0, 0], [0, 1], [0, 0], [0, 1]],
names=['from_0', 'from_1', 'to_0', 'to_1'],
dtype=object),
columns=['conn'],
dtype=object)
assert_frame_equal(p.data, df)
assert_frame_equal(p.interface.data, df_int)
def test_src_idx_dest_ports(self):
p = Pattern('/[aaa,bbb][0:3]', '/[xxx,yyy][0:3]')
p['/aaa[0]', '/yyy[0]'] = 1
p['/aaa[0]', '/yyy[1]'] = 1
p['/aaa[0]', '/yyy[2]'] = 1
p['/xxx[0]', '/bbb[0]'] = 1
p['/xxx[1]', '/bbb[1]'] = 1
p['/xxx[2]', '/bbb[2]'] = 1
self.assertItemsEqual(p.src_idx(0, 1, dest_ports='/yyy[0]'),
[('aaa', 0)])
q = Pattern('/[aaa,bbb]', '/[www,xxx,yyy]')
q['/aaa','/www'] = 1
q['/aaa','/xxx'] = 1
q['/bbb','/yyy'] = 1
self.assertItemsEqual(q.src_idx(0, 1, dest_ports='/[www,xxx]'),
[('aaa',)])
def test_split_multiindex(self):
idx = pd.MultiIndex(levels=[['a'], ['b', 'c'], ['d', 'e'], [0, 1, 2]],
labels=[[0, 0, 0, 0], [0, 0, 1, 1], [0, 1, 0, 1], [0, 1, 1, 2]])
idx0, idx1 = Pattern.split_multiindex(idx, slice(0, 2), slice(2, 4))
assert_index_equal(idx0,
pd.MultiIndex(levels=[['a'], ['b', 'c']],
labels=[[0, 0, 0, 0], [0, 0, 1, 1]]))
assert_index_equal(idx1,
pd.MultiIndex(levels=[['d', 'e'], [0, 1, 2]],
labels=[[0, 1, 0, 1], [0, 1, 1, 2]]))
idx0, idx1 = Pattern.split_multiindex(idx, slice(0, 1), slice(1, 4))
assert_index_equal(idx0,
pd.Index(['a', 'a', 'a', 'a']))
assert_index_equal(idx1,
pd.MultiIndex(levels=[['b', 'c'], ['d', 'e'], [0, 1, 2]],
labels=[[0, 0, 1, 1], [0, 1, 0, 1],
[0, 1, 1, 2]]))
def test_dest_idx_src_ports(self):
p = Pattern('/[aaa,bbb][0:3]', '/[xxx,yyy][0:3]')
p['/aaa[0]', '/yyy[0]'] = 1
p['/aaa[0]', '/yyy[1]'] = 1
p['/aaa[0]', '/yyy[2]'] = 1
p['/xxx[0]', '/bbb[0]'] = 1
p['/xxx[1]', '/bbb[1]'] = 1
p['/xxx[2]', '/bbb[2]'] = 1
self.assertItemsEqual(p.dest_idx(0, 1, src_ports='/aaa[0]'),
[('yyy', 0),
('yyy', 1),
('yyy', 2)])
q = Pattern('/[aaa,bbb]', '/[www,xxx,yyy]')
q['/aaa','/www'] = 1
q['/aaa','/xxx'] = 1
q['/bbb','/yyy'] = 1
self.assertItemsEqual(q.dest_idx(0, 1, src_ports='/aaa'),
[('www',),
('xxx',)])
def create_pattern(n_dict_1, n_dict_2, save_as=None):
"""
If `save_as` is not None, save the pattern as the specified file name.
"""
lpu1_sel_in_gpot = plsel.Selector(LPU.extract_in_gpot(n_dict_1))
lpu1_sel_out_gpot = plsel.Selector(LPU.extract_out_gpot(n_dict_1))
lpu2_sel_in_gpot = plsel.Selector(LPU.extract_in_gpot(n_dict_2))
lpu2_sel_out_gpot = plsel.Selector(LPU.extract_out_gpot(n_dict_2))
lpu1_sel_in_spike = plsel.Selector(LPU.extract_in_spk(n_dict_1))
lpu1_sel_out_spike = plsel.Selector(LPU.extract_out_spk(n_dict_1))
lpu2_sel_in_spike = plsel.Selector(LPU.extract_in_spk(n_dict_2))
lpu2_sel_out_spike = plsel.Selector(LPU.extract_out_spk(n_dict_2))
lpu1_sel_out = plsel.Selector.union(lpu1_sel_out_gpot, lpu1_sel_out_spike)
lpu2_sel_out = plsel.Selector.union(lpu2_sel_out_gpot, lpu2_sel_out_spike)
lpu1_sel_in = plsel.Selector.union(lpu1_sel_in_gpot, lpu1_sel_in_spike)
lpu2_sel_in = plsel.Selector.union(lpu2_sel_in_gpot, lpu2_sel_in_spike)
lpu1_sel = plsel.Selector.union(lpu1_sel_out, lpu1_sel_in)
lpu2_sel = plsel.Selector.union(lpu2_sel_out, lpu2_sel_in)
pat = Pattern(lpu1_sel, lpu2_sel)
pat.interface[lpu1_sel_in_gpot, 'io', 'type'] = ['in', 'gpot']
pat.interface[lpu1_sel_out_gpot, 'io', 'type'] = ['out', 'gpot']
pat.interface[lpu2_sel_in_gpot, 'io', 'type'] = ['in', 'gpot']
pat.interface[lpu2_sel_out_gpot, 'io', 'type'] = ['out', 'gpot']
pat.interface[lpu1_sel_in_spike, 'io', 'type'] = ['in', 'spike']
pat.interface[lpu1_sel_out_spike, 'io', 'type'] = ['out', 'spike']
pat.interface[lpu2_sel_in_spike, 'io', 'type'] = ['in', 'spike']
pat.interface[lpu2_sel_out_spike, 'io', 'type'] = ['out', 'spike']
Neuron_list_12 = ['L1', 'L2', 'L3', 'L4', 'L5', 'T1']
Neuron_list_21 = ['C2', 'C3']
for i in range(768):
for neuron in Neuron_list_12:
pat['/lamina/cart'+str(i)+'/'+neuron, '/medulla/cart'+str(i)+'/'+neuron] = 1
for neuron in Neuron_list_21:
pat['/medulla/cart'+str(i)+'/'+neuron, '/lamina/cart'+str(i)+'/'+neuron] = 1
if save_as:
with open(save_as, 'wb') as pat_file:
pickle.dump(pat, pat_file)
return pat
def test_is_in_interfaces(self):
# Selectors with multiple levels:
p = Pattern('/aaa/bbb', '/ccc/ddd')
assert p.is_in_interfaces('/aaa/bbb') == True
assert p.is_in_interfaces('/aaa') == False
# Selectors with a single level:
p = Pattern('/aaa', '/bbb')
assert p.is_in_interfaces('/aaa') == True
assert p.is_in_interfaces('/ccc') == False
# Selectors comprising identifiers with different numbers of levels::
p = Pattern('/aaa,/bbb[0]', '/ccc,/ddd[0]')
assert p.is_in_interfaces('/aaa') == True
assert p.is_in_interfaces('/ccc') == True
assert p.is_in_interfaces('/ddd') == False
assert p.is_in_interfaces('/ddd[0]') == True
def test_in_ports(self):
p = Pattern('/foo[0:3]', '/bar[0:3]')
p.interface['/foo[0]', 'io', 'type'] = ['in', 'spike']
p.interface['/foo[1:3]', 'io', 'type'] = ['out', 'gpot']
p.interface['/bar[0:2]', 'io', 'type'] = ['out', 'spike']
p.interface['/bar[2]', 'io', 'type'] = ['in', 'gpot']
self.assertItemsEqual(p.in_ports(0).to_tuples(),
[('foo', 0)])
self.assertItemsEqual(p.in_ports(1).to_tuples(),
[('bar', 2)])
def test_from_concat(self):
p = Pattern.from_concat('/[foo,bar]', '/[baz,qux]',
from_sel='/[foo,bar]', to_sel='/[baz,qux]',
data=1)
df = pd.DataFrame(data=[1, 1],
index=pd.MultiIndex(levels=[['bar', 'foo'], ['baz', 'qux']],
labels=[[1, 0], [0, 1]],
names=['from_0', 'to_0'], dtype=object),
columns=['conn'])
assert_frame_equal(p.data, df)
p = Pattern.from_concat('/foo[0:2]', '/bar[0:2]',
from_sel='/foo[0:2]', to_sel='/bar[0:2]',
data=1)
df = pd.DataFrame(data=[1, 1],
index=pd.MultiIndex(levels=[['foo'], [0, 1], ['bar'], [0, 1]],
labels=[[0, 0], [0, 1], [0, 0], [0, 1]],
names=['from_0', 'from_1', 'to_0', 'to_1'],
dtype=object),
columns=['conn'])
assert_frame_equal(p.data, df)
def connect_retina_lamina(self, manager, ret_lpu, lam_lpu):
#.values or .tolist()
print('Initializing selectors')
# some workarounds
ret_sel = ','.join(['/retout/'+ str(sel[-1]) for sel in ret_lpu.interface.index.tolist()])
lam_sel = ','.join(['/' + str(sel[0]) + '/' + str(sel[1]) for sel in lam_lpu.interface.index.tolist()])
print('Initializing pattern with selectors')
pat = Pattern(ret_sel, lam_sel)
ret_sel = ','.join(['/retout/'+ str(sel[-1]) for sel in ret_lpu.interface.index.tolist()])
lam_sel_in = ','.join(['/retin/' + str(sel[-1]) for sel in lam_lpu.interface.index.tolist() if sel[0] == 'retin'])
lam_sel_out = ','.join(['/lamout/' + str(sel[-1]) for sel in lam_lpu.interface.index.tolist() if not sel[0] == 'retin'])
print('Setting selector attributes in pattern')
pat.interface[ret_sel] = [0, 'in', 'gpot']
pat.interface[lam_sel_in] = [1, 'out', 'gpot']
pat.interface[lam_sel_out] = [1, 'in', 'gpot']
for sel in lam_sel_in.split(','):
pat[sel.replace('in', 'out'), sel] = 1
print('Connecting LPUs with the pattern')
manager.connect(ret_lpu, lam_lpu, pat, 0, 1)
def test_to_graph(self):
p = Pattern('/foo[0:4]', '/bar[0:4]')
p['/foo[0]', '/bar[0]'] = 1
p['/foo[0]', '/bar[1]'] = 1
p['/foo[1]', '/bar[2]'] = 1
p['/bar[3]', '/foo[2]'] = 1
p['/bar[3]', '/foo[3]'] = 1
g = p.to_graph()
self.assertItemsEqual(g.nodes(data=True),
[('/bar/0', {'interface': 1, 'io': 'out', 'type': ''}),
('/bar/1', {'interface': 1, 'io': 'out', 'type': ''}),
('/bar/2', {'interface': 1, 'io': 'out', 'type': ''}),
('/bar/3', {'interface': 1, 'io': 'in', 'type': ''}),
('/foo/0', {'interface': 0, 'io': 'in', 'type': ''}),
('/foo/1', {'interface': 0, 'io': 'in', 'type': ''}),
('/foo/2', {'interface': 0, 'io': 'out', 'type': ''}),
('/foo/3', {'interface': 0, 'io': 'out', 'type': ''})])
self.assertItemsEqual(g.edges(data=True),
[('/foo/0', '/bar/0', {}),
('/foo/0', '/bar/1', {}),
('/foo/1', '/bar/2', {}),
('/bar/3', '/foo/2', {}),
('/bar/3', '/foo/3', {})])
def connect_retina_lamina(config, i, retina, lamina, manager):
'''
The connections between Retina and Lamina follow
the neural superposition rule of the fly's compound eye.
See more information in NeurokernelRFC#2.
Retina provides an interface to make this connection easier.
--
config: configuration dictionary like object
i: identifier of eye in case more than one is used
retina: retina array object
lamina: lamina array object
manager: manager object to which connection pattern will be added
'''
retina_id = get_retina_id(i)
lamina_id = get_lamina_id(i)
print('Connecting {} and {}'.format(retina_id, lamina_id))
retina_selectors = retina.get_all_selectors()
lamina_selectors = lamina.get_all_selectors()
with Timer('creation of Pattern object'):
from_list = []
to_list = []
# accounts neural superposition
rulemap = retina.rulemap
for ret_sel in retina_selectors:
# format should be '/ret/<ommid>/<neuronname>'
_, lpu, ommid, n_name = ret_sel.split('/')
# find neighbor of neural superposition
neighborid = rulemap.neighbor_for_photor(int(ommid), n_name)
# format should be '/lam/<cartid>/<neuronname>'
lam_sel = lamina.get_selector(neighborid, n_name)
# setup connection from retina to lamina
from_list.append(ret_sel)
to_list.append(lam_sel)
pattern = Pattern.from_concat(','.join(retina_selectors),
','.join(lamina_selectors),
from_sel=','.join(from_list),
to_sel=','.join(to_list),
gpot_sel=','.join(from_list+to_list))
nx.write_gexf(pattern.to_graph(), retina_id+'_'+lamina_id+'.gexf.gz',
prettyprint=True)
with Timer('update of connections in Manager'):
manager.connect(retina_id, lamina_id, pattern)
def create_pattern(n_dict_1, n_dict_2, save_as=None):
"""
If `save_as` is not None, save the pattern in GEXF format as the specified file name.
"""
lpu1_sel_in_gpot = plsel.Selector(LPU.extract_in_gpot(n_dict_1))
lpu1_sel_out_gpot = plsel.Selector(LPU.extract_out_gpot(n_dict_1))
lpu2_sel_in_gpot = plsel.Selector(LPU.extract_in_gpot(n_dict_2))
lpu2_sel_out_gpot = plsel.Selector(LPU.extract_out_gpot(n_dict_2))
lpu1_sel_in_spike = plsel.Selector(LPU.extract_in_spk(n_dict_1))
lpu1_sel_out_spike = plsel.Selector(LPU.extract_out_spk(n_dict_1))
lpu2_sel_in_spike = plsel.Selector(LPU.extract_in_spk(n_dict_2))
lpu2_sel_out_spike = plsel.Selector(LPU.extract_out_spk(n_dict_2))
lpu1_sel_out = plsel.Selector.union(lpu1_sel_out_gpot, lpu1_sel_out_spike)
lpu2_sel_out = plsel.Selector.union(lpu2_sel_out_gpot, lpu2_sel_out_spike)
lpu1_sel_in = plsel.Selector.union(lpu1_sel_in_gpot, lpu1_sel_in_spike)
lpu2_sel_in = plsel.Selector.union(lpu2_sel_in_gpot, lpu2_sel_in_spike)
lpu1_sel = plsel.Selector.union(lpu1_sel_out, lpu1_sel_in)
lpu2_sel = plsel.Selector.union(lpu2_sel_out, lpu2_sel_in)
Neuron_list_12 = ["L1", "L2", "L3", "L4", "L5", "T1"]
Neuron_list_21 = ["C2", "C3"]
gpot_sel = plsel.Selector.union(lpu1_sel_out_gpot, lpu1_sel_in_gpot, lpu2_sel_out_gpot, lpu2_sel_in_gpot)
spike_sel = plsel.Selector.union(lpu1_sel_out_spike, lpu1_sel_in_spike, lpu2_sel_out_spike, lpu2_sel_in_spike)
Neuron_str_12 = "[" + ",".join(Neuron_list_12) + "]"
Neuron_str_21 = "[" + ",".join(Neuron_list_21) + "]"
cart_str = "[" + ",".join(["cart%i" % i for i in range(768)]) + "]"
from_sel_12 = "/lamina" + cart_str + Neuron_str_12
to_sel_12 = "/medulla" + cart_str + Neuron_str_12
from_sel_21 = "/medulla" + cart_str + Neuron_str_21
to_sel_21 = "/lamina" + cart_str + Neuron_str_21
from_sel = from_sel_12 + "," + from_sel_21
to_sel = to_sel_12 + "," + to_sel_21
pat = Pattern.from_concat(
lpu1_sel, lpu2_sel, from_sel=from_sel, to_sel=to_sel, gpot_sel=gpot_sel, spike_sel=spike_sel, data=1
)
if save_as:
nx.write_gexf(pat.to_graph(), save_as, prettyprint=True)
return pat
def test_from_df(self):
p = Pattern('/[aaa,bbb]/0', '/[ccc,ddd]/0')
p['/aaa/0', '/ccc/0'] = 1
p['/aaa/0', '/ddd/0'] = 1
df_int = pd.DataFrame(data=[(0, 'in', np.nan),
(0, np.nan, np.nan),
(1, 'out', np.nan),
(1, 'out', np.nan)],
index=pd.MultiIndex(levels=[['aaa', 'bbb', 'ccc', 'ddd'], [0]],
labels=[[0, 1, 2, 3], [0, 0, 0, 0]],
names=['0', '1']),
columns=['interface', 'io', 'type'],
dtype=object)
df_pat = pd.DataFrame(data=[(1,), (1,)],
index=pd.MultiIndex(levels=[['aaa'], [0], ['ccc', 'ddd'], [0]],
labels=[[0, 0], [0, 0], [0, 1], [0, 0]],
names=['from_0', 'from_1', 'to_0', 'to_1']),
columns=['conn'],
dtype=object)
q = Pattern.from_df(df_int, df_pat)
assert_frame_equal(p.data, q.data)
assert_frame_equal(p.interface.data, q.interface.data)
def test_is_connected_multi_level(self):
# No connections:
p = Pattern('/aaa[0:3]', '/bbb[0:3]')
assert p.is_connected(0, 1) == False
assert p.is_connected(1, 0) == False
# Connected in one direction:
p = Pattern('/aaa[0:3]', '/bbb[0:3]')
p['/aaa[0]', '/bbb[2]'] = 1
assert p.is_connected(0, 1) == True
assert p.is_connected(1, 0) == False
# Connected in both directions:
p = Pattern('/aaa[0:3]', '/bbb[0:3]')
p['/aaa[0]', '/bbb[2]'] = 1
p['/bbb[0]', '/aaa[1]'] = 1
assert p.is_connected(0, 1) == True
assert p.is_connected(1, 0) == True
def test_is_connected_single_level(self):
# No connections:
p = Pattern('/[aaa,bbb]', '/[ccc,ddd]')
assert p.is_connected(0, 1) == False
assert p.is_connected(1, 0) == False
# Connected in one direction:
p = Pattern('/[aaa,bbb]', '/[ccc,ddd]')
p['/aaa', '/ccc'] = 1
assert p.is_connected(0, 1) == True
assert p.is_connected(1, 0) == False
# Connected in both directions:
p = Pattern('/[aaa,bbb,ccc]', '/[ddd,eee,fff]')
p['/aaa', '/ddd'] = 1
p['/eee', '/bbb'] = 1
assert p.is_connected(0, 1) == True
assert p.is_connected(1, 0) == True
def test_transmit_spikes_one_to_many(self):
m1_sel_in_gpot = Selector('')
m1_sel_out_gpot = Selector('')
m1_sel_in_spike = Selector('')
m1_sel_out_spike = Selector('/m1/out/spike[0:4]')
m1_sel, m1_sel_in, m1_sel_out, m1_sel_gpot, m1_sel_spike = \
make_sels(m1_sel_in_gpot, m1_sel_out_gpot, m1_sel_in_spike, m1_sel_out_spike)
N1_gpot = SelectorMethods.count_ports(m1_sel_gpot)
N1_spike = SelectorMethods.count_ports(m1_sel_spike)
m2_sel_in_gpot = Selector('')
m2_sel_out_gpot = Selector('')
m2_sel_in_spike = Selector('/m2/in/spike[0:4]')
m2_sel_out_spike = Selector('')
m2_sel, m2_sel_in, m2_sel_out, m2_sel_gpot, m2_sel_spike = \
make_sels(m2_sel_in_gpot, m2_sel_out_gpot, m2_sel_in_spike, m2_sel_out_spike)
N2_gpot = SelectorMethods.count_ports(m2_sel_gpot)
N2_spike = SelectorMethods.count_ports(m2_sel_spike)
m1_id = 'm1'
self.man.add(MyModule1, m1_id,
m1_sel, m1_sel_in, m1_sel_out,
m1_sel_gpot, m1_sel_spike,
np.zeros(N1_gpot, dtype=np.double),
np.zeros(N1_spike, dtype=int),
device=0, debug=debug, out_spike_data=[1, 0, 0, 0])
f, out_file_name = tempfile.mkstemp()
os.close(f)
m2_id = 'm2'
self.man.add(MyModule2, m2_id,
m2_sel, m2_sel_in, m2_sel_out,
m2_sel_gpot, m2_sel_spike,
np.zeros(N2_gpot, dtype=np.double),
np.zeros(N2_spike, dtype=int),
device=1, debug=debug, out_file_name=out_file_name)
pat12 = Pattern(m1_sel, m2_sel)
pat12.interface[m1_sel_out_gpot] = [0, 'in', 'gpot']
pat12.interface[m1_sel_in_gpot] = [0, 'out', 'gpot']
pat12.interface[m1_sel_out_spike] = [0, 'in', 'spike']
pat12.interface[m1_sel_in_spike] = [0, 'out', 'spike']
pat12.interface[m2_sel_in_gpot] = [1, 'out', 'gpot']
pat12.interface[m2_sel_out_gpot] = [1, 'in', 'gpot']
pat12.interface[m2_sel_in_spike] = [1, 'out', 'spike']
pat12.interface[m2_sel_out_spike] = [1, 'in', 'spike']
pat12['/m1/out/spike[0]', '/m2/in/spike[0]'] = 1
pat12['/m1/out/spike[0]', '/m2/in/spike[1]'] = 1
pat12['/m1/out/spike[0]', '/m2/in/spike[2]'] = 1
pat12['/m1/out/spike[0]', '/m2/in/spike[3]'] = 1
self.man.connect(m1_id, m2_id, pat12, 0, 1)
# Run emulation for 2 steps:
self.man.spawn()
self.man.start(2)
self.man.wait()
# Get output of m2:
with open(out_file_name, 'r') as f:
output = pickle.load(f)
os.remove(out_file_name)
self.assertSequenceEqual(list(output), [1, 1, 1, 1])
def run_test(m0_sel_in_gpot, m0_sel_in_spike,
m0_sel_out_gpot, m0_sel_out_spike,
m1_sel_in_gpot, m1_sel_in_spike,
m1_sel_out_gpot, m1_sel_out_spike):
# Create test module classes with a queue installed in the destination
# module to check that data was correctly propagated:
class TestModule0(TestModule):
def __init__(self, *args, **kwargs):
super(TestModule0, self).__init__(*args, **kwargs)
self.q = Queue()
def run_step(self):
self.log_info('saving data to queue before run step')
if self.steps > 0:
self.q.put((self.pm['gpot'][self._out_port_dict['gpot']['m1']].copy(),
self.pm['spike'][self._out_port_dict['spike']['m1']].copy()))
super(TestModule0, self).run_step()
class TestModule1(TestModule):
def __init__(self, *args, **kwargs):
super(TestModule1, self).__init__(*args, **kwargs)
self.q = Queue()
def run_step(self):
super(TestModule1, self).run_step()
self.log_info('saving data to queue after run step')
if self.steps > 0:
self.q.put((self.pm['gpot'][self._in_port_dict['gpot']['m0']].copy(),
self.pm['spike'][self._in_port_dict['spike']['m0']].copy()))
m0_sel_gpot = m0_sel_in_gpot+m0_sel_out_gpot
m0_sel_spike = m0_sel_in_spike+m0_sel_out_spike
m0_sel = m0_sel_in_gpot+m0_sel_in_spike+m0_sel_out_gpot+m0_sel_out_spike
m0_data_gpot = np.ones(len(m0_sel_gpot), np.double)
m0_data_spike = np.ones(len(m0_sel_spike), np.int32)
m1_sel_gpot = m1_sel_in_gpot+m1_sel_out_gpot
m1_sel_spike = m1_sel_in_spike+m1_sel_out_spike
m1_sel = m1_sel_in_gpot+m1_sel_in_spike+m1_sel_out_gpot+m1_sel_out_spike
m1_data_gpot = np.zeros(len(m1_sel_gpot), np.double)
m1_data_spike = np.zeros(len(m1_sel_spike), np.int32)
# Instantiate manager and broker:
man = Manager(get_random_port(), get_random_port(), get_random_port())
man.add_brok()
# Add modules:
m0 = TestModule0(m0_sel, m0_sel_in_gpot, m0_sel_in_spike,
m0_sel_out_gpot, m0_sel_out_spike,
m0_data_gpot, m0_data_spike,
man.port_data, man.port_ctrl, man.port_time,
id='m0')
man.add_mod(m0)
m1 = TestModule1(m1_sel, m1_sel_in_gpot, m1_sel_in_spike,
m1_sel_out_gpot, m1_sel_out_spike,
m1_data_gpot, m1_data_spike,
man.port_data, man.port_ctrl, man.port_time,
id='m1')
man.add_mod(m1)
# Connect the modules:
pat = Pattern(m0_sel, m1_sel)
pat.interface[m0_sel_in_gpot] = [0, 'in', 'gpot']
pat.interface[m0_sel_out_gpot] = [0, 'out', 'gpot']
pat.interface[m0_sel_in_spike] = [0, 'in', 'spike']
pat.interface[m0_sel_out_spike] = [0, 'out', 'spike']
pat.interface[m1_sel_in_gpot] = [1, 'in', 'gpot']
pat.interface[m1_sel_out_gpot] = [1, 'out', 'gpot']
pat.interface[m1_sel_in_spike] = [1, 'in', 'spike']
pat.interface[m1_sel_out_spike] = [1, 'out', 'spike']
for sel_from, sel_to in zip(m0_sel_out_gpot,
m1_sel_in_gpot):
if not (sel_from == ((),) or sel_to == ((),)):
pat[sel_from, sel_to] = 1
for sel_from, sel_to in zip(m0_sel_out_spike,
m1_sel_in_spike):
if not (sel_from == ((),) or sel_to == ((),)):
pat[sel_from, sel_to] = 1
man.connect(m0, m1, pat, 0, 1)
# Execute exactly two steps; m0 transmits data during the first step, which
# should be received by m1 during the second step:
man.start(steps=2)
man.stop()
# Forcibly terminate all processes that are still alive:
if m0.is_alive():
m0.terminate()
if m1.is_alive():
m1.terminate()
for b in man.brokers.values():
if b.is_alive():
b.terminate()
# Check that data was propagated correctly:
m0_data_gpot_after, m0_data_spike_after = m0.q.get()
m1_data_gpot_after, m1_data_spike_after = m1.q.get()
assert all(m0_data_gpot_after == m1_data_gpot_after)
assert all(m0_data_spike_after == m1_data_spike_after)
def run_test(m0_sel_in_gpot, m0_sel_in_spike,
m0_sel_out_gpot, m0_sel_out_spike,
m1_sel_in_gpot, m1_sel_in_spike,
m1_sel_out_gpot, m1_sel_out_spike):
# Create test module classes with a queue installed in the destination
# module to check that data was correctly propagated:
class TestModule0(TestModule):
def __init__(self, *args, **kwargs):
super(TestModule0, self).__init__(*args, **kwargs)
self.q = Queue()
def run_step(self):
self.log_info('saving data to queue before run step')
if self.steps > 0:
self.q.put((self.pm['gpot'][self._out_port_dict['gpot']['m1']].copy(),
self.pm['spike'][self._out_port_dict['spike']['m1']].copy()))
super(TestModule0, self).run_step()
class TestModule1(TestModule):
def __init__(self, *args, **kwargs):
super(TestModule1, self).__init__(*args, **kwargs)
self.q = Queue()
def run_step(self):
super(TestModule1, self).run_step()
self.log_info('saving data to queue after run step')
if self.steps > 0:
self.q.put((self.pm['gpot'][self._in_port_dict['gpot']['m0']].copy(),
self.pm['spike'][self._in_port_dict['spike']['m0']].copy()))
m0_sel_gpot = m0_sel_in_gpot+m0_sel_out_gpot
m0_sel_spike = m0_sel_in_spike+m0_sel_out_spike
m0_sel = m0_sel_in_gpot+m0_sel_in_spike+m0_sel_out_gpot+m0_sel_out_spike
m0_data_gpot = np.ones(len(m0_sel_gpot), np.double)
m0_data_spike = np.ones(len(m0_sel_spike), np.int32)
m1_sel_gpot = m1_sel_in_gpot+m1_sel_out_gpot
m1_sel_spike = m1_sel_in_spike+m1_sel_out_spike
m1_sel = m1_sel_in_gpot+m1_sel_in_spike+m1_sel_out_gpot+m1_sel_out_spike
m1_data_gpot = np.zeros(len(m1_sel_gpot), np.double)
m1_data_spike = np.zeros(len(m1_sel_spike), np.int32)
# Instantiate manager and broker:
man = Manager(get_random_port(), get_random_port(), get_random_port())
man.add_brok()
# Add modules:
m0 = TestModule0(m0_sel, m0_sel_in_gpot, m0_sel_in_spike,
m0_sel_out_gpot, m0_sel_out_spike,
m0_data_gpot, m0_data_spike,
man.port_data, man.port_ctrl, man.port_time,
id='m0')
man.add_mod(m0)
m1 = TestModule1(m1_sel, m1_sel_in_gpot, m1_sel_in_spike,
m1_sel_out_gpot, m1_sel_out_spike,
m1_data_gpot, m1_data_spike,
man.port_data, man.port_ctrl, man.port_time,
id='m1')
man.add_mod(m1)
# Connect the modules:
pat = Pattern(m0_sel, m1_sel)
pat.interface[m0_sel_in_gpot] = [0, 'in', 'gpot']
pat.interface[m0_sel_out_gpot] = [0, 'out', 'gpot']
pat.interface[m0_sel_in_spike] = [0, 'in', 'spike']
pat.interface[m0_sel_out_spike] = [0, 'out', 'spike']
pat.interface[m1_sel_in_gpot] = [1, 'in', 'gpot']
pat.interface[m1_sel_out_gpot] = [1, 'out', 'gpot']
pat.interface[m1_sel_in_spike] = [1, 'in', 'spike']
pat.interface[m1_sel_out_spike] = [1, 'out', 'spike']
for sel_from, sel_to in zip(m0_sel_out_gpot,
m1_sel_in_gpot):
if not (sel_from == ((),) or sel_to == ((),)):
pat[sel_from, sel_to] = 1
for sel_from, sel_to in zip(m0_sel_out_spike,
m1_sel_in_spike):
if not (sel_from == ((),) or sel_to == ((),)):
pat[sel_from, sel_to] = 1
man.connect(m0, m1, pat, 0, 1)
# Execute exactly two steps; m0 transmits data during the first step, which
# should be received by m1 during the second step:
man.start(steps=2)
man.stop()
# Forcibly terminate all processes that are still alive:
if m0.is_alive():
m0.terminate()
if m1.is_alive():
m1.terminate()
for b in man.brokers.values():
if b.is_alive():
b.terminate()
# Check that data was propagated correctly:
m0_data_gpot_after, m0_data_spike_after = m0.q.get()
m1_data_gpot_after, m1_data_spike_after = m1.q.get()
assert all(m0_data_gpot_after == m1_data_gpot_after)
assert all(m0_data_spike_after == m1_data_spike_after)
def test_to_graph(self):
p = Pattern('/foo', '/bar')
p['/foo', '/bar'] = 1
g = p.to_graph()
self.assertItemsEqual(g.nodes(data=True),
[('/foo', {'interface': 0, 'io': 'in', 'type': ''}),
('/bar', {'interface': 1, 'io': 'out', 'type': ''})])
p = Pattern('/foo[0:4]', '/bar[0:4]')
p['/foo[0]', '/bar[0]'] = 1
p['/foo[0]', '/bar[1]'] = 1
p['/foo[1]', '/bar[2]'] = 1
p['/bar[3]', '/foo[2]'] = 1
p['/bar[3]', '/foo[3]'] = 1
g = p.to_graph()
self.assertItemsEqual(g.nodes(data=True),
[('/bar/0', {'interface': 1, 'io': 'out', 'type': ''}),
('/bar/1', {'interface': 1, 'io': 'out', 'type': ''}),
('/bar/2', {'interface': 1, 'io': 'out', 'type': ''}),
('/bar/3', {'interface': 1, 'io': 'in', 'type': ''}),
('/foo/0', {'interface': 0, 'io': 'in', 'type': ''}),
('/foo/1', {'interface': 0, 'io': 'in', 'type': ''}),
('/foo/2', {'interface': 0, 'io': 'out', 'type': ''}),
('/foo/3', {'interface': 0, 'io': 'out', 'type': ''})])
self.assertItemsEqual(g.edges(data=True),
[('/foo/0', '/bar/0', {}),
('/foo/0', '/bar/1', {}),
('/foo/1', '/bar/2', {}),
('/bar/3', '/foo/2', {}),
('/bar/3', '/foo/3', {})])
p.interface['/foo[0]','type'] = 'gpot'
p.interface['/foo[1]','type'] = 'gpot'
p.interface['/bar[0]','type'] = 'gpot'
p.interface['/bar[1]','type'] = 'gpot'
p.interface['/bar[2]','type'] = 'gpot'
p.interface['/bar[3]','type'] = 'spike'
p.interface['/foo[2]','type'] = 'spike'
p.interface['/foo[3]','type'] = 'spike'
g = p.to_graph()
self.assertItemsEqual(g.nodes(data=True),
[('/bar/0', {'interface': 1, 'io': 'out', 'type': 'gpot'}),
('/bar/1', {'interface': 1, 'io': 'out', 'type': 'gpot'}),
('/bar/2', {'interface': 1, 'io': 'out', 'type': 'gpot'}),
('/bar/3', {'interface': 1, 'io': 'in', 'type': 'spike'}),
('/foo/0', {'interface': 0, 'io': 'in', 'type': 'gpot'}),
('/foo/1', {'interface': 0, 'io': 'in', 'type': 'gpot'}),
('/foo/2', {'interface': 0, 'io': 'out', 'type': 'spike'}),
('/foo/3', {'interface': 0, 'io': 'out', 'type': 'spike'})])
def test_is_in_interfaces(self):
# Selectors with multiple levels:
p = Pattern('/aaa/bbb', '/ccc/ddd')
assert p.is_in_interfaces('/aaa/bbb') == True
assert p.is_in_interfaces('/aaa') == False
# Selectors with a single level:
p = Pattern('/aaa', '/bbb')
assert p.is_in_interfaces('/aaa') == True
assert p.is_in_interfaces('/ccc') == False
# Selectors comprising identifiers with different numbers of levels::
p = Pattern('/aaa,/bbb[0]', '/ccc,/ddd[0]')
assert p.is_in_interfaces('/aaa') == True
assert p.is_in_interfaces('/ccc') == True
assert p.is_in_interfaces('/ddd') == False
assert p.is_in_interfaces('/ddd[0]') == True
def emulate(n_lpu, n_spike, n_gpot, steps):
"""
Benchmark inter-LPU communication throughput.
Each LPU is configured to use a different local GPU.
Parameters
----------
n_lpu : int
Number of LPUs. Must be at least 2 and no greater than the number of
local GPUs.
n_spike : int
Total number of input and output spiking ports any
single LPU exposes to any other LPU. Each LPU will therefore
have 2*n_spike*(n_lpu-1) total spiking ports.
n_gpot : int
Total number of input and output graded potential ports any
single LPU exposes to any other LPU. Each LPU will therefore
have 2*n_gpot*(n_lpu-1) total graded potential ports.
steps : int
Number of steps to execute.
Returns
-------
average_throughput, total_throughput : float
Average per-step and total received data throughput in bytes/seconds.
exec_time : float
Execution time in seconds.
"""
# Time everything starting with manager initialization:
start_all = time.time()
# Check whether a sufficient number of GPUs are available:
drv.init()
if n_lpu > drv.Device.count():
raise RuntimeError('insufficient number of available GPUs.')
# Set up manager:
man = Manager()
# Generate selectors for configuring modules and patterns:
mod_sels, pat_sels = gen_sels(n_lpu, n_spike, n_gpot)
# Set up modules:
for i in xrange(n_lpu):
lpu_i = 'lpu%s' % i
sel, sel_in, sel_out, sel_gpot, sel_spike = mod_sels[lpu_i]
sel = Selector.union(sel_in, sel_out, sel_gpot, sel_spike)
man.add(MyModule, lpu_i, sel, sel_in, sel_out,
sel_gpot, sel_spike,
None, None, ['interface', 'io', 'type'],
CTRL_TAG, GPOT_TAG, SPIKE_TAG,
device=i, time_sync=True)
# Set up connections between module pairs:
for i, j in itertools.combinations(xrange(n_lpu), 2):
lpu_i = 'lpu%s' % i
lpu_j = 'lpu%s' % j
sel_from, sel_to, sel_in_i, sel_out_i, sel_gpot_i, sel_spike_i, \
sel_in_j, sel_out_j, sel_gpot_j, sel_spike_j = pat_sels[(lpu_i, lpu_j)]
pat = Pattern.from_concat(sel_from, sel_to,
from_sel=sel_from, to_sel=sel_to, data=1)
pat.interface[sel_in_i, 'interface', 'io'] = [0, 'in']
pat.interface[sel_out_i, 'interface', 'io'] = [0, 'out']
pat.interface[sel_gpot_i, 'interface', 'type'] = [0, 'gpot']
pat.interface[sel_spike_i, 'interface', 'type'] = [0, 'spike']
pat.interface[sel_in_j, 'interface', 'io'] = [1, 'in']
pat.interface[sel_out_j, 'interface', 'io'] = [1, 'out']
pat.interface[sel_gpot_j, 'interface', 'type'] = [1, 'gpot']
pat.interface[sel_spike_j, 'interface', 'type'] = [1, 'spike']
man.connect(lpu_i, lpu_j, pat, 0, 1, compat_check=False)
man.spawn()
start_main = time.time()
man.start(steps)
man.wait()
stop_main = time.time()
return man.average_step_sync_time, (time.time()-start_all), \
(stop_main-start_main), (man.stop_time-man.start_time)
def emulate(conn_mat, scaling, n_gpus, steps, use_mps, cache_file='cache.db'):
"""
Benchmark inter-LPU communication throughput.
Each LPU is configured to use a different local GPU.
Parameters
----------
conn_mat : numpy.ndarray
Square array containing numbers of directed spiking port connections
between LPUs (which correspond to the row and column indices).
scaling : int
Scaling factor; multiply all connection numbers by this value.
n_gpus : int
Number of GPUs over which to partition the emulation.
steps : int
Number of steps to execute.
use_mps : bool
Use Multi-Process Service if True.
Returns
-------
average_throughput, total_throughput : float
Average per-step and total received data throughput in bytes/seconds.
exec_time : float
Execution time in seconds.
"""
# Time everything starting with manager initialization:
start_all = time.time()
# Set up manager:
man = MyManager(use_mps)
# Generate selectors for configuring modules and patterns:
mod_sels, pat_sels = gen_sels(conn_mat, scaling)
# Partition nodes in connectivity matrix:
part_map = partition(conn_mat, n_gpus)
# Set up modules such that those in each partition use that partition's GPU:
ranks = set(
[rank for rank in itertools.chain.from_iterable(part_map.values())])
rank_to_gpu_map = {rank: gpu for gpu in part_map for rank in part_map[gpu]}
for i in ranks:
lpu_i = 'lpu%s' % i
sel, sel_in, sel_out, sel_gpot, sel_spike = mod_sels[lpu_i]
man.add(MyModule,
lpu_i,
sel,
sel_in,
sel_out,
sel_gpot,
sel_spike,
None,
None, ['interface', 'io', 'type'],
CTRL_TAG,
GPOT_TAG,
SPIKE_TAG,
device=rank_to_gpu_map[i],
time_sync=True)
# Set up connections between module pairs:
env = lmdb.open(cache_file, map_size=10**10)
with env.begin() as txn:
data = txn.get('routing_table')
if data is not None:
man.log_info('loading cached routing table')
routing_table = dill.loads(data)
# Don't replace man.routing_table outright because its reference is
# already in the dict of named args to transmit to the child MPI process:
for c in routing_table.connections:
man.routing_table[c] = routing_table[c]
else:
man.log_info('no cached routing table found - generating')
for lpu_i, lpu_j in pat_sels.keys():
sel_from, sel_to, sel_in_i, sel_out_i, sel_gpot_i, sel_spike_i, \
sel_in_j, sel_out_j, sel_gpot_j, sel_spike_j = pat_sels[(lpu_i, lpu_j)]
pat = Pattern.from_concat(sel_from,
sel_to,
from_sel=sel_from,
to_sel=sel_to,
data=1,
validate=False)
pat.interface[sel_in_i, 'interface', 'io'] = [0, 'in']
pat.interface[sel_out_i, 'interface', 'io'] = [0, 'out']
pat.interface[sel_gpot_i, 'interface', 'type'] = [0, 'gpot']
pat.interface[sel_spike_i, 'interface', 'type'] = [0, 'spike']
pat.interface[sel_in_j, 'interface', 'io'] = [1, 'in']
pat.interface[sel_out_j, 'interface', 'io'] = [1, 'out']
pat.interface[sel_gpot_j, 'interface', 'type'] = [1, 'gpot']
pat.interface[sel_spike_j, 'interface', 'type'] = [1, 'spike']
man.connect(lpu_i, lpu_j, pat, 0, 1, compat_check=False)
with env.begin(write=True) as txn:
txn.put('routing_table', dill.dumps(man.routing_table))
man.spawn(part_map)
start_main = time.time()
man.start(steps)
man.wait()
stop_main = time.time()
return man.average_step_sync_time, (time.time()-start_all), (stop_main-start_main), \
(man.stop_time-man.start_time)
def test_transmit_spikes_one_to_many(self):
m1_sel_in_gpot = Selector('')
m1_sel_out_gpot = Selector('')
m1_sel_in_spike = Selector('')
m1_sel_out_spike = Selector('/m1/out/spike[0:4]')
m1_sel, m1_sel_in, m1_sel_out, m1_sel_gpot, m1_sel_spike = \
make_sels(m1_sel_in_gpot, m1_sel_out_gpot, m1_sel_in_spike, m1_sel_out_spike)
N1_gpot = SelectorMethods.count_ports(m1_sel_gpot)
N1_spike = SelectorMethods.count_ports(m1_sel_spike)
m2_sel_in_gpot = Selector('')
m2_sel_out_gpot = Selector('')
m2_sel_in_spike = Selector('/m2/in/spike[0:4]')
m2_sel_out_spike = Selector('')
m2_sel, m2_sel_in, m2_sel_out, m2_sel_gpot, m2_sel_spike = \
make_sels(m2_sel_in_gpot, m2_sel_out_gpot, m2_sel_in_spike, m2_sel_out_spike)
N2_gpot = SelectorMethods.count_ports(m2_sel_gpot)
N2_spike = SelectorMethods.count_ports(m2_sel_spike)
m1_id = 'm1'
self.man.add(MyModule1, m1_id,
m1_sel, m1_sel_in, m1_sel_out,
m1_sel_gpot, m1_sel_spike,
np.zeros(N1_gpot, dtype=np.double),
np.zeros(N1_spike, dtype=int),
device=0, debug=debug, out_spike_data=[1, 0, 0, 0])
f, out_file_name = tempfile.mkstemp()
os.close(f)
m2_id = 'm2'
self.man.add(MyModule2, m2_id,
m2_sel, m2_sel_in, m2_sel_out,
m2_sel_gpot, m2_sel_spike,
np.zeros(N2_gpot, dtype=np.double),
np.zeros(N2_spike, dtype=int),
device=1, debug=debug, out_file_name=out_file_name)
pat12 = Pattern(m1_sel, m2_sel)
pat12.interface[m1_sel_out_gpot] = [0, 'in', 'gpot']
pat12.interface[m1_sel_in_gpot] = [0, 'out', 'gpot']
pat12.interface[m1_sel_out_spike] = [0, 'in', 'spike']
pat12.interface[m1_sel_in_spike] = [0, 'out', 'spike']
pat12.interface[m2_sel_in_gpot] = [1, 'out', 'gpot']
pat12.interface[m2_sel_out_gpot] = [1, 'in', 'gpot']
pat12.interface[m2_sel_in_spike] = [1, 'out', 'spike']
pat12.interface[m2_sel_out_spike] = [1, 'in', 'spike']
pat12['/m1/out/spike[0]', '/m2/in/spike[0]'] = 1
pat12['/m1/out/spike[0]', '/m2/in/spike[1]'] = 1
pat12['/m1/out/spike[0]', '/m2/in/spike[2]'] = 1
pat12['/m1/out/spike[0]', '/m2/in/spike[3]'] = 1
self.man.connect(m1_id, m2_id, pat12, 0, 1)
# Run emulation for 2 steps:
self.man.spawn()
self.man.start(2)
self.man.wait()
# Get output of m2:
with open(out_file_name, 'r') as f:
output = pickle.load(f)
os.remove(out_file_name)
self.assertSequenceEqual(list(output), [1, 1, 1, 1])
def test_create_unequal_levels(self):
p = Pattern('/x[0:3]/y', '/z[0:3]')
p['/x[0]/y', '/z[0]'] = 1
q = Pattern('/x[0:3]', '/z[0:3]/a')
q['/x[0]', '/z[0]/a'] = 1
def test_from_graph(self):
p = Pattern('/foo[0:4]', '/bar[0:4]')
p['/foo[0]', '/bar[0]'] = 1
p['/foo[0]', '/bar[1]'] = 1
p['/foo[1]', '/bar[2]'] = 1
p['/bar[3]', '/foo[2]'] = 1
p['/bar[3]', '/foo[3]'] = 1
g = nx.DiGraph()
g.add_node('/bar[0]', interface=1, io='out')
g.add_node('/bar[1]', interface=1, io='out')
g.add_node('/bar[2]', interface=1, io='out')
g.add_node('/bar[3]', interface=1, io='in')
g.add_node('/foo[0]', interface=0, io='in')
g.add_node('/foo[1]', interface=0, io='in')
g.add_node('/foo[2]', interface=0, io='out')
g.add_node('/foo[3]', interface=0, io='out')
g.add_edge('/foo[0]', '/bar[0]')
g.add_edge('/foo[0]', '/bar[1]')
g.add_edge('/foo[1]', '/bar[2]')
g.add_edge('/bar[3]', '/foo[2]')
g.add_edge('/bar[3]', '/foo[3]')
pg = Pattern.from_graph(g)
assert_frame_equal(pg.data.sort_index(), p.data.sort_index())
assert_frame_equal(pg.interface.data.sort_index(),
p.interface.data.sort_index())
p.interface['/foo[0]', 'type'] = 'gpot'
p.interface['/bar[0]', 'type'] = 'gpot'
p.interface['/bar[1]', 'type'] = 'gpot'
p.interface['/foo[1]', 'type'] = 'gpot'
p.interface['/bar[2]', 'type'] = 'gpot'
p.interface['/bar[3]', 'type'] = 'spike'
p.interface['/foo[2]', 'type'] = 'spike'
p.interface['/bar[3]', 'type'] = 'spike'
p.interface['/foo[3]', 'type'] = 'spike'
g = nx.DiGraph()
g.add_node('/bar[0]', interface=1, io='out', type='gpot')
g.add_node('/bar[1]', interface=1, io='out', type='gpot')
g.add_node('/bar[2]', interface=1, io='out', type='gpot')
g.add_node('/bar[3]', interface=1, io='in', type='spike')
g.add_node('/foo[0]', interface=0, io='in', type='gpot')
g.add_node('/foo[1]', interface=0, io='in', type='gpot')
g.add_node('/foo[2]', interface=0, io='out', type='spike')
g.add_node('/foo[3]', interface=0, io='out', type='spike')
g.add_edge('/foo[0]', '/bar[0]')
g.add_edge('/foo[0]', '/bar[1]')
g.add_edge('/foo[1]', '/bar[2]')
g.add_edge('/bar[3]', '/foo[2]')
g.add_edge('/bar[3]', '/foo[3]')
pg = Pattern.from_graph(g)
assert_frame_equal(pg.data.sort_index(), p.data.sort_index())
assert_frame_equal(pg.interface.data.sort_index(),
p.interface.data.sort_index())
def emulate(n_lpu, n_spike, n_gpot, steps):
"""
Benchmark inter-LPU communication throughput.
Each LPU is configured to use a different local GPU.
Parameters
----------
n_lpu : int
Number of LPUs. Must be at least 2 and no greater than the number of
local GPUs.
n_spike : int
Total number of input and output spiking ports any
single LPU exposes to any other LPU. Each LPU will therefore
have 2*n_spike*(n_lpu-1) total spiking ports.
n_gpot : int
Total number of input and output graded potential ports any
single LPU exposes to any other LPU. Each LPU will therefore
have 2*n_gpot*(n_lpu-1) total graded potential ports.
steps : int
Number of steps to execute.
Returns
-------
average_throughput, total_throughput : float
Average per-step and total received data throughput in bytes/seconds.
exec_time : float
Execution time in seconds.
"""
# Time everything starting with manager initialization:
start_all = time.time()
# Check whether a sufficient number of GPUs are available:
drv.init()
if n_lpu > drv.Device.count():
raise RuntimeError('insufficient number of available GPUs.')
# Set up manager and broker:
man = Manager(get_random_port(), get_random_port(), get_random_port())
man.add_brok()
# Generate selectors for configuring modules and patterns:
mod_sels, pat_sels = gen_sels(n_lpu, n_spike, n_gpot)
# Set up modules:
for i in xrange(n_lpu):
lpu_i = 'lpu%s' % i
sel, sel_in, sel_out, sel_gpot, sel_spike = mod_sels[lpu_i]
m = MyModule(sel, sel_in, sel_out,
sel_gpot, sel_spike,
port_data=man.port_data, port_ctrl=man.port_ctrl,
port_time=man.port_time,
id=lpu_i, device=i, debug=args.debug)
man.add_mod(m)
# Set up connections between module pairs:
for i, j in itertools.combinations(xrange(n_lpu), 2):
lpu_i = 'lpu%s' % i
lpu_j = 'lpu%s' % j
sel_from, sel_to, sel_in_i, sel_out_i, sel_gpot_i, sel_spike_i, \
sel_in_j, sel_out_j, sel_gpot_j, sel_spike_j = pat_sels[(lpu_i, lpu_j)]
pat = Pattern.from_concat(sel_from, sel_to,
from_sel=sel_from, to_sel=sel_to, data=1)
pat.interface[sel_in_i, 'interface', 'io'] = [0, 'in']
pat.interface[sel_out_i, 'interface', 'io'] = [0, 'out']
pat.interface[sel_gpot_i, 'interface', 'type'] = [0, 'gpot']
pat.interface[sel_spike_i, 'interface', 'type'] = [0, 'spike']
pat.interface[sel_in_j, 'interface', 'io'] = [1, 'in']
pat.interface[sel_out_j, 'interface', 'io'] = [1, 'out']
pat.interface[sel_gpot_j, 'interface', 'type'] = [1, 'gpot']
pat.interface[sel_spike_j, 'interface', 'type'] = [1, 'spike']
man.connect(man.modules[lpu_i], man.modules[lpu_j], pat, 0, 1,
compat_check=False)
start_main = time.time()
man.start(steps=steps)
man.stop()
stop_main = time.time()
t = man.get_throughput()
return t[0], (time.time()-start_all), (stop_main-start_main), t[3]
def emulate(conn_mat, scaling, n_gpus, steps, use_mps, cache_file='cache.db'):
"""
Benchmark inter-LPU communication throughput.
Each LPU is configured to use a different local GPU.
Parameters
----------
conn_mat : numpy.ndarray
Square array containing numbers of directed spiking port connections
between LPUs (which correspond to the row and column indices).
scaling : int
Scaling factor; multiply all connection numbers by this value.
n_gpus : int
Number of GPUs over which to partition the emulation.
steps : int
Number of steps to execute.
use_mps : bool
Use Multi-Process Service if True.
Returns
-------
average_throughput, total_throughput : float
Average per-step and total received data throughput in bytes/seconds.
exec_time : float
Execution time in seconds.
"""
# Time everything starting with manager initialization:
start_all = time.time()
# Set up manager:
man = MyManager(use_mps)
# Generate selectors for configuring modules and patterns:
mod_sels, pat_sels = gen_sels(conn_mat, scaling)
# Partition nodes in connectivity matrix:
part_map = partition(conn_mat, n_gpus)
# Set up modules such that those in each partition use that partition's GPU:
ranks = set([rank for rank in itertools.chain.from_iterable(part_map.values())])
rank_to_gpu_map = {rank:gpu for gpu in part_map for rank in part_map[gpu]}
for i in ranks:
lpu_i = 'lpu%s' % i
sel, sel_in, sel_out, sel_gpot, sel_spike = mod_sels[lpu_i]
man.add(MyModule, lpu_i, sel, sel_in, sel_out, sel_gpot, sel_spike,
None, None, ['interface', 'io', 'type'],
CTRL_TAG, GPOT_TAG, SPIKE_TAG, device=rank_to_gpu_map[i],
time_sync=True)
# Set up connections between module pairs:
env = lmdb.open(cache_file, map_size=10**10)
with env.begin() as txn:
data = txn.get('routing_table')
if data is not None:
man.log_info('loading cached routing table')
routing_table = dill.loads(data)
# Don't replace man.routing_table outright because its reference is
# already in the dict of named args to transmit to the child MPI process:
for c in routing_table.connections:
man.routing_table[c] = routing_table[c]
else:
man.log_info('no cached routing table found - generating')
for lpu_i, lpu_j in pat_sels.keys():
sel_from, sel_to, sel_in_i, sel_out_i, sel_gpot_i, sel_spike_i, \
sel_in_j, sel_out_j, sel_gpot_j, sel_spike_j = pat_sels[(lpu_i, lpu_j)]
pat = Pattern.from_concat(sel_from, sel_to,
from_sel=sel_from, to_sel=sel_to, data=1, validate=False)
pat.interface[sel_in_i, 'interface', 'io'] = [0, 'in']
pat.interface[sel_out_i, 'interface', 'io'] = [0, 'out']
pat.interface[sel_gpot_i, 'interface', 'type'] = [0, 'gpot']
pat.interface[sel_spike_i, 'interface', 'type'] = [0, 'spike']
pat.interface[sel_in_j, 'interface', 'io'] = [1, 'in']
pat.interface[sel_out_j, 'interface', 'io'] = [1, 'out']
pat.interface[sel_gpot_j, 'interface', 'type'] = [1, 'gpot']
pat.interface[sel_spike_j, 'interface', 'type'] = [1, 'spike']
man.connect(lpu_i, lpu_j, pat, 0, 1, compat_check=False)
with env.begin(write=True) as txn:
txn.put('routing_table', dill.dumps(man.routing_table))
man.spawn(part_map)
start_main = time.time()
man.start(steps)
man.wait()
stop_main = time.time()
return man.average_step_sync_time, (time.time()-start_all), (stop_main-start_main), \
(man.stop_time-man.start_time)
m1_id = 'm1 '
man.add(MyModule, m1_id, m1_sel, m1_sel_in, m1_sel_out,
m1_sel_gpot, m1_sel_spike,
np.zeros(N1_gpot, dtype=np.double),
np.zeros(N1_spike, dtype=int),
device=0, time_sync=True)
m2_id = 'm2 '
man.add(MyModule, m2_id, m2_sel, m2_sel_in, m2_sel_out,
m2_sel_gpot, m2_sel_spike,
np.zeros(N2_gpot, dtype=np.double),
np.zeros(N2_spike, dtype=int),
device=1, time_sync=True)
# Make sure that all ports in the patterns' interfaces are set so
# that they match those of the modules:
pat12 = Pattern(m1_sel, m2_sel)
pat12.interface[m1_sel_out_gpot] = [0, 'in', 'gpot']
pat12.interface[m1_sel_in_gpot] = [0, 'out', 'gpot']
pat12.interface[m1_sel_out_spike] = [0, 'in', 'spike']
pat12.interface[m1_sel_in_spike] = [0, 'out', 'spike']
pat12.interface[m2_sel_in_gpot] = [1, 'out', 'gpot']
pat12.interface[m2_sel_out_gpot] = [1, 'in', 'gpot']
pat12.interface[m2_sel_in_spike] = [1, 'out', 'spike']
pat12.interface[m2_sel_out_spike] = [1, 'in', 'spike']
pat12['/a/out/gpot[0]', '/b/in/gpot[0]'] = 1
pat12['/a/out/gpot[1]', '/b/in/gpot[1]'] = 1
pat12['/b/out/gpot[0]', '/a/in/gpot[0]'] = 1
pat12['/b/out/gpot[1]', '/a/in/gpot[1]'] = 1
pat12['/a/out/spike[0]', '/b/in/spike[0]'] = 1
pat12['/a/out/spike[1]', '/b/in/spike[1]'] = 1
pat12['/b/out/spike[0]', '/a/in/spike[0]'] = 1
def test_src_idx_dest_type(self):
p = Pattern('/[aaa,bbb][0:3]', '/[xxx,yyy][0:3]')
p['/aaa[0]', '/yyy[0]'] = 1
p['/aaa[0]', '/yyy[1]'] = 1
p['/aaa[0]', '/yyy[2]'] = 1
p['/xxx[0]', '/bbb[0]'] = 1
p['/xxx[1]', '/bbb[1]'] = 1
p['/xxx[2]', '/bbb[2]'] = 1
p.interface['/aaa[0:3]', 'type'] = 'spike'
p.interface['/yyy[0:3]', 'type'] = 'spike'
self.assertItemsEqual(p.src_idx(0, 1, dest_type='spike'), [('aaa', 0)])
self.assertItemsEqual(p.src_idx(0, 1, dest_type='gpot'), [])
q = Pattern('/[aaa,bbb,ccc]', '/[www,xxx,yyy,zzz]')
q['/aaa', '/www'] = 1
q['/aaa', '/xxx'] = 1
q['/yyy', '/bbb'] = 1
q['/zzz', '/ccc'] = 1
q.interface['/aaa'] = [0, 'in', 'spike']
q.interface['/[www,xxx]'] = [1, 'out', 'spike']
self.assertItemsEqual(q.src_idx(0, 1, dest_type='spike'), [('aaa', )])
self.assertItemsEqual(q.src_idx(0, 1, dest_type='gpot'), [])
def emulate(n_lpu, n_spike, n_gpot, steps):
"""
Benchmark inter-LPU communication throughput.
Each LPU is configured to use a different local GPU.
Parameters
----------
n_lpu : int
Number of LPUs. Must be at least 2 and no greater than the number of
local GPUs.
n_spike : int
Total number of input and output spiking ports any
single LPU exposes to any other LPU. Each LPU will therefore
have 2*n_spike*(n_lpu-1) total spiking ports.
n_gpot : int
Total number of input and output graded potential ports any
single LPU exposes to any other LPU. Each LPU will therefore
have 2*n_gpot*(n_lpu-1) total graded potential ports.
steps : int
Number of steps to execute.
Returns
-------
average_throughput, total_throughput : float
Average per-step and total received data throughput in bytes/seconds.
exec_time : float
Execution time in seconds.
"""
# Time everything starting with manager initialization:
start_all = time.time()
# Set up manager:
man = Manager()
# Generate selectors for configuring modules and patterns:
mod_sels, pat_sels = gen_sels(n_lpu, n_spike, n_gpot)
# Set up modules:
for i in xrange(n_lpu):
lpu_i = 'lpu%s' % i
sel, sel_in, sel_out, sel_gpot, sel_spike = mod_sels[lpu_i]
man.add(MyModule, lpu_i, sel, sel_in, sel_out, sel_gpot, sel_spike,
None, None, ['interface', 'io', 'type'],
CTRL_TAG, GPOT_TAG, SPIKE_TAG, time_sync=True)
# Set up connections between module pairs:
for i, j in itertools.combinations(xrange(n_lpu), 2):
lpu_i = 'lpu%s' % i
lpu_j = 'lpu%s' % j
sel_from, sel_to, sel_in_i, sel_out_i, sel_gpot_i, sel_spike_i, \
sel_in_j, sel_out_j, sel_gpot_j, sel_spike_j = pat_sels[(lpu_i, lpu_j)]
pat = Pattern.from_concat(sel_from, sel_to,
from_sel=sel_from, to_sel=sel_to, data=1)
pat.interface[sel_in_i, 'interface', 'io'] = [0, 'in']
pat.interface[sel_out_i, 'interface', 'io'] = [0, 'out']
pat.interface[sel_gpot_i, 'interface', 'type'] = [0, 'gpot']
pat.interface[sel_spike_i, 'interface', 'type'] = [0, 'spike']
pat.interface[sel_in_j, 'interface', 'io'] = [1, 'in']
pat.interface[sel_out_j, 'interface', 'io'] = [1, 'out']
pat.interface[sel_gpot_j, 'interface', 'type'] = [1, 'gpot']
pat.interface[sel_spike_j, 'interface', 'type'] = [1, 'spike']
man.connect(lpu_i, lpu_j, pat, 0, 1, compat_check=False)
man.spawn()
start_main = time.time()
man.start(steps)
man.wait()
stop_main = time.time()
return man.average_step_sync_time, (time.time()-start_all), (stop_main-start_main), \
(man.stop_time-man.start_time)
def emulate(n_lpu, n_spike, n_gpot, steps):
"""
Benchmark inter-LPU communication throughput.
Each LPU is configured to use a different local GPU.
Parameters
----------
n_lpu : int
Number of LPUs. Must be at least 2 and no greater than the number of
local GPUs.
n_spike : int
Total number of input and output spiking ports any
single LPU exposes to any other LPU. Each LPU will therefore
have 2*n_spike*(n_lpu-1) total spiking ports.
n_gpot : int
Total number of input and output graded potential ports any
single LPU exposes to any other LPU. Each LPU will therefore
have 2*n_gpot*(n_lpu-1) total graded potential ports.
steps : int
Number of steps to execute.
Returns
-------
average_throughput, total_throughput : float
Average per-step and total received data throughput in bytes/seconds.
exec_time : float
Execution time in seconds.
"""
# Time everything starting with manager initialization:
start_all = time.time()
# Set up manager and broker:
man = Manager(get_random_port(), get_random_port(), get_random_port())
man.add_brok()
# Generate selectors for configuring modules and patterns:
mod_sels, pat_sels = gen_sels(n_lpu, n_spike, n_gpot)
# Set up modules:
for i in xrange(n_lpu):
lpu_i = 'lpu%s' % i
sel, sel_in, sel_out, sel_gpot, sel_spike = mod_sels[lpu_i]
m = MyModule(sel,
sel_in,
sel_out,
sel_gpot,
sel_spike,
port_data=man.port_data,
port_ctrl=man.port_ctrl,
port_time=man.port_time,
id=lpu_i,
device=None,
debug=args.debug)
man.add_mod(m)
# Set up connections between module pairs:
for i, j in itertools.combinations(xrange(n_lpu), 2):
lpu_i = 'lpu%s' % i
lpu_j = 'lpu%s' % j
sel_from, sel_to, sel_in_i, sel_out_i, sel_gpot_i, sel_spike_i, \
sel_in_j, sel_out_j, sel_gpot_j, sel_spike_j = pat_sels[(lpu_i, lpu_j)]
pat = Pattern.from_concat(sel_from,
sel_to,
from_sel=sel_from,
to_sel=sel_to,
data=1)
pat.interface[sel_in_i, 'interface', 'io'] = [0, 'in']
pat.interface[sel_out_i, 'interface', 'io'] = [0, 'out']
pat.interface[sel_gpot_i, 'interface', 'type'] = [0, 'gpot']
pat.interface[sel_spike_i, 'interface', 'type'] = [0, 'spike']
pat.interface[sel_in_j, 'interface', 'io'] = [1, 'in']
pat.interface[sel_out_j, 'interface', 'io'] = [1, 'out']
pat.interface[sel_gpot_j, 'interface', 'type'] = [1, 'gpot']
pat.interface[sel_spike_j, 'interface', 'type'] = [1, 'spike']
man.connect(man.modules[lpu_i],
man.modules[lpu_j],
pat,
0,
1,
compat_check=False)
# Also time main body of emulation excluding setup and collection of timing data:
start_main = time.time()
man.start(steps=steps)
man.stop()
stop_main = time.time()
t = man.get_throughput()
return t[0], (time.time() - start_all), (stop_main - start_main), t[3]
